KR101782165B1 - Organic electro-luminescence display and manufacturing method thereof - Google Patents

Abstract

The present invention discloses an organic electroluminescent display device capable of not only simplifying a process but also preventing a stain phenomenon.
The organic electroluminescent display device includes a lower substrate including a pixel display unit, a gate driver and a seal unit, a driving thin film transistor formed on a pixel display unit of the lower substrate, a switch thin film transistor formed on the gate driving unit, a driving thin film transistor and a switch thin film transistor A reflective pattern formed at the time of forming the source / drain electrodes of the drive thin film transistor and the switch thin film transistor in the seal portion, a base power supply auxiliary electrode formed on the flat layer and the reflection pattern, Insulating layer.

Description

TECHNICAL FIELD [0001] The present invention relates to an organic electroluminescent display device and an organic electroluminescent display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention [0002] The present invention relates to an organic light emitting display, and more particularly, to an organic light emitting display capable of simplifying a process and preventing a stain phenomenon.

2. Description of the Related Art In recent years, an organic light emitting display (OLED), which displays images by controlling the amount of light emitted from an organic light emitting layer, has been spotlighted by a flat panel display capable of reducing weight and volume, which is a disadvantage of a cathode ray tube (CRT).

The organic light emitting display device is a self-luminous device using a light emitting layer between electrodes, and has a merit that a backlight unit that provides light like a liquid crystal display device is not needed, and thus can be thinned.

In an organic light emitting display, pixels composed of three color (R, G, B) sub-pixels are arranged in a matrix form to display an image.

Each of the sub-pixels includes an organic electroluminescent cell and a cell driver for independently driving the organic electroluminescent cell.

The cell driver includes at least two thin film transistors between a gate line for supplying a scan signal, a data line for supplying a video data signal, and a common power supply line for supplying a common power supply signal, and a storage capacitor, Thereby driving the pixel electrode of the cell.

The organic electroluminescent cell comprises a pixel electrode connected to a cell driving unit, an organic layer on the pixel electrode, and a cathode on the organic layer. Here, the organic light emitting display panel is formed by adhering a lower substrate and an upper substrate on which a thin film transistor and an organic electroluminescent cell are formed.

The organic light emitting display device having such a structure can be applied to an organic light emitting display having a structure in which an active layer, a buffer layer, a gate insulating layer, a gate electrode, a source / drain electrode, an interlayer insulating layer, a protective layer, a flat layer, , A cathode layer, and the like, there has been a problem that the manufacturing time and cost are increased due to a number of photolithography processes using a mask.

In general organic light emitting display devices, when the protective layer is removed to improve the above problem, a reflection pattern formed simultaneously at the time of forming the source / drain electrodes in the edge seal region of the lower substrate for adhesion with the upper substrate So that the surface energy is exposed to the outside in the process of forming the bank insulating layer and the like. That is, the region where the reflection pattern is formed causes a thickness difference in the step of forming the bank insulation layer, thereby causing a problem of staining.

It is an object of the present invention to provide an organic electroluminescent display device and a method of manufacturing the same, which can simplify the process and prevent a stain phenomenon.

In the organic light emitting display device according to the first embodiment of the present invention,

A lower substrate including a pixel display portion, a gate driver, and a seal portion; A driving thin film transistor formed on a pixel display portion of the lower substrate; A switch thin film transistor formed in the gate driver; A flat layer formed on the driving thin film transistor and the switch thin film transistor; A reflection pattern formed simultaneously in forming the source / drain electrodes of the drive thin film transistor and the switch thin film transistor in the seal portion; A base power auxiliary electrode formed on the flat layer and the reflection pattern; And a bank insulating layer formed on the base power supply auxiliary electrode.

In an organic light emitting display device according to a second embodiment of the present invention,

A lower substrate including a pixel display portion, a gate driver, and a seal portion; A driving thin film transistor formed on a pixel display portion of the lower substrate; A switch thin film transistor formed in the gate driver; A flat layer formed on the driving thin film transistor and the switch thin film transistor; A reflection pattern formed simultaneously in forming the gate electrode of the drive thin film transistor and the switch thin film transistor in the seal portion; The gate electrode of the pixel display section and the gate driving section is formed on the gate insulating layer, and the gate insulating layer and the interlayer insulating layer formed on the reflection pattern; And a bank insulating layer formed on the interlayer insulating layer of the pixel display section and the gate driving section.

A method of fabricating an organic light emitting display according to a third embodiment of the present invention includes:

Forming a buffer layer and a gate insulating layer on a lower substrate divided into a pixel display portion, a gate driver portion, and a seal portion; Forming first and second gate electrodes on the gate insulating layer; Forming an interlayer insulating layer on the gate insulating layer including the first and second gate electrodes; Forming first and second source electrodes, first and second drain electrodes and a reflection pattern on the interlayer insulating layer; Forming a flat layer on the first and second source electrodes and the first and second drain electrodes; A pixel electrode connected to the first drain electrode on the flat layer, and a base power supply auxiliary electrode covering the reflection pattern; And forming a bank insulating layer on the planarizing layer and the base power assist electrode.

A method of manufacturing an organic light emitting display according to a fourth embodiment of the present invention includes:

Forming a buffer layer and a gate insulating layer on a lower substrate divided into a pixel display portion, a gate driver portion, and a seal portion; Forming first and second gate electrodes on the gate insulating layer of the real part, on the gate insulating layer of the pixel display part and the gate driver; Forming an interlayer insulating layer on the gate insulating layer including the reflection pattern and the first and second gate electrodes; Forming first and second source electrodes and first and second drain electrodes on the interlayer insulating layer of the pixel display unit and the gate driver; Forming a flat layer on the first and second source electrodes and the first and second drain electrodes; Forming a pixel electrode connected to the first drain electrode on the flat layer; And forming a bank insulating layer on the flat layer.

The present invention can reduce manufacturing time and manufacturing cost by eliminating the protective layer of a general organic light emitting display device and also provides a base power assist electrode for preventing exposure of a reflection pattern in the bank insulating layer forming process, Can be prevented.

The present invention can reduce the manufacturing time and manufacturing cost by eliminating the protective layer of a general organic light emitting display device, and at the same time, the reflection pattern in the bank insulating layer forming process is formed at the time of forming the gate electrode, By not being exposed to the outside, a stain phenomenon can be prevented.

1 is a circuit block diagram illustrating an organic light emitting display according to an embodiment of the present invention.
2 is a circuit diagram showing the unit light emitting region of FIG.
3 is a cross-sectional view of an organic light emitting display device showing region A of FIG.
4A to 4J are cross-sectional views illustrating a method of manufacturing an organic light emitting display according to an embodiment of the present invention.
5 is a cross-sectional view illustrating an organic light emitting display according to another embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the accompanying drawings, embodiments of the present invention will be described in detail.

One embodiment of the present invention is intended to enable a person skilled in the art to fully understand the technical idea of the present invention. Therefore, the present invention is not limited to the embodiments described below, and other embodiments can be added on the basis of the technical idea of the present invention.

FIG. 1 is a circuit block diagram showing an organic light emitting display according to an embodiment of the present invention, and FIG. 2 is a circuit diagram showing the unit emission region of FIG.

1, an organic light emitting display includes an image display unit 100 for displaying an image, a gate driver 230 for driving gate lines GL1 to GLn on one side of the image display unit 100, And a light emitting diode (LED) panel 200.

Here, the organic light emitting display further includes a data driver (not shown) for driving the data lines DL1 to DLm.

The light emitting display panel 200 includes an upper substrate and a lower substrate bonded to each other by a seal 170 and the pixel display unit 100 of the light emitting display panel 200 is connected to the gate lines GL1- The light emitting region EL is formed in each of the plurality of pixel regions defined by intersecting the data lines DL1 to DLm. The light emitting area EL is supplied with a driving voltage VDD and a ground voltage GND from a power supply unit (not shown).

The driving voltage VDD supplies a driving voltage VDD to each of the light emitting regions EL through the driving voltage supply line 220.

The ground voltage GND supplies a ground voltage GND to each of the light emitting areas EL through the ground voltage supplying line 210.

2, the light emitting area EL includes a cell driver 240 connected to the gate line GL, the data line DL and the power supply line PL, 0.0 > PL). ≪ / RTI >

The cell driver 240 includes a switch thin film transistor T1 connected to the gate line GL and the data line DL and a switch thin film transistor T3 connected between the switch thin film transistor T1 and the power line PL and the anode of the OEL cell. And a storage capacitor C connected between the power supply line PL and the drain electrode of the switch thin film transistor T1.

The gate electrode of the switch thin film transistor T1 is connected to the gate line GL, the source electrode thereof is connected to the data line DL, the drain electrode thereof is connected to the gate electrode of the driving thin film transistor T2 and the storage capacitor C, Respectively.

A source electrode of the driving thin film transistor T2 is connected to a power source line PL, and a drain electrode is connected to a pixel electrode serving as an anode of the OEL cell. The storage capacitor C is connected between the power supply line PL and the gate electrode of the driving thin film transistor T2.

The switch thin film transistor T1 is turned on when a scan pulse is supplied to the gate line GL so that a data signal supplied to the data line DL is applied to the gate of the storage capacitor C and the gate of the drive thin film transistor T2. To the electrode. The driving thin film transistor T2 controls the amount of light emitted from the OEL cell by controlling the current supplied from the power source line PL to the OEL cell in response to the data signal supplied to the gate electrode. Even if the switch thin film transistor T1 is turned off, the driving thin film transistor T2 supplies a constant current until the data signal of the next frame is supplied by the voltage charged in the storage capacitor D (C) Thereby maintaining the light emission.

In the organic light emitting display having the above structure, the upper substrate is made of an opaque material or a transparent material and is provided in an encapsulated form.

When the upper substrate is made of an opaque material, the organic light emitting display device has a structure of a back light emitting organic light emitting display device in which an image is displayed in a lower direction of a lower substrate.

In addition, when the upper substrate is made of a transparent material, the organic light emitting display device has a structure of a top emission organic light emitting display device in which an image is displayed in an upper direction of the upper substrate.

3 is a cross-sectional view of an organic light emitting display device showing region A of FIG.

3, the organic light emitting display according to an exemplary embodiment of the present invention includes a pixel display unit, a gate driver for driving the gate line, and a seal (not shown) for attaching the upper substrate 150 and the lower substrate. , 170).

The driving thin film transistor in the pixel display region includes a buffer layer 116 and a gate insulating layer 112 formed on a transparent insulating substrate 101 and a first gate electrode An interlayer insulating layer 126 is formed on the gate insulating layer 112 and a first source electrode 108 formed on the interlayer insulating layer 126 around the first gate electrode 106, And between the first source electrode 108 and the first drain electrode 110 through the first drain electrode 110 and the contact hole formed in the gate insulating layer 112 and the interlayer insulating layer 126. [ Lt; RTI ID = 0.0 > 114 < / RTI >

The first active layer 114 is formed on the insulating substrate 101 with a buffer layer 116 interposed therebetween.

The first gate electrode 106 overlaps the first channel region 114C of the first active layer 114 with the gate insulating layer 112 therebetween.

Each of the first source electrode 108 and the first drain electrode 110 includes a first source region 114S and a first drain region 114D doped with an impurity of the first active layer 114 by a contact hole, Respectively.

A planarizing layer 118 is formed on the interlayer insulating layer 126.

A pixel electrode 122 of a transparent conductive material is formed on the flat layer 118.

The pixel electrode 122 is electrically connected to the first drain electrode 110 through a contact hole passing through the planarization layer 118.

The back emission type organic light emitting display includes a bank insulating layer 130 exposing the pixel electrode 122 in the pixel region on the pixel electrode 122 and the flat layer 118, An organic light emitting layer 134 including a light emitting layer and a cathode layer 136 formed on the organic light emitting layer 134 and the bank insulating layer 130.

The organic light emitting layer 134 may include a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer stacked from the pixel electrode 122.

The light emitting layer included in the organic light emitting layer 134 emits light toward the insulating substrate 101 via the pixel electrode 122 according to the current supplied to the pixel electrode 122.

The gate driver sequentially supplies scan pulses to the gate lines. The switch thin film transistor of the gate driver is formed on the insulating substrate 101 and has a structure similar to that of the driving thin film transistor.

The switch thin film transistor of the gate driver includes a buffer layer 116 and a gate insulating layer 112 formed on a transparent insulating substrate 101 and a second gate electrode 206 A second source electrode 208 formed on the interlayer insulating layer 126 in the vicinity of the second gate electrode 206, and a second source electrode 208 formed on the gate insulating layer 112, A channel between the second source electrode 208 and the second drain electrode 210 is formed through the second drain electrode 210 and the contact hole formed in the gate insulating layer 112 and the interlayer insulating layer 126. [ Lt; RTI ID = 0.0 > 214 < / RTI >

The second active layer 214 is formed on the insulating substrate 101 with a buffer layer 116 interposed therebetween.

The second gate electrode 206 overlaps the second channel region 214C of the second active layer 214 with the gate insulating layer 112 therebetween.

Each of the second source electrode 208 and the second drain electrode 210 includes a second source region 214S and a second drain region 214D doped with the impurity of the second active layer 214 by a contact hole, Respectively.

A flat layer 118 is formed on the gate insulating layer 112.

A base power supply auxiliary electrode 123 of a transparent conductive material is formed on the flat layer 118.

The organic light emitting display includes a bank insulating layer 130 exposing a part of the base power assist electrode 123 on the base power assist electrode 123 and the flat layer 118, And a cathode layer 136 formed on the exposed base power assist electrode 123.

The organic light emitting display further includes a reflection pattern 109 overlapping the seal 170 in the seal.

The reflection pattern 109 overlaps the seal 170 and extends to the gate driver.

The reflective pattern 109 may be formed at the same time when the first and second source electrodes 108 and 208 and the first and second drain electrodes 110 and 210 are formed.

The base power supply auxiliary electrode 123 is formed on the reflection pattern 109. That is, the reflection pattern 109 is electrically connected to the base power supply assist electrode 123.

The reflection pattern 109 has a function of shortening the crystallization time of the chamber 170 by reflecting the crystallization light used in the crystallization process of the chamber 170 and has a function of a base low voltage supply line to which a base low voltage is supplied .

The upper substrate 150 is made of an opaque material and has a function of reflecting light to guide the light emitted from the organic light emitting layer 134 toward the lower side of the insulating substrate 101. That is, the organic light emitting display device according to an embodiment of the present invention has a structure of a back light emitting organic light emitting display device.

However, the present invention is not limited to this, and the upper substrate 150 may be made of a transparent material, and may be formed as a light- The structure of the top emission organic electroluminescence display device may be applied.

The organic electroluminescent display device of the present invention has a structure in which the protection layer of a general organic light emitting display device is removed and the base power supply assistant electrode 123 is formed on the reflection pattern 109, The reflection pattern 109 is not exposed to the outside.

In other words, the present invention can reduce the manufacturing time and manufacturing cost by eliminating the protective layer of a general organic light emitting display device, and also prevent the reflection pattern 109 from being exposed in the process of forming the bank insulating layer 130 The base power supply assistant electrode 123 may be formed to prevent a stain phenomenon.

4A to 4J are cross-sectional views illustrating a method of manufacturing an organic light emitting display according to an embodiment of the present invention.

Referring to FIG. 4A, a buffer layer 116 is formed on an insulating substrate 101, and an active layer 113 is formed on the buffer layer 116.

The active layer 113 may be formed by depositing amorphous silicon on the buffer layer 116, crystallizing the amorphous silicon into a polysilicon, and then subjecting the polysilicon to photolithography and etching And is formed in the pixel display portion and the gate driver respectively by patterning.

Referring to FIG. 4B, a gate insulating layer 112 is formed on the buffer layer 116 including the first and second active layers 114 and 214, and the first and second active layers 114 and 214 The first and second gate electrodes 106 and 206 are formed.

The first and second gate electrodes 106 and 206 are formed in the pixel display portion and the gate driver, respectively, by depositing an opaque metal layer and then patterning by a photolithography process and an etching process.

An n + impurity is implanted into the first and second active layers 114 and 214 using the first and second gate electrodes 106 and 206 as a mask to form a first gate electrode 106, The first source region 114S and the first drain region 114D of the active layer 114 are formed and the second source region 214S of the second active layer 214, which is not overlapped with the second gate electrode 206, And a second drain region 214D are formed. The first source and first drain regions 114S and 114D of the first active layer 114 face the channel region 114C overlapping the first gate electrode 106, The second source and drain regions 214S and 214D of the second gate electrode 214 are opposed to each other with the channel region 214C overlapping the second gate electrode 206. [

Referring to FIG. 4C, an interlayer insulating layer 126 is formed on the gate insulating layer 112, and first and second contact holes C1 (C1) passing through the interlayer insulating layer 126 and the gate insulating layer 112 are formed. , C2 are formed.

The first source and first drain regions 114S and 114D are exposed to the outside by the first contact hole C1 and the second source and drain regions 214S and 214D are exposed to the outside by the second contact hole C2. 214D are exposed to the outside.

In the first and second contact holes C1 and C2, an inorganic insulating material is deposited on the gate insulating layer 112 and patterned by a photolithography process and an etching process to form first and second contact holes C1 and C2 on the pixel display portion and the gate driver, An interlayer insulating layer 126 including contact holes C1 and C2 may be formed.

Referring to FIG. 4D, first and second source electrodes 108 and 208, first and second drain electrodes 110 and 210, and a reflection pattern 109 are formed on the interlayer insulating layer 126 do.

The first and second source electrodes 108 and 208 and the first and second drain electrodes 110 and 210 and the reflection pattern 109 are formed by forming an opaque metal layer on the interlayer insulating layer 126, A first source electrode 108 and a first drain electrode 110 are formed in the pixel display unit and a second source electrode 208 and a second drain electrode 210 are formed in the gate driver unit by patterning using a photolithography process and an etching process. And a reflection pattern 109 is formed on the seal portion. Here, the reflection pattern 109 may extend from the seal portion to the gate driver region.

4E, a planarizing layer 118 is formed on the interlayer insulating layer 126 including the first and second source electrodes 108 and 208 and the first and second drain electrodes 110 and 210, . Here, the flat layer 118 is not formed on the reflection pattern 109 of the real part.

The planarizing layer 118 may be patterned by a photolithography process and an etching process to form a contact hole exposing the first drain electrode 110 to the outside.

Referring to FIG. 4F, a transparent metal layer is deposited on the planarizing layer 118 and the reflective pattern 109, and patterned by a photolithography process and an etching process, thereby electrically connecting the first drain electrode 110 to the pixel display portion And a base power source assistant electrode 123 connected to the reflection pattern 109 is formed in the gate driver and the seal section.

Referring to FIG. 4G, the bank insulating layer 130 is formed on the flat layer 118 including the pixel electrode 122 and the base power assist electrode 123.

The bank insulating layer 130 is patterned by a photolithography process and an etching process so that the pixel electrode 122 is exposed to the outside and a part of the base power source assist electrode 123 of the gate driver is exposed to the outside.

In the process of forming the bank insulating layer 130, the reflection pattern 109 of the present invention is not exposed from the outside by the base power source assist electrode 123, The phenomenon can be prevented.

4H and 4I, an organic light emitting layer 134 is formed on the pixel electrode 122 and a bank insulating layer 130 including the organic light emitting layer 134 and the exposed base power assist electrode 123 is formed. A cathode layer 136 is formed through a photolithography process and an etching process.

Referring to FIG. 4J, the upper substrate 150 is bonded to the lower substrate by the seal 170.

Here, light for light purifying is irradiated to the chamber 170 for crystallization of the chamber 170, and the reflection pattern 109 reflects the light for crystallization, thereby shortening the crystallization time of the chamber 170.

The organic electroluminescent display device of the present invention has a structure in which the protection layer of a general organic light emitting display device is removed and the base power supply assistant electrode 123 is formed on the reflection pattern 109, The reflection pattern 109 is not exposed to the outside.

In other words, the present invention can reduce the manufacturing time and manufacturing cost by eliminating the protective layer of a general organic light emitting display device, and also prevent the reflection pattern 109 from being exposed in the process of forming the bank insulating layer 130 The base power supply assistant electrode 123 may be formed to prevent a stain phenomenon.

5 is a cross-sectional view illustrating an organic light emitting display according to another embodiment of the present invention.

As shown in FIG. 5, the organic light emitting display according to another embodiment of the present invention includes a base power supply auxiliary electrode (123 of FIG. 3) The same reference numerals are given to the organic light emitting display according to one embodiment of the present invention, and detailed description thereof will be omitted.

The reflective pattern 209 according to another embodiment of the present invention may be formed at the same time when the first and second gate electrodes 106 and 206 are formed.

That is, an interlayer insulating layer 126 is formed on the reflection pattern 209.

The organic electroluminescent display device of the present invention is formed by deleting the protective layer of a general organic light emitting display device and simultaneously forming the reflection pattern 209 at the time of forming the first and second gate electrodes 106 and 206, The reflective pattern 209 is not exposed to the outside by the interlayer insulating layer 126 when the layer 130 is formed.

In other words, the present invention can reduce manufacturing time and manufacturing cost by eliminating the protective layer of a general organic light emitting display device, and in addition, in the process of forming the bank insulating layer 130, Is formed simultaneously with the formation of the second gate electrodes 106 and 206 and is not exposed to the outside by the interlayer insulating layer 126, thereby preventing a stain phenomenon.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

126: interlayer insulating layer 118: flat layer
109, 209: reflection pattern 123: base power supply auxiliary electrode

Claims (18)

A lower substrate including a pixel display portion, a gate driver, and a seal portion;
A driving thin film transistor formed on a pixel display portion of the lower substrate;
A switch thin film transistor formed in the gate driver;
A flat layer formed on the driving thin film transistor and the switch thin film transistor;
A reflection pattern formed simultaneously in forming the source / drain electrodes of the drive thin film transistor and the switch thin film transistor in the seal portion;
A base power auxiliary electrode formed on the flat layer and the reflection pattern; And
And a bank insulating layer formed on the base power supply auxiliary electrode,
Wherein a seal for attaching the upper substrate and the lower substrate is formed in the seal portion and the base power assist electrode is disposed between the seal and the reflection pattern. The method according to claim 1,
Wherein the reflective pattern extends from the seal portion to the gate driver region. The method according to claim 1,
And a pixel electrode formed on the pixel display unit at the same time when the base power supply auxiliary electrode is formed. The method according to claim 1,
Wherein the reflective pattern is in contact with the base power assist electrode and the base power assist electrode is in contact with the bank insulation layer. delete A lower substrate including a pixel display portion, a gate driver, and a seal portion;
A driving thin film transistor formed on a pixel display portion of the lower substrate;
A switch thin film transistor formed in the gate driver;
A flat layer formed on the driving thin film transistor and the switch thin film transistor;
A reflection pattern formed simultaneously in forming the gate electrode of the drive thin film transistor and the switch thin film transistor in the seal portion;
The gate electrode of the pixel display section and the gate driving section is formed on the gate insulating layer, and the gate insulating layer and the interlayer insulating layer formed on the reflection pattern; And
And a bank insulating layer formed on the interlayer insulating layer of the pixel display portion and the gate driver,
Wherein a seal for attaching the upper substrate and the lower substrate is formed in the seal part and the interlayer insulating layer is disposed between the seal and the reflection pattern. The method according to claim 6,
Wherein the reflective pattern extends from the seal portion to the gate driver region. The method according to claim 6,
And source / drain electrodes formed on the interlayer insulating layer in the pixel display unit and the gate driver. delete Forming a buffer layer and a gate insulating layer on a lower substrate divided into a pixel display portion, a gate driver portion, and a seal portion;
Forming first and second gate electrodes on the gate insulating layer;
Forming an interlayer insulating layer on the gate insulating layer including the first and second gate electrodes;
Forming first and second source electrodes, first and second drain electrodes and a reflection pattern on the interlayer insulating layer;
Forming a flat layer on the first and second source electrodes and the first and second drain electrodes;
A pixel electrode connected to the first drain electrode on the flat layer, and a base power supply auxiliary electrode covering the reflection pattern; And
And forming a bank insulating layer on the planarizing layer and the base power supply assisted electrode,
Wherein a seal for attaching the upper substrate and the lower substrate is formed on the seal part and the base power assist electrode is disposed between the seal and the reflection pattern. 11. The method of claim 10,
Wherein the reflective pattern extends from the seal portion to the gate driver region. 11. The method of claim 10,
Wherein the reflective pattern is in contact with the base power assist electrode and the base power assist electrode is in contact with the bank insulation layer. delete Forming a buffer layer and a gate insulating layer on a lower substrate divided into a pixel display portion, a gate driver portion, and a seal portion;
Forming first and second gate electrodes on the gate insulating layer of the real part, on the gate insulating layer of the pixel display part and the gate driver;
Forming an interlayer insulating layer on the gate insulating layer including the reflection pattern and the first and second gate electrodes;
Forming first and second source electrodes and first and second drain electrodes on the interlayer insulating layer of the pixel display unit and the gate driver;
Forming a flat layer on the first and second source electrodes and the first and second drain electrodes;
Forming a pixel electrode connected to the first drain electrode on the flat layer; And
And forming a bank insulating layer on the flat layer,
Wherein a seal for attaching the upper substrate and the lower substrate is formed on the seal part and the interlayer insulating layer is disposed between the seal and the reflection pattern. 15. The method of claim 14,
Wherein the reflective pattern extends from the seal portion to the gate driver region. delete A lower substrate including a pixel display portion, a gate driver, and a seal portion;
A driving thin film transistor formed on a pixel display portion of the lower substrate;
A switch thin film transistor formed in the gate driver;
A flat layer formed on the driving thin film transistor and the switch thin film transistor;
A reflection pattern formed on the seal portion;
A base power auxiliary electrode formed on the flat layer and the reflection pattern; And
And a bank insulating layer formed on the base power supply auxiliary electrode,
Wherein a seal is formed on the seal portion and the base power supply auxiliary electrode is disposed between the seal and the reflection pattern. A lower substrate including a pixel display portion, a gate driver, and a seal portion;
A driving thin film transistor formed on a pixel display portion of the lower substrate;
A switch thin film transistor formed in the gate driver;
A flat layer formed on the driving thin film transistor and the switch thin film transistor;
A reflection pattern formed on the seal portion;
A gate insulating layer on the gate electrode of the pixel display unit and the gate driver;
An interlayer insulating layer formed on the gate insulating layer and the reflection pattern; And
And a bank insulating layer formed on the interlayer insulating layer of the pixel display portion and the gate driver,
Wherein a seal is formed in the seal portion, and the interlayer insulating layer is disposed between the seal and the reflection pattern.

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