KR101762175B1 - Nano rod light emitting device and method of manufacturing the same - Google Patents

Abstract

A light emitting device and a manufacturing method thereof are disclosed. The disclosed light emitting device includes a mask layer having a through hole; And a second region grown on the mask layer through the through hole and sequentially arranged along the growth direction, the first region having a relatively narrow horizontal cross-sectional area and the second region having a relatively large horizontal cross- 1 type doped semiconductor nanocore; An active layer formed to surround the surface of the semiconductor nanocore; A second semiconductor layer formed to surround the surface of the active layer and doped with a second type; And a first electrode and a second electrode electrically connected to the semiconductor nanocore and the second semiconductor layer, respectively.

Description

TECHNICAL FIELD The present invention relates to a light emitting device and a method of manufacturing the same,

This disclosure relates to a light emitting device and a method of manufacturing the same.

A light emitting device (LED) refers to a semiconductor device that can emit light of various colors by forming a light emitting source through a PN junction of a compound semiconductor. In recent years, blue LEDs and ultraviolet LEDs realized using nitrides excellent in physical and chemical properties have appeared, and since blue or ultraviolet LEDs and fluorescent materials can be used to form white light or other monochromatic light, ought.

 The basic operation principle of the light emitting device is that electrons and holes injected into the active layer combine to emit light. However, in a nitride-based compound semiconductor crystal, many crystal defects generally exist, and when electrons and holes are coupled through the crystal defects, they are emitted as heat energy instead of light energy. Reducing such non-luminescent recombination is important for improving the luminous efficiency of the semiconductor light emitting device.

The crystal defects responsible for the non-luminescent recombination are caused by the lattice constant mismatch between the growth substrate and the compound semiconductor, the difference in the thermal expansion coefficient, and the like. In order to overcome such disadvantages, a technique for forming a nanoscale light emitting structure having a nanorod shape has been studied. Such a structure is known to be capable of large area growth easily on a heterogeneous substrate because it is less affected by the difference in lattice constant and thermal expansion coefficient from the substrate in the case of one-dimensional growth.

Recently, a nano-rod structure in the form of a core / shell has been proposed. One advantage of this structure is that it minimizes the first crystal defect. A typical planar thin film light emitting device has two types of crystal defects. One is a mismatch dislocation formed due to the lattice mismatch between the quantum well layer made of InGaN and the quantum barrier layer made of GaN. In this case, the dislocations are parallel to the growth plane. And the other is a threading dislocation which is formed at the interface between sapphire and gallium nitride and reaches the light emitting layer as the structure of the light emitting device becomes longer in the growth direction during growth. In the nano-rod structure, since the GaN layer can be deformed in the horizontal direction, formation of lattice mismatch dislocation can be reduced as compared with a general planar thin-film light-emitting device. In addition, since the area occupied on the substrate is small, there is a high possibility that only a part of the threading potential is propagated to the active layer, and even if a potential is formed, it moves and disappears to a near surface. Secondly, the active layer is formed along the surface of the core in the form of a shell layer to increase the light emitting surface area and reduce the actual current density, thereby improving the light efficiency.

This disclosure discloses a nano-rod light-emitting device having a structure capable of reducing the leakage current and increasing the luminous efficiency and a manufacturing method thereof.

A light emitting device according to one type includes: a mask layer having a through hole; And a second region grown on the mask layer through the through hole and sequentially arranged along the growth direction, the first region having a relatively narrow horizontal cross-sectional area and the second region having a relatively large horizontal cross- 1 type doped semiconductor nanocore; An active layer formed to surround the surface of the semiconductor nanocore; A second semiconductor layer formed to surround the surface of the active layer and doped with a second type; And a first electrode and a second electrode electrically connected to the semiconductor nanocore and the second semiconductor layer, respectively.

The active layer thickness of the portion surrounding the first region may be smaller than the active layer thickness of the portion surrounding the second region.

The height of the first region from the surface of the mask layer in the vertical direction may be approximately 1 nm or more and 1000 nm or less.

The mask layer may include at least one of SiO ₂ , SiN, TiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , TiN, AlN, ZrO ₂ , TiAlN, and TiSiN.

The horizontal cross-sectional shape of the semiconductor nanocore may be circular, elliptical or polygonal.

An electron blocking layer may further be provided between the active layer and the second semiconductor layer.

The transparent electrode layer may further include a transparent electrode layer covering the second semiconductor layer. The second electrode may be provided on the transparent electrode layer, and an insulating layer may be further provided between the transparent electrode layer and the mask layer.

A first semiconductor layer doped with a first type may be further provided on a lower surface of the mask layer, and the first electrode may be provided on an upper surface of the first semiconductor layer. In this case, A reflective metal layer may be provided.

Alternatively, the first electrode may be provided on the lower surface of the mask layer. In this case, the first electrode may be formed of a reflective metal material.

The second electrode is made of a reflective metal material and covers the entire surface of the second semiconductor layer. The first electrode is made of a transparent electrode material, and may be provided on a lower surface of the mask layer.

According to one aspect of the present invention, there is provided a method of manufacturing a semiconductor device, which is sequentially disposed on a substrate along a growth direction, the method comprising: forming a first region in which an area of a cross section perpendicular to the growth direction is relatively narrow, Forming a semiconductor nanocrystal having a second region and doped with a first type; Forming an active layer on a surface of the semiconductor nanocore; And forming a second semiconductor layer doped with a second type on the surface of the active layer.

The forming of the semiconductor nanocore may include forming a first semiconductor layer doped with a first type on the substrate; Sequentially forming a first mask layer and a second mask layer made of an insulating material on the first semiconductor layer and forming through holes passing through the first mask layer and the second mask layer; Growing the semiconductor nanocrystals from the first semiconductor layer through the through holes; And removing the second mask layer.

The first mask layer and the second mask layer may be formed of a material having a physical or chemical selectivity ratio to each other. For example, the first mask layer may be made of SiN and the second mask layer may be made of SiO ₂ . In which case the second layer can be removed using an HF solution as the etchant.

According to the light emitting device and the manufacturing method described above, a light emitting device is provided in which a section of a predetermined region under the light emitting nano-rods is narrower than other regions, thereby reducing a leakage current that may occur in the vicinity of the mask layer , The light efficiency can be increased.

1 shows a schematic configuration of a light emitting device according to an embodiment of the present invention.
2 is an enlarged view showing a more detailed structure of a light emitting nano rod of the light emitting device of Fig.
Fig. 3 shows the structure of the light emitting nano rod of the comparative example for comparison with Fig.
4 shows a schematic configuration of a light emitting device according to another embodiment.
FIG. 5 shows a schematic structure of a light emitting device according to another embodiment.
6A to 6E are views illustrating a method of manufacturing a light emitting device according to an embodiment.
Description of the Related Art [0002]
100, 200, 300 ... light emitting device 110 ... substrate
120 ... first semiconductor layer 130 ... mask layer
131 ... first mask layer 132 ... second mask layer
140 ... light emitting nano rod 142 ... semiconductor nano core
144 ... active layer 146 ... second semiconductor layer
160 ... transparent electrode layers 170, 174 ... second electrode
180, 182, 184 ... first electrode 190 ... reflective electrode layer

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the drawings, like reference numerals refer to like elements, and the size and thickness of each element may be exaggerated for clarity of explanation.

FIG. 1 is a schematic view of a light emitting device according to an embodiment of the present invention, and FIG. 2 is an enlarged view showing a more detailed configuration of a light emitting nano rod of the light emitting device of FIG.

Referring to the drawings, the light emitting device 100 includes a light emitting nano rod 140, and the light emitting nano rod 140 includes a semiconductor nanocryst 142 doped with a first type and a surface of the semiconductor nanocore 142 And a second semiconductor layer 148 that surrounds the surface of the active layer 146 and is doped with a second type. The semiconductor nanocore 142 has a first region R1 in which the area of the horizontal section is relatively narrow and a second region R2 in which the area of the horizontal section is relatively large in order in accordance with the growth direction.

The more specific configuration is as follows.

The substrate 110 may be a silicon (Si) substrate, a silicon carbide (SiC) substrate, a sapphire substrate, or the like as a growth substrate for semiconductor single crystal growth. In addition, A substrate made of ZnO, GaAs, MgAl ₂ O ₄ , MgO, LiAlO ₂ , LiGaO ₂ , or GaN may be used as a material suitable for growth of one semiconductor layer 120.

A mask layer 130 having a plurality of through holes is provided on a substrate 110. Mask layer 130 is an insulating material, may be made, including silicon oxide or silicon nitride, _{e.g., SiO 2, SiN, TiO 2} , Si 3 N 4, Al 2 O 3, TiN, AlN, ZrO 2 , TiAlN, TiSiN, or the like. The mask layer 130 may be formed by forming a film of such an insulating material on the first semiconductor layer 120 and then etching the desired through-hole pattern by a lithography process. The through-hole may have a cross-sectional shape such as a circle, an ellipse, or a polygon.

A first semiconductor layer 120 doped with a first type may be further formed between the substrate 110 and the mask layer 130. The first semiconductor layer 120 may be a semiconductor layer doped with a first type and may be formed of a III-V group nitride semiconductor material, for example, an Al _x Ga _y In _z N (x + y + z = 1) (0 = x = 1, 0 = y = 1, 0 = z = 1, x + y + z = 1). As n-type impurities, Si, Ge, Se, Te and the like can be used.

Although not shown, a buffer layer may be formed between the substrate 110 and the first semiconductor layer 120 for epitaxial growth, if necessary, and the first semiconductor layer 120 may have a multi-layer structure It is possible. The first semiconductor layer 120 may be omitted in some cases.

The semiconductor nanocore 142 is made of a semiconductor material doped with the same first type as that of the first semiconductor layer 120. For example, n-Al _x Ga _y In _z N (0 = x = 1, 0 = y = 1, 0 = z = 1, x + y + z = 1). The semiconductor nanocrystals 142 are vertically grown from the first semiconductor layer 120 through the through-holes formed in the mark layer 130 and have a cross-sectional shape such as a circle, an ellipse, or a polygon along the cross- do.

The region of the semiconductor nanocore 142 is divided into a first region R1 having a relatively narrow cross-section perpendicular to the growth direction and a second region R1 having a relatively large cross- (R2). Concretely, the first region R 1 has a relatively narrow cross-sectional area to a predetermined height beyond the through-hole, and the second region R 2 has a relatively large cross-sectional width. In this embodiment, the semiconductor nanocore 142 is formed in such a shape that when the active layer 146 and the second semiconductor layer 148 are sequentially formed on the surface of the semiconductor nanocore 142, The thickness of the active layer 146 adjacent to the second semiconductor layer 148 is reduced and the area of the second semiconductor layer 148 in contact with the mask layer 130 is reduced. The operation and effect of such a configuration will be described later with reference to a comparative example of Fig. The height from the surface of the mask layer 130 to the first region R1 is set such that the thickness of the active layer 146 surrounding the surface of the first region R1 is smaller than the thickness of the active layer 146 surrounding the second region R2. Is appropriately determined in a range in which it is formed to be thinner than the thickness, and may be about 1 nm or more and 1000 nm or less.

In the drawing, the second region R2 is shown to have a constant sectional width to the top of the semiconductor nanocore 142, but this is exemplary and the shape of the top tip portion may be variously modified depending on the manufacturing process. For example, the shape of the tip portion of the semiconductor nanocore 142 may be a horn shape or a truncated cone shape that becomes narrower toward the upper side.

The active layer 146 is a layer that emits light by electron-hole recombination. The active layer 146 is a single quantum well (Al _x Ga _y In _z N) layer in which band intervals are varied by periodically changing x, y, ) Or a multi quantum well structure. For example, the quantum well layer and the barrier layer may form a quantum well structure in the form of InGaN / GaN, InGaN / InGaN, InGaN / AlGaN or InGaN / InAlGaN, The gap energy can be controlled and the emission wavelength band can be adjusted. Normally, when the mole fraction of In changes by 1%, the emission wavelength is shifted by about 5 nm. The active layer 146 is radially grown from the semiconductor nanocore 142 and surrounds the surface of the semiconductor nanocore 142. The thickness of the portion surrounding the first region R1 of the semiconductor nanocore 142 Is formed to be thinner than the thickness of the portion surrounding the second region R2.

The second semiconductor layer 148 is formed so as to cover the surface of the active layer 146. The second semiconductor layer 148 may be made of p-Al _x Ga _y In _z N (0 = x = 1, 0 = y = 1, 0 = z = 1, x + y + z = Type impurities may be Mg, Zn, Be, and the like.

Although not shown, an additional electron blocking layer may be provided between the second semiconductor layer 148 and the active layer 146, if necessary.

The first electrode 180 and the second electrode 170 are electrically connected to the first semiconductor layer 120 and the second semiconductor layer 148 to apply a voltage for electron injection and hole injection to the active layer 146, . The first electrode 180 may be formed on the first semiconductor layer 120. The second electrode 170 may be provided on the transparent electrode layer 160 covering the plurality of light emitting nano-rods 140. The transparent electrode layer 160 serves as a path for supplying a current to the light emitting nano-rod 140 and is formed of a transparent conductive oxide (TCO) so as to transmit light emitted from the light emitting nano- . For example, ITO (Indium Tin Oxide), AZO (Aluminum Zinc Oxide), IZO (Indium Zinc Oxide), or the like.

Although not shown, an insulating layer may be further provided between the mask layer 130 and the transparent electrode layer 160, and the thickness of the insulating layer to be inserted may be properly determined for an efficient current path.

A reflective electrode layer 190 may be further formed on the lower surface of the substrate 110. The reflective electrode layer 190 reflects light emitted from the light emitting nano-rod 140 upward. Since the light generated in the active layer 146 of the light emitting nano-rod 140 is spontaneous emission, there is no particular directionality and the light is directed in all directions. Of these, the light directed downward is reflected upward, as shown in Fig. The reflective electrode layer 190 may include a reflective metal such as silver (Ag), aluminum (Al), or an alloy containing silver or aluminum.

Referring to FIG. 3 together with FIG. 2, the operation of reducing the leakage current by the shape of the light emitting nano-rod 140 of the embodiment will be described. FIG. 3 shows the configuration of the light emitting nano-rod 140 'as a comparative example and the configuration of FIG.

The light emitting nano-rods 140 'of the comparative example include the semiconductor nanocrystals 142' grown through the through-holes from the first semiconductor layer 120 and the active layers 146 'sequentially formed on the surfaces of the semiconductor nanocores 142' And a second semiconductor layer 148 '. In the comparative example, the cross-sectional width of the semiconductor nanocore 148 'is formed to be somewhat wider than the width of the through hole of the mask layer 130, and on the mask layer 130, the semiconductor nanocore 148' ) Have a certain width. In addition, the thickness of the active layer 146 'formed on the surface of the semiconductor nanocore 142' and the thickness of the second semiconductor layer 148 'formed on the surface of the active layer 146' are uniformly formed as a whole. In this structure, a part of the current path may leak from the second semiconductor layer 148 'to the mask layer 130. [ This phenomenon may occur at a portion where the second semiconductor layer 148 'is adjacent to the mask layer 130, and the amount of current leaked may be increased depending on the surface state of the mask layer 130. In this way, the light efficiency is lowered by the leakage current without contributing to the electron and hole coupling in the active layer 148 '.

In this embodiment, the semiconductor nanocore 142 is provided with a first region R1 having a relatively narrow cross-section width of a portion adjacent to the mask layer 130 and a second region R2 having a relatively large cross-sectional width The active layer 146 and the second semiconductor layer 148 are thinly formed on the surface of the first region R 1 by forming a stepped shape on the surface of the semiconductor nanocore 142. This structure is intended to reduce current leakage from the second semiconductor layer 148 to the mask layer 130. [ By this step shape, gas which is a supply source for forming the active layer 146 and the second semiconductor layer 148 can not be supplied smoothly in a narrow region between the mask layer 130 and the stepped shape. Therefore, the thickness d1 of the active layer 148 formed on the surface of the first region R1 is made thinner than the thickness d1 'of the active layer 146' formed on the surface of the semiconductor nanocore 142 'of the comparative example, The thickness d2 of the semiconductor layer 148 is also thinner than the thickness d2 'of the second semiconductor layer 148' of the comparative example. In this structure, when a current path is formed from a portion of the second semiconductor layer 148 adjacent to the mask layer 130, a path having a relatively lower resistance is formed than the side of the mask layer 130 having a high resistance path A current bottleneck phenomenon occurs in the active layer 146 and the amount of leakage current to the mask layer 130 is reduced.

4 shows a schematic configuration of a light emitting device 200 according to another embodiment. The present embodiment is different from the light emitting device 100 of FIG. 1 in the position of the first electrode 182. The substrate (110 in FIG. 1) used as a semiconductor growth substrate is removed, and the first electrode 182 is formed on the lower surface of the first semiconductor layer 120. If the substrate 110 (FIG. 1) is a conductive substrate, it is also possible to form the first electrode 182 on the lower surface of the substrate 110 (FIG. 1). The first electrode 182 may also be formed of a reflective metallic material so that the light generated by the light emitting nano-rod 140 may be reflected back toward the front surface.

FIG. 5 shows a schematic configuration of a light emitting device 300 according to another embodiment. The present embodiment differs from the light emitting device 100 of FIG. 1 and the light emitting device 200 of FIG. 4 in that the light emitting direction is a back surface. The second electrode 174 is formed of a reflective metallic material and surrounds the surface of the light emitting nano-rod 140. The first electrode 184 is made of a transparent electrode material and is provided on the lower surface of the first semiconductor layer 120. Accordingly, the light generated by the light emitting nano-rod 140 is reflected from the surface of the light-emitting nano-rod 140 and is directed toward the rear side.

6A to 6E are views illustrating a method of manufacturing a light emitting device according to an embodiment.

 Referring to FIG. 6A, a first mask layer 131 and a second mask layer 132 are formed on a substrate 110. A first mask layer 131 and a second mask layer 132 are formed between the substrate 110 and the first mask layer 131, The semiconductor layer 120 may be further formed. The first semiconductor layer 120 may be omitted in some cases.

As the substrate 110, a substrate made of a silicon (Si) substrate, a silicon carbide (SiC) substrate, a sapphire substrate, or a substrate made of ZnO, GaAs, MgAl ₂ O ₄ , MgO, LiAlO ₂ , LiGaO ₂ , .

The first semiconductor layer 120 may be a semiconductor layer doped with a first type and may be formed of a III-V group nitride semiconductor material, for example, an Al _x Ga _y In _z N (x + y + z = 1) (0 = x = 1, 0 = y = 1, 0 = z = 1, x + y + z = 1). As n-type impurities, Si, Ge, Se, Te and the like can be used. The first semiconductor layer 120 may include at least one selected from the group consisting of hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), metal organic vapor phase epitaxy (MOVPE) A metal organic chemical vapor deposition (MOCVD) method or the like.

The first mask layer 131 and the second mask layer 132 may be formed of an insulating material such as silicon oxide or silicon nitride. For example, the first mask layer 131 and the second mask layer 132 may be formed of SiO ₂ , SiN, TiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , TiN, AlN, ZrO ₂ , TiAlN, and TiSiN. The first mask layer 131 and the second mask layer 132 may be formed of a material having a physical or chemical selectivity between the first and second mask layers 131 and 132. As described later, This is for ease of removal. For example, the first mask layer 131 may be formed of SiN and the second mask layer 132 may be formed of SiO ₂ . The thicknesses of the first mask layer 131 and the second mask layer 132 may be about 1 nm or more and 1000 nm or less, respectively. Further, if necessary, it may have a structure of plural layers, and two or three or more materials may be alternately arranged to form a plurality of layers.

Next, as shown in FIG. 6B, a through hole is formed through the first mask layer 131 and the second mask layer 132 to expose the first semiconductor layer 120. The through-hole may have a cross-sectional shape such as a circle, an ellipse, or a polygon, and is patterned and etched into a desired through-hole shape by a photolithography process.

Next, as shown in FIG. 6C, the semiconductor nanocrystals 142 are formed from the first semiconductor layer 120 through the through-holes. In this case, the width of the semiconductor nanocrystals 142 grown over the through-holes is somewhat wider than the width of the through-holes. Accordingly, the semiconductor nanocrystals 142 have a first region (R1) and a second region (R2) having a relatively large cross-sectional width grown over the through-hole.

Next, as shown in FIG. 6D, the second mask layer 132 is removed. An etchant suitable for the material of the first mask layer 131 and the second mask layer 132 may be used so that only the second mask layer 132 can be selectively removed. When the first mask layer 131 is made of SiN and the second mask layer 132 is made of SiO ₂ , only the second mask layer 132 can be selectively removed by wet etching using the HF solution as an etchant . However, the present invention is not limited thereto, and it is also possible to use a dry etching process.

Next, as shown in FIG. 6E, the active layer 146 and the second semiconductor layer 148 are sequentially formed on the surface of the semiconductor nanocore 142. The active layer 146 is a single quantum well structure or a multi quantum well structure in which band intervals are controlled by periodically changing x, y, and z values in Al _x Ga _y In _z N Lt; / RTI > The second semiconductor layer 148 may be made of p-Al _x Ga _y In _z N (0 = x = 1, 0 = y = 1, 0 = z = 1, x + y + z = Type impurities may be Mg, Zn, Be, and the like.

6D, the active layer 146 and the second semiconductor layer 148 are formed in a narrow space between the first mask layer 131 and the stepped portion, as a stepped shape is formed on the side surface of the semiconductor nanocore 142. [ The active layer 146 and the second semiconductor layer 148 are formed on the surface of the first region R1 with a relatively small thickness. The degree of the thickness of the active layer 146 surrounding the surface of the first region R1 is formed thinner than the thickness of the active layer 146 surrounding the second region R2, The thickness of the second mask layer 132 should be appropriately determined in the step of FIG. 6A in consideration of the size of the narrow space between the stepped shapes.

Next, although not shown, a step of forming an electrode structure necessary for electron hole injection into the active layer 142 is further performed. According to this process, a light emitting device capable of increasing the light efficiency by reducing the leakage current that may occur on the surface adjacent to the mask layer is manufactured.

The semiconductor nanocore 142 has the first region R1 and the second region R2 that are relatively narrow in section width in the order of the growth direction and the second region R2 that is relatively wider and the region surrounding the first region R1 The light emitting device having various structures using the light emitting nano rod 140 having a structure in which the thickness of the active layer 146 and the second semiconductor layer 148 are thin is described. For example, the electrode structure, the insulating layer structure, the specific shape of the tip portion, and the like can be variously modified. Although the first type is an n-type and the second type is a p-type, they are mutually interchangeable.

Although the light emitting device and the method of manufacturing the same of the present invention have been described with reference to the embodiments shown in the drawings for the sake of understanding, those skilled in the art will appreciate that various modifications and equivalents may be made thereto by those skilled in the art. It will be appreciated that embodiments are possible. Accordingly, the true scope of the present invention should be determined by the appended claims.

Claims (20)

A mask layer having a through hole;
And a second region grown on the mask layer through the through hole and having a first region in which an area of a horizontal cross section is relatively narrow and a second region having a relatively large area in a horizontal cross- A semiconductor nanocrystal doped with a first type;
An active layer formed to surround the surface of the semiconductor nanocore;
A second semiconductor layer formed to surround the surface of the active layer and doped with a second type;
And a first electrode and a second electrode electrically connected to the semiconductor nanocore and the second semiconductor layer, respectively,
Wherein the stepped shape formed on a side surface of the semiconductor nanocore is vertically spaced from the mask layer. The method according to claim 1,
The active layer portion on the side surface of the semiconductor nanocore is formed to have a step,
The portion of the second semiconductor layer on the side surface of the semiconductor nanocore is formed to have a step,
Wherein the thickness of the active layer in the portion surrounding the first region is thinner than the thickness of the active layer in the portion surrounding the second region. The method according to claim 1,
Wherein a height in the vertical direction of the first region from the surface of the mask layer is not less than 1 nm and not more than 1000 nm. delete delete The method according to claim 1,
And an electron blocking layer is further provided between the active layer and the second semiconductor layer. The method according to any one of claims 1 to 3 and 6,
And a transparent electrode layer covering the second semiconductor layer,
And the second electrode is provided on the transparent electrode layer. 8. The method of claim 7,
And an insulating layer is further provided between the transparent electrode layer and the mask layer. 8. The method of claim 7,
A first semiconductor layer doped with a first type is further provided on a lower surface of the mask layer,
Wherein the first electrode is provided in one region of the upper surface of the first semiconductor layer. delete 8. The method of claim 7,
Wherein the first electrode is provided on a lower surface of the mask layer. delete The method according to any one of claims 1 to 3 and 6,
Wherein the second electrode is made of a reflective metal material and is provided so as to cover the entire surface of the second semiconductor layer,
Wherein the first electrode is made of a transparent electrode material and is provided on a lower surface of the mask layer.
A first region having a relatively narrow horizontal cross-section area and a second region having a relatively large horizontal cross-sectional area, sequentially on the substrate in a growth direction, and forming a semiconductor nano-core doped with the first type step;
Forming an active layer on a surface of the semiconductor nanocore; And
And forming a second semiconductor layer doped with a second type on the surface of the active layer,
The step of forming the semiconductor nanocore may include:
Forming a first semiconductor layer doped with a first type on the substrate;
Sequentially forming a first mask layer and a second mask layer made of an insulating material on the first semiconductor layer and forming through holes passing through the first mask layer and the second mask layer;
Growing the semiconductor nanocrystals from the first semiconductor layer through the through holes; And
And removing the second mask layer.


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