KR101729699B1 - Method for fabricating silicon on insulator substrate - Google Patents

Method for fabricating silicon on insulator substrate Download PDF

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Publication number
KR101729699B1
KR101729699B1 KR1020150089740A KR20150089740A KR101729699B1 KR 101729699 B1 KR101729699 B1 KR 101729699B1 KR 1020150089740 A KR1020150089740 A KR 1020150089740A KR 20150089740 A KR20150089740 A KR 20150089740A KR 101729699 B1 KR101729699 B1 KR 101729699B1
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South Korea
Prior art keywords
groove pattern
substrate
layer
insulating layer
forming
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KR1020150089740A
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Korean (ko)
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KR20170000607A (en
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김기철
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김기철
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2051—Exposure without an original mask, e.g. using a programmed deflection of a point source, by scanning, by drawing with a light beam, using an addressed light or corpuscular source
    • G03F7/2059—Exposure without an original mask, e.g. using a programmed deflection of a point source, by scanning, by drawing with a light beam, using an addressed light or corpuscular source using a scanning corpuscular radiation beam, e.g. an electron beam
    • G03F7/2063—Exposure without an original mask, e.g. using a programmed deflection of a point source, by scanning, by drawing with a light beam, using an addressed light or corpuscular source using a scanning corpuscular radiation beam, e.g. an electron beam for the production of exposure masks or reticles
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11803—Masterslice integrated circuits using field effect technology
    • H01L27/11807—CMOS gate arrays
    • H01L2027/11809—Microarchitecture
    • H01L2027/11851—Technology used, i.e. design rules
    • H01L2027/11857—SOS, SOI technology

Abstract

An SOI substrate forming method related to the present invention includes: etching a silicon substrate to form a first groove pattern; Forming a first insulating layer on a bottom surface of the first groove pattern; Growing a substrate filled with the first groove pattern from the side surface of the first groove pattern by epitaxy to fill the first groove pattern so that the first insulating layer is embedded; Etching a region around the first groove pattern to form a second groove pattern; Forming a second insulating layer on a bottom surface of the second groove pattern; And growing a substrate filled with the first groove pattern from the side surface of the second groove pattern to fill the second groove pattern so that the second insulating layer is embedded.

Description

METHOD FOR FABRICATING SILICON ON INSULATOR SUBSTRATE [0002]

The present invention relates to a method for forming an SOI substrate.

A silicon on insulator (SOI) substrate is a kind of processed wafer, which is formed by forming an insulating layer on a silicon substrate and forming a silicon layer on the insulating layer. The insulating layer may remove the influence of the element operating region from the substrate between the silicon layer (substrate) and the silicon layer of the transistor region which is the element operating region. As a result, it has been attracting attention as a semiconductor material because of its advantage of being able to greatly improve the efficiency and characteristics, and making it easy to produce a high-power, high-density memory product of low power and high speed required for various industries and mobile devices.

As a fabrication technique of SOI substrate, there are SIMOX (Separation by Implanted Oxygen) method by heat treatment after oxygen ion implantation, Bond and Etch back SOI (BESOI) method in which a silicon wafer on which an oxide film is grown is directly bonded, (ZMR) method, a solid phase epitaxial method, a transverse epitaxial method, an epitaxial process on porous silicon, and an ELTRAN (epitaxial Layer TRANsfer technology, FIPOS (Full Isolation by Porous Oxidized Silicon), and Smart Cut TM , which allows bonded wafers to be separated through an ion-implanted region without being polished.

However, due to the abundance of abandoned portions due to these techniques, the production yield is low and their special facilities are used. Therefore, there is a limit in lowering the production cost, and it is difficult to freely select the thickness.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of forming an SOI substrate having a high yield and a thickness that can be freely adjusted.

Another object of the present invention is to reduce production cost by making it possible to manufacture using general equipment.

According to an aspect of the present invention, there is provided a method of forming an SOI substrate including: forming a first groove pattern by etching a silicon substrate; Forming a first insulating layer on a bottom surface of the first groove pattern; Growing a substrate filled with the first groove pattern from the side surface of the first groove pattern by epitaxy to fill the first groove pattern so that the first insulating layer is embedded; Etching a region around the first groove pattern to form a second groove pattern; Forming a second insulating layer on a bottom surface of the second groove pattern; And growing a substrate filled with the first groove pattern from the side surface of the second groove pattern to fill the second groove pattern so that the second insulating layer is embedded.

In one embodiment of the present invention, the step of forming the first groove pattern by etching the silicon substrate includes: forming a first oxide layer on the silicon substrate; Forming a mask layer on the first oxide layer; Exposing the mask layer to etch the mask layer and the first oxide layer in the form of the first groove pattern; And etching the silicon substrate to a predetermined depth in the form of the first groove pattern.

In one embodiment of the present invention, the SOI substrate forming method includes: depositing a first nitride on the silicon substrate etched to a predetermined depth in the form of the first groove pattern; And etching the first nitride deposited on the bottom of the first groove pattern to form a first spacer layer on the inner wall of the first groove pattern.

In one embodiment of the present invention, the step of forming a first oxide layer on the silicon substrate may include thermal oxidation of the silicon substrate by heat to form the first oxide layer.

The forming of the first insulating layer on the bottom surface of the first groove pattern may include removing the mask layer and the first spacer layer in a state where the first insulating layer is formed As shown in FIG.

In one embodiment of the present invention, the mask layer includes nitride, and the step of removing the mask layer and the first spacer layer in the state that the first insulating layer is formed includes: And removing the first spacer layer.

Forming a first insulating layer on a bottom surface of the first groove pattern and forming a second insulating layer on a bottom surface of the second groove pattern may include forming a second insulating layer on the bottom surface of the second groove pattern, The substrate may be oxidized to form the first insulating layer and the second insulating layer on the bottom surface of the first groove pattern and the bottom surface of the second groove pattern, respectively.

In one embodiment of the present invention, the step of forming the second groove pattern by etching the region around the first groove pattern includes the step of forming a second oxide layer on the surface of the silicon substrate that is grown and filled with the first groove pattern ; Depositing a second nitride on the second oxide layer; And etching the silicon substrate to a depth of the first groove pattern in the form of the second groove pattern.

In one embodiment of the present invention, the SOI substrate forming method includes: depositing a third nitride on the silicon substrate etched to a predetermined depth in the form of the second groove pattern; And etching the third nitride deposited on the bottom of the second groove pattern so that a second spacer layer is formed on the inner wall of the second groove pattern.

The forming of the second insulating layer on the bottom surface of the second groove pattern may include removing the mask layer and the second spacer layer in a state where the second insulating layer is formed, As shown in FIG.

As an example related to the present invention, the SOI substrate forming method may further include removing the second oxide layer.

The present invention also provides a method of manufacturing a semiconductor device, comprising: sequentially growing a first growth substrate and a second growth substrate by growing a substrate; Etching the first growth substrate and the second growth substrate to form a first groove pattern; Forming a first insulating layer on a bottom surface of the first groove pattern; Growing the second growth substrate from a side surface of the first groove pattern to fill the first groove pattern so that the first insulating layer is embedded; Etching a region around the first groove pattern to form a second groove pattern; Forming a second insulating layer on a bottom surface of the second groove pattern; And growing a substrate filled with the first groove pattern from the side surface of the second groove pattern to fill the second groove pattern so that the second insulating layer is buried.

In one embodiment of the present invention, the substrate is Si, the first growth substrate is formed of at least one selected from Si, SiC, SiGe, and Ge, And may be constituted by a plurality of layers (graded layers) having different composition ratios of at least one selected from Si, SiC, SiGe and GaAs as different materials.

In one embodiment of the present invention, the step of forming the first insulating layer on the bottom surface of the first groove pattern may include forming the height of the first insulating layer to correspond to the height of the first growth substrate .

The present invention also provides a method of manufacturing a semiconductor device, comprising: sequentially growing a first growth substrate and a second growth substrate by growing a substrate; Forming an oxide layer on the second growth substrate; Forming a mask layer on the oxide layer; Etching the mask layer and the oxide layer in a predetermined pattern; Etching the first growth substrate and the second growth substrate in the pattern shape; Etching the first growth substrate to separate the second growth substrate from the substrate; Attaching the separated second growth substrate to a supporting substrate; And growing the second growth substrate to fill the pattern.

As an example related to the present invention, the SOI substrate forming method may further include a step of flattening the surface of the grown second growth substrate after the step of growing the second growth substrate and filling the pattern .

As described above, according to the SOI substrate forming method related to the present invention, the insulating layer and the growth layer are formed by sequentially performing the deposition and the etching processes on the substrate, and the production cost can be remarkably reduced. In addition, since the substrate is not discarded or wasted, the yield is improved.

According to an embodiment of the present invention, since the substrate is etched to form the first groove pattern or the second groove pattern, and the insulating layer and the growth layer are sequentially provided, the thickness of the growth layer can be freely adjusted, .

According to another embodiment of the present invention, a substrate is grown to form a first growth substrate and a second growth substrate. The thickness of the growth layer can be freely adjusted.

FIGS. 1 to 14 are conceptual sectional views sequentially illustrating a method of manufacturing an SOI substrate according to a first embodiment of the present invention.
15 to 29 are conceptual sectional views sequentially showing a method of manufacturing an SOI substrate according to a second embodiment related to the present invention
30 to 38 are conceptual cross-sectional views sequentially showing a method of manufacturing an SOI substrate according to a third embodiment related to the present invention
FIGS. 39 to 42 are conceptual sectional views sequentially illustrating a method of manufacturing an SOI substrate according to a fourth embodiment related to the present invention

Hereinafter, a method of forming an SOI substrate according to the present invention will be described in detail with reference to the accompanying drawings.

1 to 15 are conceptual sectional views sequentially illustrating a method of manufacturing an SOI substrate according to a first embodiment of the present invention.

A method of forming an SOI substrate according to the present invention includes forming a first groove pattern 120 by etching a silicon substrate 110 and forming a first insulating layer 135 on a bottom surface of the first groove pattern 120, The first groove pattern 120 is filled to fill the first insulating layer 135 by sintering the silicon substrate 110 from the side surface of the first groove pattern 120, The second insulating layer 152 is formed on the bottom surface of the second groove pattern 150 and the second insulating layer 152 is formed on the bottom surface of the second groove pattern 150 from the side surface of the second groove pattern 150. [ And growing the silicon substrate 110 to fill the second groove pattern 150. [

First, a process of forming the first groove pattern 120 by etching the silicon substrate 110 will be described. A silicon substrate 110 is prepared as shown in FIG. The silicon substrate 110 may be constituted by a single crystal material and becomes a seed for later epitaxy. Instead of the silicon substrate 110, a silicon carbide (SiC) substrate or other single crystal semiconductor substrate is also possible.

As shown in FIG. 2, a mask layer 115 for an exposure process to be performed later on the silicon substrate 110 can be attached. The mask layer 115 may be formed of silicon nitride (SiN). The first oxide layer 114 may be formed so as to relieve the stress and increase the adhesion of the mask layer 115 before the mask layer 115 is attached. The first oxide layer 114 may be thermally oxidized to form the silicon substrate 110 by heat.

After the mask layer 115 is formed, the mask layer 115 and the first oxide layer 114 are etched in the form of the first groove pattern 120 by exposing the mask layer 115 as shown in FIG. 3 . Known methods of exposure and etching can be applied, and detailed description thereof is omitted.

4, the silicon substrate 110 is etched to a predetermined depth d in the form of a first groove pattern 120, and nitride is chemically vapor-deposited on the etched first groove pattern 120. Next, as shown in FIG. 4, (CVD) or the like. The depth (d) of the etching is determined by the use of the SOI substrate or the type of the substrate, as needed. The nitride deposited on the bottom of the first groove pattern 120 is etched by plasma or the like so that the first spacer layer 131 is formed on the inner wall of the first groove pattern 120 etch). By this method, only the first spacer layer 131 remains on the inner wall of the first groove pattern 120 in the nitride.

When the first groove pattern 120 is formed by etching the silicon substrate 110 to a predetermined thickness d as shown in FIG. 5, a first insulating layer 135 is formed on the bottom surface of the first groove pattern 120 . The first insulating layer 135 may be formed by thermal oxidation in a state where the first spacer layer 131 is formed. The thickness of the first insulating layer 135 can be freely determined by the degree of oxidation or added material, amount, or the like.

When the first insulating layer 135 is formed, the attached mask layer 115 and the first spacer layer 131 are removed (see FIG. 6). If the mask layer 115 and the first spacer layer 131 are formed of nitride, they can be removed by a nitride strip wet etching. As a result, only the side surface of the first groove pattern 120 is exposed to the outside.

7, the silicon substrate 110 is grown from the side surface of the first groove pattern 120 to form a first insulating layer 135 by lateral epitaxy, The pattern 120 is filled. The material of the growth substrate 140 may be selected as needed, such as silicon (Si), silicon germanium (SiGe), and the like.

After the silicon substrate 110 is filled with the first groove pattern 120, the second groove pattern 150 is formed by etching the region around the first groove pattern 120. Specifically, as shown in FIG. 8, a second oxide layer 142 is formed on the surface of the growth substrate 140. The second oxide layer 142 may be formed by a method such as thermal oxidation or chemical vapor deposition. In the case of the former method, the second oxide layer 142 is formed on the growth substrate 140, and may also be formed on the peripheral portion of the first oxide layer 114 by the latter method. In this way, a part of the SOI substrate to be manufactured is formed, and the first insulating layer 135 is embedded in the silicon substrate 110 (buried oxide).

Next, as shown in FIG. 9, a nitride layer 145 is deposited on the second oxide layer 142. The nitride layer 145 protects the growth substrate 140 and allows etching to be performed in the form of a second groove pattern 150 in a subsequent process.

The silicon substrate 110 is etched by the depth d of the first groove pattern 120 in the form of the second groove pattern 150 and the second groove pattern 150 is etched as shown in FIG. The nitride is deposited on the etched silicon substrate 110 in the form of a mask 150. The nitride is etched to remove the nitride deposited on the bottom of the second groove pattern 150 so that the second spacer layer 147 is formed on the inner wall of the second groove pattern 150. By this method, only the second spacer layer 147 remains on the inner wall of the second groove pattern 150 in the nitride.

When the second groove pattern 150 is formed, a second insulating layer 152 is formed on the bottom surface of the second groove pattern 150 as shown in FIG. The second insulating layer 152 may be formed by a method such as thermal oxidation in which the silicon substrate 110 is thermally oxidized.

When the second insulating layer 152 is formed, the upper nitride layer 145 and the second spacer layer 147 are removed by a nitride strip wet etching method or the like, as shown in FIG. As a result, only the side surface of the second groove pattern 150 is exposed to the outside.

Next, as shown in FIG. 13, the growth substrate 140 in which the first groove pattern 120 is filled is grown from the side surface of the second groove pattern 150 (lateral epitaxy). Thus, the second insulating layer 152 is buried and the growth substrate 160 fills the second groove pattern 150. The material of the growth substrate 160 may be selected as needed, such as silicon (Si), silicon germanium (SiGe), or the like.

The second oxide layer 142 may be removed by a method such as etching as shown in Fig. 14 to obtain a flat SOI substrate. The growth substrates 140 and 160 are integrally connected by growth, and the first insulating layer 135 and the second insulating layer 152 are integrally connected by oxidation. As described above, since the insulating layer and the growth layer are formed by sequentially performing the deposition and etching processes on the substrate, the production cost can be remarkably reduced. In addition, since the substrate is not discarded or wasted, the yield is improved. Furthermore, since the first groove pattern 120 or the second groove pattern 150 is formed by etching the substrate, and the insulating layer and the growth layer are sequentially provided, the thickness of the growth layer can be freely adjusted, .

15 to 28 are conceptual sectional views sequentially illustrating a method of manufacturing an SOI substrate according to a second embodiment of the present invention. In this embodiment, the growth layer is first formed on the substrate 210 in addition to the method of the first embodiment described above to form a thickness sacrificial film. A method of fabricating an SOI substrate according to the present invention includes the steps of sequentially forming a first growth substrate 212 and a second growth substrate 213 by growing a substrate 210 and sequentially forming a first growth substrate 212 and a second growth substrate 212. [ Etching the growth substrate 213 to form a first groove pattern 220, forming a first insulation layer 235 on the bottom surface of the first groove pattern 220, Filling the first groove pattern 220 so that the first insulating layer 235 is buried by growing the growth substrate 240 from the side of the first groove pattern 220 and the second groove pattern 220 by etching the region around the first groove pattern 220, 2 groove pattern 250 and a second insulating layer 252 on the bottom surface of the second groove pattern 240; And filling the second groove pattern 250 such that the second insulating layer 252 is buried by growing the first groove pattern 250 from the side surfaces of the first groove pattern 250 and the second groove pattern 250.

First, as shown in FIGS. 15 and 16, a first growth substrate 212 and a second growth substrate 213, which are grown with different components from the substrate 210, are sequentially formed on a substrate 210. The first growth substrate 212 may be formed of at least one selected from silicon (Si), silicon carbide (SiC), silicon germanium (SiGe), and germanium (Ge) May be formed in various forms such as at least one selected from silicon (Si), silicon carbide (SiC), SiGe, and GaAs, or a plurality of layers having different composition ratios.

After the first growth substrate 212 and the second growth substrate 213 are formed, a first oxide layer 214 and a mask layer 215 are formed as shown in FIG. The first oxide layer 214 and the mask layer 215 can be formed by the method described above.

Next, as shown in FIG. 18, the first growth substrate 212 and the second growth substrate 213 are etched to form the first groove pattern 220. At this time, the first growth substrate 212 may serve as a stop line for etching.

The first growth substrate 212 and the second growth substrate 213 are etched so that the first spacer layer 231 is left on the side surface of the first groove pattern 220 after the nitride layer is formed. Etching is performed (see FIG. 19).

When the first spacer layer 231 is formed, a first insulating layer 235 is formed on the bottom surface of the first groove pattern 220 as shown in FIG. The first insulating layer 235 may be formed by a method of high temperature oxidation of the substrate 210.

When the first insulating layer 235 is formed, as shown in FIG. 21, the mask layer 215 and the first spacer layer 231 are removed by a wet etching method or the like. As a result, only the side of the second growth substrate 213 etched in the form of the first groove pattern 220 is exposed to the outside. The upper surface of the second growth substrate 213 is covered with a first oxide layer 214.

The first groove pattern 220 is filled to grow the second growth substrate 213 from the side surface of the first groove pattern 220 and to embed the first insulation layer 235 as shown in FIG. The filled growth layer 240 is integrally connected to the original first growth substrate 212.

Next, as shown in FIG. 23, a second oxide layer 242 may be formed on the upper surface of the growth substrate 240. The second oxide layer 242 may be formed by a method such as high temperature oxidation or chemical vapor deposition.

On top of the second oxide layer 242, a nitride layer 245 is formed as shown in FIG. The nitride layer 245 protects the second oxide layer 242 and the underlying growth substrate 240 from the etching process behind.

25 is a plan view of a second groove pattern 250 formed by etching a region around the first groove pattern 220 and depositing a nitride on the second groove pattern 250 and then forming a second spacer layer 247).

26 shows that the second insulating layer 252 is formed on the bottom surface of the second groove pattern 250 by a method such as high-temperature oxidation. The second insulating layer 252 is connected to the first insulating layer 235 to insulate the lower substrate 210 from the upper first growth substrate 212.

After the second insulating layer 252 is formed, the nitride layer 245 and the second spacer layer 247 are removed by a wet etching method or the like as shown in FIG. Thereby, the side surface of the second groove pattern 250 is exposed.

28, the growth substrate 240 filled with the first groove pattern 220 is grown from the side surface of the second groove pattern 250 to fill the second groove pattern 250. The growth substrate 260 filled with the second groove pattern 250 is integrally connected to the growth substrate 240 formed in advance and is positioned on the first insulating layer 235 and the second insulating layer 252 as a whole.

The second oxide layer 242 may be removed by etching, planarization, or the like, as shown in FIG.

As described above, by the manufacturing method according to the present example, the etching is stopped in the first growth substrate 212 serving as a sacrificial layer, so that the SOI substrate can be produced at low cost and high efficiency without etching the substrate 210.

30 to 38 are conceptual cross-sectional views sequentially illustrating a method of manufacturing an SOI substrate according to a third embodiment of the present invention.

In this example, the substrate 310 is grown to sequentially form the first growth substrate 312 and the second growth substrate 313 (see FIG. 30), and the oxide layer 314 is formed on the second growth substrate 313, The mask layer 315 and the oxide layer 314 are etched in a predetermined pattern (see FIG. 32), and the first growth substrate 312 is etched After separating the second growth substrate 313 from the substrate 310 (see FIGS. 33 to 35), the separated second growth substrate 313 is attached to the support substrate 370 (see FIGS. 36 and 37 ) Shows the process of fabricating an SOI substrate. The supporting substrate 370 may be a single crystal such as glass, sapphire, or silicon, or polycrystalline. The nitride layer 315 can be removed in advance by a method such as phosphoric acid wet etching (see FIG. 34), and the oxide layer 314 can be removed as needed.

The support substrate 370 may include a separate buffer layer 371 before attaching the second growth substrate 313. The buffer layer 371 may be an oxide layer or a nitride layer or the like depending on the type of the supporting substrate 370. If the supporting substrate 370 is a sapphire substrate, the buffer layer 371 may be omitted. When the supporting substrate 370 is a silicon single crystal, the buffer layer 371 may be formed of silicon oxide (e.g., SiO 2 ) .

After the second growth substrate 313 is attached to the support substrate 370, a growth layer 380 of the second growth substrate 313 is formed (see FIG. 38). Unlike the previous embodiments, this method is advantageous in that fabrication is simple and fabrication costs can be lowered because the method is used by directly attaching to the support substrate 370 without omitting sequential etching and vapor deposition.

FIGS. 39 to 42 are conceptual sectional views sequentially showing a method of manufacturing an SOI substrate according to a fourth embodiment related to the present invention.

In this example, the second growth substrate 413 and the oxide layer 414 fabricated by the methods of FIGS. 30 to 35 are attached to the support substrate 470 (see FIGS. 39 and 40) to fabricate the SOI substrate Process. The supporting substrate 470 may be a single crystal such as glass, sapphire, or silicon, or polycrystalline.

The support substrate 470 may include a separate buffer layer 471 prior to attachment of the second growth substrate 413 and the oxide layer 414. The buffer layer 471 may be an oxide layer, a nitride layer, or the like, depending on the type of the support substrate 470. If the supporting substrate 470 is a sapphire substrate, the buffer layer 471 may be omitted. When the supporting substrate 470 is a silicon single crystal, the buffer layer 471 may be formed of silicon oxide (e.g., SiO 2 ) . After the second growth substrate 413 and the oxide layer 414 are attached to the support substrate 470, a growth layer 480 of the second growth substrate 413 is formed (see FIG. 41). After growing the growth substrate 480, the oxide layer 414 can be removed. The surface can then be planarized through a planarization process (e.g., etching, physical / chemical polishing, etc.) (see FIG. 42).

The SOI substrate forming method described above is not limited to the configuration and the method of the embodiments described above. The above embodiments may be constructed by selectively combining all or a part of each embodiment so that various modifications can be made.

110: silicon substrate 114: first oxide layer
115: mask layer 120: first groove pattern
131: first spacer layer 135: first insulating layer
140: Growth substrate 142: Second oxide layer
145: nitride layer 147: second spacer layer
150: second groove pattern 152: second insulating layer
160: growth substrate 210: substrate
212: first growth substrate 213: second growth substrate
214: first oxide layer 115: mask layer
220: first groove pattern 231: first spacer layer
235: first insulation layer 240: growth substrate
242: second oxide layer 245: nitride layer
247: second spacer layer 250: second groove pattern
252: second insulation layer 260: growth substrate
370: support substrate 371: buffer layer

Claims (16)

Etching the silicon substrate to form a first groove pattern;
Forming a first insulating layer on a bottom surface of the first groove pattern;
Growing the substrate from the side of the first groove pattern (epitaxy) to fill the first groove pattern to fill the first insulating layer;
Etching a region around the first groove pattern to form a second groove pattern;
Forming a second insulating layer on a bottom surface of the second groove pattern; And
And growing the substrate from the side of the second groove pattern to fill the second groove pattern to fill the second insulating layer.
The method according to claim 1,
The step of forming the first groove pattern by etching the silicon substrate comprises:
Forming a first oxide layer on the silicon substrate;
Forming a mask layer on the first oxide layer;
Exposing the mask layer to etch the mask layer and the first oxide layer in the form of the first groove pattern; And
And etching the silicon substrate to a predetermined depth in the form of the first groove pattern.
3. The method of claim 2,
Depositing a first nitride on the silicon substrate etched to a predetermined depth in the form of the first groove pattern; And
Further comprising etching and removing the first nitride deposited on the bottom of the first groove pattern so that a first spacer layer is formed on an inner wall of the first groove pattern.
3. The method of claim 2,
Wherein forming the first oxide layer on the silicon substrate comprises:
Wherein the silicon substrate is thermally oxidized by heat to form the first oxide layer.
The method of claim 3,
Wherein forming the first insulating layer on the bottom surface of the first groove pattern comprises:
And removing the mask layer and the first spacer layer in a state where the first insulating layer is formed.
6. The method of claim 5,
Wherein the mask layer comprises nitride,
In the step of removing the mask layer and the first spacer layer in a state where the first insulating layer is formed,
Wherein the mask layer and the first spacer layer are removed by wet etching.
The method according to claim 1,
Forming a first insulating layer on a bottom surface of the first groove pattern; and forming a second insulating layer on a bottom surface of the second groove pattern,
And oxidizing the silicon substrate by heat to form the first insulating layer and the second insulating layer on the bottom surface of the first groove pattern and the bottom surface of the second groove pattern, respectively.
The method according to claim 1,
The step of etching the region around the first groove pattern to form the second groove pattern includes:
Forming a second oxide layer on a surface of the silicon substrate grown and filled with the first groove pattern;
Depositing a second nitride on the second oxide layer; And
And etching the silicon substrate to a depth of the first groove pattern in the form of the second groove pattern.
9. The method of claim 8,
Depositing a third nitride on the silicon substrate etched to a predetermined depth in the form of the second groove pattern; And
Etching and removing the third nitride deposited on the bottom of the second groove pattern so that a second spacer layer is formed on an inner wall of the second groove pattern.
10. The method of claim 9,
Wherein forming the second insulating layer on the bottom surface of the second groove pattern comprises:
And removing the third nitride and the second spacer layer in a state where the second insulating layer is formed.
9. The method of claim 8,
And removing the second oxide layer. ≪ RTI ID = 0.0 > 11. < / RTI >
Sequentially forming a first growth substrate and a second growth substrate by growing a substrate;
Etching the first growth substrate and the second growth substrate to form a first groove pattern;
Forming a first insulating layer on a bottom surface of the first groove pattern;
Growing the second growth substrate from a side surface of the first groove pattern to fill the first groove pattern so that the first insulating layer is embedded;
Etching a region around the first groove pattern to form a second groove pattern;
Forming a second insulating layer on a bottom surface of the second groove pattern; And
And growing a substrate filled with the first groove pattern from the side surface of the second groove pattern to fill the second groove pattern so that the second insulating layer is buried.
13. The method of claim 12,
Wherein the substrate is Si,
Wherein the first growth substrate is formed of at least one selected from Si, SiC, SiGe, and Ge,
Wherein the second growth substrate is constituted by a plurality of layers (graded layers) having at least any one selected from Si, SiC, SiGe, and GaAs or a different composition ratio as a material different from the first growth substrate .
13. The method of claim 12,
Wherein forming the first insulating layer on the bottom surface of the first groove pattern comprises:
Wherein a height of the first insulating layer is formed to correspond to a height of the first growth substrate.
Sequentially forming a first growth substrate and a second growth substrate by growing a substrate;
Forming an oxide layer on the second growth substrate;
Forming a mask layer on the oxide layer;
Etching the mask layer and the oxide layer in a predetermined pattern;
Etching the first growth substrate and the second growth substrate in the pattern shape;
Etching the first growth substrate to separate the second growth substrate from the substrate;
Attaching the separated second growth substrate to a supporting substrate; And
And growing the second growth substrate to fill the pattern.
16. The method of claim 15,
Further comprising the step of planarizing a surface of the grown second growth substrate after the step of growing the second growth substrate to fill the pattern.
KR1020150089740A 2015-06-24 2015-06-24 Method for fabricating silicon on insulator substrate KR101729699B1 (en)

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