KR101728782B1 - liquid crystal display device and method of driving the same - Google Patents

Abstract

A liquid crystal display device comprising: a liquid crystal panel having two long sides and a short side facing each other; A data line extending along the long side of the liquid crystal panel; a gate wiring extending along the short side; A data driver connected to the data line; A gate driver connected to the gate line; A plurality of LEDs disposed on at least one of two long sides of the liquid crystal panel and divided into a plurality of blocks; And a lamp driving unit for sequentially driving the plurality of blocks.

Description

[0001] The present invention relates to a liquid crystal display device and a method of driving the same,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a driving method thereof.

2. Description of the Related Art [0002] With the development of an information society, demands for a display device for displaying images have been increasing in various forms. Recently, a liquid crystal display (LCD), a plasma display panel (PDP) Various flat display devices such as an organic light emitting diode (OLED) have been utilized.

Of these flat panel display devices, liquid crystal display devices are widely used today because they have advantages of miniaturization, weight reduction, thinness, and low power driving. On the other hand, an active matrix type liquid crystal display device in which a large number of pixels are arranged in a matrix and a switching thin film transistor is formed in each of these pixels is widely used today.

In recent years, a liquid crystal display device realizes ultra-high picture quality of a large screen of a large screen. Further, in order to provide a clearer image quality of the liquid crystal display device, a backlight composed of a plurality of lamps is driven by a scanning driving method.

However, when the backlight is located at the upper portion or the lower portion of the liquid crystal panel, it is difficult to drive the backlight by the scanning driving method.

The present invention has a problem to reproduce a liquid crystal display device and a driving method thereof that can drive a backlight by a scanning driving method even when the backlight is located along the long side of the liquid crystal panel.

Accordingly, there is a problem in improving the motion blur phenomenon to provide a clearer image quality.

According to an aspect of the present invention, there is provided a liquid crystal display comprising: a liquid crystal panel having two long sides and a short side facing each other; A data line extending along the long side of the liquid crystal panel; a gate wiring extending along the short side; A data driver connected to the data line; A gate driver connected to the gate line; A plurality of LEDs disposed on at least one of two long sides of the liquid crystal panel and divided into a plurality of blocks; And a lamp driving unit for sequentially driving the plurality of blocks.

The block is driven after driving the gate wiring corresponding to the block.

And a timing controller for converting and aligning the input image data signal to match the pixel structure of the liquid crystal panel and outputting the converted image data signal to the data driver.

G, B, and W subpixels or R, G, B, and W subpixels arranged in the direction of the long side or the short side direction of the liquid crystal panel, Are arranged in a quad structure including pixels.

A method of driving a liquid crystal display including a liquid crystal panel and a plurality of LEDs positioned at least one of two long sides of the liquid crystal panel and divided into a plurality of blocks, the method comprising: sequentially driving the blocks; Thereby providing a device driving method.

The step of driving the blocks sequentially includes sequentially driving gate wirings along a long side direction of the liquid crystal panel; And sequentially driving the blocks in response to driving of the gate wirings.

And a timing controller for converting and aligning the input image data signal to conform to the pixel structure of the liquid crystal panel and outputting the converted image data signal to the data driver.

G, B, and W subpixels or R, G, B, and W subpixels arranged in the direction of the long side or the short side direction of the liquid crystal panel, Are arranged in a quad structure including pixels.

The liquid crystal display device according to the present invention can drive the backlight by the scanning method even if the backlight is located along the long side of the liquid crystal panel.

Further, since the backlight is driven by the scanning method, the MPRT value is improved to improve the moving picture quality of the liquid crystal panel.

1 is a schematic cross-sectional view illustrating a liquid crystal display device according to an embodiment of the present invention.
2 is an equivalent circuit diagram of a sub-pixel according to an embodiment of the present invention.
3 is a schematic view illustrating a signal applied to a liquid crystal panel according to an embodiment of the present invention.
4 is a schematic cross-sectional view illustrating a timing controller according to an embodiment of the present invention.
5 is a schematic view illustrating a backlight driving method according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic diagram of a liquid crystal display according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram illustrating a sub-pixel of a liquid crystal display according to an embodiment of the present invention.

As shown in the figure, a liquid crystal display device 100 according to an embodiment of the present invention includes a liquid crystal panel 200, a backlight unit 900, and a driving circuit unit.

The liquid crystal panel 200 is provided with a plurality of gate lines GL extending in the row line direction and a plurality of data lines DL extending in the column line direction. The gate wiring GL and the data wiring DL intersect with each other to define a sub-pixel SP in the form of a matrix.

The subpixel SP configured in the liquid crystal panel 200 may include, for example, an R sub-pixel that emits red, a G sub-pixel that emits green, and a B sub-pixel that emits blue. The corresponding R, G, and B image data are input to each of the R, G, and B subpixels SP. Here, neighboring R, G, and B subpixels SP constitute one pixel P.

It is apparent to those skilled in the art that the R, G, B, and W subpixels may be included, or the R, G, B, and W subpixels may be arranged in a quad structure.

Referring to FIG. 2, each sub-pixel SP includes a switching thin film transistor T, a pixel electrode, a common electrode, a liquid crystal capacitor Clc, and a storage capacitor Cst.

The switching thin film transistor T is formed at the intersection of the gate line GL and the data line DL. The switching thin film transistor T is connected to the pixel electrode. On the other hand, a common electrode is formed corresponding to the pixel electrode. When a data voltage is applied to the pixel electrode and a common voltage is applied to the common electrode, an electric field is formed therebetween to drive the liquid crystal. The pixel electrode, the common electrode, and the liquid crystal located between these electrodes constitute a liquid crystal capacitor Clc. Each sub-pixel SP further includes a storage capacitor Cst, which serves to store the data voltage applied to the pixel electrode until the next frame.

In the liquid crystal panel 200, the resolution varies depending on the number of pixels P represented in one inch. Here, the resolution can be expressed by the product of the number of pixels P in the horizontal direction and the number of pixels P in the vertical direction.

For example, the VGA may be expressed as 640 x 480, and the XGA as 1024 x 768 or the like. Further, as the super high definition liquid crystal panel 200, there are a FHD (full high definition) class, UD (ultra definition) class liquid crystal panel 200, and the like. The UD class liquid crystal panel 200 can be represented by 3840 × 2160 and the FHD class by 1920 × 1080. Therefore, the UD-class liquid crystal panel 200 has twice as many pixels P in the horizontal and vertical directions as the FHD-class liquid crystal panel 200, and can provide four times brighter image quality.

Here, for a clearer reference, the horizontal direction and the vertical direction are based on the general liquid crystal panel structure. That is, the gate line is located along the row line and the data line is located along the column line. Therefore, the horizontal direction means the row line direction along the gate line as a general liquid crystal panel structure, and the vertical direction means the column line along the data line.

That is, the long side direction of the liquid crystal panel 200 is defined as a horizontal direction or a row line direction, and a short side direction of the liquid crystal panel 200 is defined as a vertical direction or a row direction.

In the embodiment of the present invention, for convenience of explanation, the FHD-class liquid crystal panel 200 will be described as an example.

The backlight 900 serves to supply light to the liquid crystal panel 200. In an embodiment of the present invention, a plurality of light emitting diodes (LEDs) 900 may be used as the backlight 900. It is obvious to a person skilled in the art that cold cathode fluorescent lamp (CCFL) and external electrode fluorescent lamp (EEFL) can also be used.

The driving circuit unit includes a timing control unit 300, a gate driving unit 400, a data driving unit 500, a gamma reference voltage generating unit 600, a power generating unit 700, and a lamp driving unit 800 can do.

Here, the timing controller 300 receives a video data signal RGB, a vertical synchronization signal, a horizontal synchronization signal, a clock signal, and a control signal TCS such as data enable from an external system such as a TV system or a video card . Although not shown, such signals may be input through the interface configured in the timing controller 300. [

The timing control unit 300 uses the input control signal TCS to control the gate control signal GCS for controlling the gate driving unit 400 and the data control signal DCS for controlling the data driving unit 500 . Further, it generates a lamp control signal (LCS) for controlling the lamp driver 800.

The gate control signal GCS includes a gate start pulse GSP, a gate shift clock GSC and a gate output enable signal GOE. The data control signal DCS includes a source start pulse (SSP), a source shift clock (SSC), a source output enable (SOE), a polarity (POL) . ≪ / RTI >

The timing controller 300 receives image data RGB from an external system, converts the image data RGB to fit the liquid crystal panel 200, and transmits the image data to the data driver 500. Hereinafter, the image data signal converted to fit the liquid crystal panel 200 is referred to as a converted data signal DRGB.

The gamma reference voltage generator 600 divides a high potential voltage and a low potential voltage to generate a plurality of gamma reference voltages Vgamma and supplies the generated gamma reference voltages Vgamma to the data driver 500.

The data driver 500 supplies the data voltages to the plurality of data lines DL in response to the data control signal DCS and the converted data signal DRGB supplied from the timing controller 300. That is, the data voltage corresponding to the converted data signal DRGB is generated using the gamma reference voltage Vgamma, and the generated data voltage is output to the data line DL.

The gate driver 400 sequentially scans a plurality of gate lines GL in response to a gate control signal GCS supplied from the timing controller 300. [ For example, a plurality of gate lines GL are sequentially selected for each frame, and a gate voltage is output to the selected gate line GL. By the gate voltage, the switching thin film transistor T located in the corresponding column line is turned on. On the other hand, a turn-off voltage is supplied to the gate line GL until the scan of the next frame, so that the switching thin film transistor T maintains the turn-off state.

The power generating unit 700 generates various driving voltages necessary for driving the liquid crystal display device 100. For example, the power supply voltage supplied to the timing controller 300, the data driver 500, the gate driver 400 and the ramp driver 800, the gate high voltage and the gate low voltage supplied to the gate driver 400 .

The lamp driving unit 800 sequentially drives the plurality of lamps 900, for example, the LED lamps 900 in block units, in response to the lamp control signal LCS supplied from the timing controller 300 do.

Hereinafter, a method of sequentially driving a plurality of lamps 900 in units of blocks according to an embodiment of the present invention will be described with reference to FIGS. 3 to 5. FIG.

FIG. 3 is a view schematically showing a liquid crystal display according to an embodiment of the present invention, FIG. 4 is a view schematically showing a timing controller according to an embodiment of the present invention, As shown in FIG.

First, the configuration of a liquid crystal display device 100 according to an embodiment of the present invention will be described in detail.

3, in the liquid crystal panel 200 according to the embodiment of the present invention, a plurality of gate lines GL are located along a column line, and a plurality of data lines DL are located along a row line .

Thus, for example, the R, G, and B subpixels SP forming one pixel P are positioned along one column line (see FIG. 1). That is, for example, one kind of sub-pixel SP is located in one row line.

Specifically, for example, the R subpixel SP is located in the first row line, the G subpixel SP is located in the second row line, and the B subpixel SP is positioned in the third row line. .

The gate line GL is positioned along the column line and the gate driver 400 positioned at the extension of the gate line GL is connected to one side of the liquid crystal panel 200 in the long side .

On the other hand, since the data line DL is located along the row line, the data driver 500 located on the extended line of the data line DL is connected to the liquid crystal panel 200 in the short side direction As shown in FIG.

In addition, in the embodiment of the present invention, the number of sub-pixels (SP) in the horizontal direction and the sub-pixels (SP) in the vertical direction are different from those of a general liquid crystal panel.

Specifically, for example, when the resolution is VGA, the number of sub-pixels P in the horizontal direction is 640 × 3 when represented by R, G, and B sub-pixels SP, The number is 480. In this case, in the liquid crystal panel 200 according to the embodiment of the present invention, the number of the sub-pixels SP in the lateral direction is 640 and the sub-pixels SP in the vertical direction are the R, When expressed, it becomes 480 × 3.

A gate signal such as a gate high voltage sequentially applied to the gate line GL of the liquid crystal panel 200 is 640 and the data signal applied to the data line DL, 480 x 3) in the case of R, G, and B subpixels (SP).

In the FHD-class liquid crystal panel 200, which is an ultra-high quality liquid crystal panel 200, the number of sub-pixels SP in the lateral direction is 1920 x 3 when expressed by R, G, and B sub-pixels SP, The number of sub-pixels (SP) is 1080. In this case, in the liquid crystal panel 200 according to the embodiment of the present invention, the number of the sub-pixels SP in the lateral direction is 1920 and the number of the sub-pixels SP in the vertical direction is R, , It becomes 1080 x 3.

3), for example, the gate high voltage is sequentially applied to the gate line GL of the liquid crystal panel 200 to 1920, and the data signal DL applied to the data line DL 3). For example, the data voltage is 1080 (1080 x 3 when expressed by R, G, and B subpixels (SP)).

The plurality of lamps 900 according to the embodiment of the present invention are positioned in the same direction as the gate driver 400, for example. For example, when the gate driver 400 is positioned on the long side of the liquid crystal panel 200, the plurality of lamps 900 are arranged along the long side of the liquid crystal panel 200 in the same direction as the gate driver 400 One or both sides.

More specifically, the plurality of lamps 900 are driven sequentially in units of blocks in synchronization with a gate signal applied to each gate line GL. At this time, since the gate line GL is located along the column line, the gate driver 400 positioned at the extension of the gate line GL is located, for example, on one side in the row line direction, The lamps 900 are also located on one side or both sides in the row line direction.

Hereinafter, the timing controller 300 according to the embodiment of the present invention will be described in detail.

As shown in FIG. 4, the timing controller 300 according to the embodiment of the present invention may include a control signal generator 310 and a data converter 320.

The control signal generator 310 generates a control signal GCS for controlling the gate driver 400 and a data control signal DCS for controlling the data driver 500 using the input control signal TCS. ). Further, it generates a lamp control signal (LCS) for controlling the lamp driver 800.

The data converter 320 receives the image data RGB from the external system and converts the converted image data RGB to the liquid crystal panel 200 and transmits the converted data signal DRGB to the data driver 500 .

More specifically, the image data signals RGB are input to the timing controller 300 in the horizontal and vertical directions with the number of sub-pixels SP of a general liquid crystal panel. That is, the number of sub-pixels SP in the horizontal and vertical directions of the liquid crystal panel 200 according to the embodiment of the present invention is different. Therefore, the image data signal RGB input with a different number of sub-pixels SP must be converted into the number of sub-pixels SP of the liquid crystal panel 200 according to the embodiment of the present invention.

The FHD-level resolution will be described in more detail, for example.

In the input image data signal RGB, the number of sub-pixels SP in the horizontal direction is 1920 x 3 when the number of sub-pixels SP is R, G, and B, and the number of sub-pixels SP in the vertical direction is 1080 . In the liquid crystal panel 200 according to the embodiment of the present invention, the number of the sub-pixels SP in the horizontal direction is 1920, the number of the sub-pixels SP in the vertical direction is the number of the R, , It is 1080 x 3.

Therefore, the number of sub-pixels (SP) of 1920 x 3 x 1080 of the image data signal RGB should be converted into 1080 x 3 x 1920 so as to match the number of sub-pixels SP of the liquid crystal panel 200.

The converted image data signal RGB becomes the converted data signal DRGB, and the converted data signal DRGB is transferred to the data driver 500.

For example, the data conversion unit 320 may include at least one line memory or a frame memory to convert the image data signals RGB.

Hereinafter, the operation of the lamp driver 800 according to the embodiment of the present invention will be described in detail.

In an embodiment of the present invention, an edge type backlight 900 will be described as an example.

The lamp driving unit 800 sequentially drives the plurality of lamps 900 to have a predetermined duty ratio in units of blocks in response to the lamp control signal LCS supplied from the timing control unit 900. [

As shown in FIG. 5, the plurality of lamps 900 are sequentially driven from block to block, for example, from left to right. Here, the block logically divides a plurality of lamps 900 into at least one or more ramps in the row direction.

At this time, the plurality of blocks BL sequentially drive the first block BL1, the second block BL2, and the third block BL3 for one frame, for example.

Specifically, for example, the blocks BL divided in the row direction can be driven corresponding to a plurality of gate lines GL. More specifically, for example, in the case of the FHD-class liquid crystal panel 200, 1920 gate lines GL may be formed, for example. In this case, when a plurality of lamps 900 are driven by dividing into three blocks BL, one block BL may be driven corresponding to 640 gate lines GL. That is, a gate voltage is sequentially applied to a plurality of gate lines GL constituting one block BL, and a data voltage is applied to each subpixel SP corresponding to the gate line GL, for example, A plurality of lamps 900 of the block BL are turned on.

Thereafter, when a gate voltage is applied to the gate line GL of the next block BL, the lamps 900 of the block BL are turned off.

Here, the division into three blocks (BL) is an example of the present invention and can be divided into a plurality of blocks (BL), and the gate wiring (GL) can correspond to each block (BL) Are obvious to those skilled in the art.

As described above, since the plurality of lamps 900 are turned on and off in units of blocks (BL), there is a barrier effect that is not affected by the light diffused between the plurality of lamps 900 without the need for a separate barrier rib.

Accordingly, even if the backlight 900 is positioned on one side or both sides of the liquid crystal panel 200 along the long side, the backlight 900 can be driven by the scanning method.

In addition, by driving the backlight 900 by the scanning method, the moving picture response time (MPRT) value is improved, thereby improving the moving picture quality of the liquid crystal panel.

The embodiment of the present invention described above is an example of the present invention, and variations are possible within the spirit of the present invention. Accordingly, the invention includes modifications of the invention within the scope of the appended claims and equivalents thereof.

100: liquid crystal display device 200: liquid crystal panel
300:
310: control signal generator 320:
DRGB: converted data signal

Claims (8)

A liquid crystal panel having two long sides and a short side facing each other;
A data line extending along the long side of the liquid crystal panel; a gate wiring extending along the short side;
A data driver connected to the data line;
A gate driver connected to the gate line;
A plurality of LEDs disposed on at least one of two long sides of the liquid crystal panel and divided into a plurality of blocks;
And a lamp driving unit for sequentially driving the plurality of blocks in a scanning manner for each frame
Liquid crystal display device.
The method according to claim 1,
The block is driven after driving a gate wiring corresponding to the block
Liquid crystal display device.
The method according to claim 1,
And a timing controller for converting and aligning the input video data signal to match the pixel structure of the liquid crystal panel and outputting the converted video data signal to the data driver
Liquid crystal display device.
The method according to claim 1,
A pixel arranged in a matrix form on the liquid crystal panel
G, B subpixels or R, G, B, and W subpixels arranged along the long side or the short side direction,
Arranged in a quad structure including the R, G, B, and W sub-pixels,
Liquid crystal display device.
A liquid crystal display device comprising: a liquid crystal panel; a data line extending along a long side of the liquid crystal panel; a gate wiring extending along the short side; and a plurality of LEDs arranged on at least one of two long sides of the liquid crystal panel, A method of driving a display device,
And sequentially driving the plurality of blocks in a scanning manner for each frame
A method of driving a liquid crystal display device.
6. The method of claim 5,
Wherein the step of sequentially driving the blocks comprises:
Sequentially driving the gate wirings along a long side direction of the liquid crystal panel;
Sequentially driving the blocks in response to the driving of the gate wirings
A method of driving a liquid crystal display device.
6. The method of claim 5,
And a timing controller for converting and aligning the input video data signal to match the pixel structure of the liquid crystal panel and outputting the converted video data signal to the data driver
A method of driving a liquid crystal display device.
6. The method of claim 5,
A pixel arranged in a matrix form on the liquid crystal panel
G, B subpixels or R, G, B, and W subpixels arranged along the long side or the short side direction,
Arranged in a quad structure including the R, G, B, and W sub-pixels,
A method of driving a liquid crystal display device.

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