KR101727330B1 - Neutralization apparatus - Google Patents

Abstract

An object of the present invention is to improve the rise and fall of a high voltage applied to a discharge electrode in a static eliminator that alternately applies a plus high voltage and a minus high voltage and outputs positive and negative ions.
Side voltage doubler rectifying circuit 12 and the output terminal 6 of the positive side voltage doubler rectifier circuit and the output terminal 7 of the negative voltage doubler rectifier circuit And a discharge electrode unit (13) having one or a plurality of discharge electrodes (9) for generating positive ions and negative ions, characterized in that the positive side voltage doubler rectifying circuit (11) and the negative side voltage doubler A current limiting resistor R1 is connected in series to the diode D in at least one end of each of the voltage rectifying circuits 12 and the capacitor R1 constituting the RC parallel circuit is connected to the current limiting resistor R1 The capacitance value Q1 of the capacitor C1 is made larger than the capacitance value Q0 of the capacitor C0 at the other stage.

Description

NEUTRALIZATION APPARATUS

The present invention relates to an erasing apparatus for erasing a charged object charged with a positive or negative charge to bring the charging potential close to zero.

2. Description of the Related Art Conventionally, there is known a charge eliminating device that alternately outputs positive ions and negative ions from an output terminal of a positive high-voltage generating circuit and a discharge electrode connected between an output terminal of a negative high-voltage generating circuit 1).

More specifically, as shown in Fig. 14, between the external DC power supply 1 and the high-frequency step-up transformer 4a on the positive side and the high-frequency step-up transformer 5a on the negative side, The switches 2a and 2b to be controlled are provided.

The transformer 4a and the voltage doubler rectifying circuit 4b are connected to the secondary side of each transformer by connecting the voltage doubler rectifier circuits 4b and 5b each having a plurality of sets each including a diode and a capacitor, Side high-voltage generating circuit 5 including the high-voltage generating circuit 4 on the plus side and the transformer 5a and the double-voltage rectifying circuit 5b.

By alternately controlling the opening and closing of the switches 2a and 2b, a high-frequency high voltage is alternately generated in the secondary side of the positive-side transformer 4a and the negative-side transformer 5a, and this high- And outputs a high voltage, which is further boosted by the rectification circuit, to the output terminals 6 and 7.

The resistors 10 and 10 are connected to the output terminals 6 and 7 of the positive and negative high voltage generating circuits and the needle electrode 9 is connected to the connection point 8 between the resistors 10 and 10 ).

In this circuit, the control device 3 controls the opening and closing of the switches 2a and 2b by the control signals Sa and Sb and controls the opening and closing of the switches 2a and 2b to the output terminals 6 and 7 of the high- A positive high voltage and a negative high voltage are alternately outputted, so that positive and negative ions are alternately outputted from the discharge electrode 9.

Japanese Patent Laid-Open No. 2000-058290 Japanese Patent Application Laid-Open No. 2008-277316 Japanese Patent Application Laid-Open No. 2010-165690 Japanese Patent Application Laid-Open No. 2008-123912 Japanese Patent Application Laid-Open No. 2008-135329 Japanese Patent Application Laid-Open No. 2008-035647

In the above-described conventional static eliminator, there is a problem that the voltage applied to the discharge electrode 9 does not rise or fall well.

The reason why such a problem occurs is that the stray capacitance cf is formed between the discharge electrode 9 and the ground and the output voltage is affected by the stray capacitance cf.

If the rise of the voltage applied to the discharge electrode 9 is not good, the high voltage can not be applied to the discharge electrode 9. For example, when the rising time of the applied voltage to the discharge electrode 9 is larger than the switching period of the positive / negative polarity, the polarity is switched before the applied voltage reaches a predetermined value. Therefore, a high voltage necessary for the discharge electrode 9 is not applied, and the amount of output of ions is also reduced.

Particularly, in order to uniformly discharge the surface of a running film or the like, it is required to output positive and negative ions at a frequency equal to or higher than a predetermined value. Therefore, a problem that the responsiveness of the voltage applied to the discharge electrode is poor is a serious problem.

Discharge apparatus for generating positive and negative ions by alternately applying a positive high voltage and a negative high voltage to a discharge electrode according to the present invention provides a static eliminator having high rise and drop of high voltage applied to a discharge electrode .

The present invention relates to a positive-side double-voltage rectifying circuit comprising a plurality of stages including a plurality of stages including a diode and a capacitor for boosting a high-frequency voltage to a positive high voltage, and a positive-side double-voltage rectifying circuit for boosting the high- A negative side voltage doubler rectifying circuit having a plurality of sets including a diode and a capacitor in a direction opposite to a circuit; and a negative side voltage doubler rectifying circuit connected to an output terminal of the positive side voltage doubler rectifier circuit and an output terminal of the negative side voltage doubler rectifier circuit, And a discharge electrode portion having one or a plurality of discharge electrodes for generating positive and negative ions by application of a high voltage output of the positive side double voltage rectifier circuit and a high voltage output of the negative side double voltage rectifier circuit .

The first invention is based on the above-mentioned charge-eliminating device, wherein a current-limiting resistor is connected in series to at least one of each of the positive-side double-voltage rectifier circuit and the negative-side double-voltage rectifier circuit, The capacitance value Q1 of the capacitor C1 constituting the RC parallel circuit with the limiting resistance is made larger than the capacitance value Q0 of the capacitor C0 at the other stage.

The phrase " constituting the RC parallel circuit " means that a capacitor in the end of the double voltage rectifying circuit and a current limiting resistor connected in series to the diode are connected in parallel.

In the present invention, by connecting a resistor in series to the diode of the voltage doubler rectifying circuit and increasing the capacitance of the capacitor connected in parallel to the resistor, a capacitor that exhibits a boosting function in the voltage doubler rectifying circuit has a function as a speed- Can be exercised. This makes it possible to quickly raise and lower the high voltage output from the plus and minus voltage doubler rectifying circuits, that is, to improve the responsiveness of the voltage applied to the discharge electrodes.

Therefore, even when the switching frequency for alternately switching the positive-side double-voltage rectifying circuit and the negative-side double-voltage rectifying circuit is increased, a positive voltage and a negative voltage are alternately and responsively applied to the discharging electrode portion, And the erasing performance can be improved.

Further, in the present invention, a resistor is provided in the positive side voltage doubler rectifier circuit and the negative side voltage doubler rectifier circuit to increase the capacity of the capacitor constituting the voltage doubler rectifier circuit so that the voltage applied to the discharge electrode portion rises and falls It is not necessary to separately form a circuit for improving the rise and fall of the voltage on the outside of the voltage doubler rectifying circuit. It is possible to reduce the number of parts as compared with the case of forming an RC parallel circuit having a capacitor in parallel with the resistor 10 on the outside of the output portion of the voltage doubler rectifying circuit shown in Fig.

When the current limiting resistor is divided into a plurality of stages, the withstand voltage of each current limiting resistor can be made low, and the circuit design can be widely dealt with.

1 is an electric circuit diagram of a first embodiment of the present invention.
2 is a graph of the output voltage as a result of the verification test using the first embodiment.
Fig. 3 is a graph showing the result of the verification test of the first embodiment, in which (a) is a rising portion of Fig. 2, and Fig.
4 is a circuit diagram of Comparative Example 1. Fig.
5 is a graph showing a result of a verification test of Comparative Example 1, in which (a) shows a rising portion of an output voltage, and (b) is an enlarged portion of a falling portion of the output voltage.
6 is an output voltage of Comparative Example 2, in which (a) is a rising portion of the output voltage and (b) is an enlarged graph of the falling portion of the output voltage.
7 is a circuit diagram of the second embodiment.
FIG. 8 is a graph showing a result of a verification test according to the second embodiment, in which (a) shows the rise of the output voltage and (b) shows the enlargement of the fall of the output voltage.
Fig. 9 is a circuit diagram of the third and fourth embodiments.
10 is a graph showing the result of the verification test according to the third embodiment, in which (a) shows the rise of the output voltage and (b) shows the enlargement of the fall of the output voltage.
FIG. 11 is a graph showing the result of the verification test of the third comparative example, in which (a) shows the rise of the output voltage and (b) shows the enlargement of the output voltage.
FIG. 12 is a graph showing a result of the verification test according to the fourth embodiment, in which (a) shows the rise of the output voltage, and (b) shows the enlargement of the output voltage.
FIG. 13 is a graph showing a result of a verification test of the fourth comparative example, in which (a) shows the rise of the output voltage, and (b) shows the enlarged portion of the output voltage.
14 is a circuit diagram of a conventional static eliminator.

1 is a circuit diagram showing a first embodiment of the static elimination device of the present invention.

As shown in Fig. 1, the static eliminator includes a high frequency boost transformer T1 for further boosting the high frequency voltage on the positive side and a high frequency boost transformer T2 for further boosting the high frequency voltage on the negative side. The voltage doubler rectifying circuits 11 and 12 are connected to the secondary sides of the step-up transformers T1 and T2, respectively.

The boost transformers T1 and T2 have a function of further boosting the high-frequency voltage from the external high-frequency voltage source, like the high-frequency boosting transformers 4a and 5a in FIG. 14, , A high frequency voltage source and a switching mechanism for alternately switching the input of the high frequency voltage to the positive side and the negative side are connected as in the case of FIG.

The positive-side double-voltage rectifying circuit 11 and the negative-side double-voltage rectifying circuit 12 each include a plurality of sets each including a capacitor and a diode D. As the number of the stages increases, the step-up ratio of the voltage input from the secondary side of the high-frequency step-up transformers T1 and T2 becomes higher and the higher voltage is output from the second voltage-rectifying circuits 11 and 12 However, this stage can be set according to the required voltage. In this embodiment, it is assumed that the number of stages is 14 and the diodes D provided at each stage are the same. 1, a part of the step is omitted.

Each of the positive-side double-voltage rectifying circuit 11 and the negative-side double-voltage rectifying circuit 12 is provided with a capacitor C0 or C1 at each end thereof. The positive-side double-voltage rectifying circuit 11 and the negative- The current limiting resistor R1 is connected in series to the diode D of the 14th stage which is the final stage of each of the rectifying circuits 12. [

In Fig. 1, the capacitor to which the current limiting resistor R1 is connected is denoted by C1, and the capacitor at the other end is denoted by C0.

Therefore, at the final stage, an RC parallel circuit composed of a current limiting resistor R1 and a capacitor C1 connected in series to the diode D is constructed.

The output terminal 6 of the positive side voltage doubler rectifier circuit 11 and the output terminal 7 of the negative side voltage doubler rectifier circuit 12 are connected without interposing a resistor, The electrode portion 13 is connected.

The discharge electrode unit 13 has a needle-like discharge electrode 9 for generating positive or negative ions in accordance with output voltages of the positive-side double-voltage rectifying circuit 11 and the negative-side double-voltage rectifying circuit 12 Respectively. Although 60 discharge electrodes 9 are used in this embodiment, any number of discharge electrodes 9 may be used.

Further, a current limiting resistor R2 is connected to each discharge electrode 9 in series. The reason why the current limiting resistor R2 is connected is to prevent a large current from flowing to the discharge electrode 9. [

When the current limiting resistor R2 is connected in this way, even if a person accidentally contacts the discharge electrode 9 which is applying a high voltage, a large current does not flow and the safety is high. However, the current limiting resistor R2 is not essential.

Since a stray capacitance is generated between each of the discharge electrodes 9 and the ground, it is shown as a stray capacitance cf using the symbol of the capacitor.

In the static eliminator of the first embodiment, a current limiting resistor R1 is provided in the double voltage rectifying circuits 11 and 12 shown in Fig. 1 so that the capacitance of the capacitor C1 constituting the RC parallel circuit is different The capacitance of the capacitor C0 is set larger than that of the capacitor C0.

The output voltage of the output terminals 6 and 7, that is, the output voltage of the discharge electrode unit 13, is increased by making the capacitance of the capacitor C1 constituting the RC parallel circuit larger than the capacitance of the capacitor C0 at the other end, And the response of the output voltage is improved.

Next, an experiment for confirming that the response of the high voltage output from the output terminals 6 and 7 is improved by the static eliminator of the first embodiment will be described.

Specific experimental conditions are as follows.

The resistance value Ra of the current limiting resistor R1 in the circuit of Fig. 1 = 50 [M?], The capacitance value Q0 of the capacitor C0 = 100 pF, the capacitance value Q1 of the capacitor C1 ) = 330 [pF]. That is, the capacitance value Q1 of the capacitor C1 constituting the RC parallel circuit> the capacitance value Q0 of the capacitor C0 at the other stage.

The resistance value of the current limiting resistor R2 connected to each discharge electrode 9 of the discharge electrode unit 13 was set to 10 [M].

The load resistance value Rb and the stray capacitance value Qf of the discharge electrode 13 are values of the entire discharge electrode portion 13 including 60 discharge electrodes 9, R2) or the stray capacitance (cf). Specifically, when the number of the discharge electrodes 9 increases, the load resistance value Rb becomes small and the stray capacitance value Qf becomes large.

The load resistance value Rb includes the resistance of the discharge electrode 9 itself, wiring resistance, and the like.

In the static eliminator of the first embodiment, a high-frequency voltage of 0.5 [Hz] is applied to the primary side of the step-up transformers T1 and T2 with a repetition period of positive and negative, Between the output terminal 6 of the negative voltage side rectifier circuit 12 and the output terminal 7 of the negative side voltage doubler rectifier circuit 12 was measured. The discharge electrode unit 13 is formed by connecting 60 discharge electrodes 9 as described above.

The measurement results are shown in Fig. 2 and Fig. FIG. 2 is a graph showing a change over time of the output voltage at the connection point 8, FIG. 3 (a) is an enlarged graph of the rising portion A of the output voltage shown in FIG. 2, (B) is an enlarged graph of the falling portion B of the output voltage.

As shown in Fig. 2 and Fig. 3, in the static eliminator of the first embodiment, the rise time of the output voltage was 9 [ms] and the fall time was 11 [ms].

In this first embodiment, since the rising time and the falling time are 20 [ms] in one cycle, the output voltage can be accommodated up to 50 [Hz] at the switching frequency of the positive and negative sides of the input voltage.

Next, as Comparative Example 1, the output voltage of the static eliminator shown in Fig. 4 was measured for rise and fall. This Comparative Example 1 corresponds to the conventional circuit shown in Fig.

The static eliminator of this Comparative Example 1 is similar to the circuit described in Patent Document 1, except that the current limiting resistor R1 is not connected to the positive side double voltage rectifier circuit 11 and the negative side double voltage rectifier circuit 12, A pair of current limiting resistors (R1, R1) are connected between the output terminals (6, 7). Then, the discharge electrode portion 13 as in the first embodiment is connected to the connection point 8 between the pair of current limiting resistors R1 and R1.

The capacitors C0 in the positive side and negative side voltage doubler rectifying circuits 11 and 12 are all of the same capacity Q0 = 100 [pF].

The other configuration was the same as that of the first embodiment, and the output voltage output to the connection point 8 was measured under the same experimental conditions.

The results are shown in Figs. 5 (a) and 5 (b). 5 (a) is an enlarged graph of the rising portion A of the output voltage, and Fig. 5 (b) is an enlarged graph of the falling portion B. Fig.

As shown in Fig. 5, in this Comparative Example 1, the rise time is 18 [ms] and the fall time is 18 [ms]. This rise and fall time becomes 36 [ms] in one cycle, and can not cope with a switching frequency of 27 [Hz] or more.

As described above, it was found that the static eliminator of the first embodiment of the present invention has a better response of the output voltage applied to the static eliminator unit 13, as compared with the static eliminator of the prior art.

Next, in order to confirm the effect of increasing the capacitance of the capacitor C1 constituting the RC parallel circuit to be larger than the capacitance of the capacitor C0 in the other stage, an experiment was conducted using the comparative example 2.

The comparative example 2 is a static eliminator in which the capacitance value Q1 of the capacitor C1 constituting the RC parallel circuit of the circuit shown in Fig. 1 is made equal to the capacitance value Q0 of the other capacitor C0. That is, in this comparative example 2, the current limiting resistor R1 is provided in the positive side and negative side double voltage rectifying circuits 11 and 12, but the capacitor of the RC parallel circuit composed of the current limiting resistor R1 Q1 = Q0 = 100 [pF] without setting the capacitance of the capacitor C1 to be larger than that of the other capacitor C0.

In this Comparative Example 2, the output voltage of the junction point 8 was measured under the same experimental conditions as in the first embodiment. The results are shown in Figs. 6 (a) and 6 (b). 6 (a) is an enlarged graph of the rising portion A of the output voltage, and Fig. 6 (b) is an enlarged graph of the falling portion B. Fig.

6, the rising time is 18 [ms] and the falling time is 18 [ms] in this comparative example 2, and similarly to the comparative example 1, .

From this, it can be confirmed that the response of the output voltage can not be improved only by connecting the current limiting resistor R 1 in the positive side power distribution rectifying circuit 11 and the negative side double voltage rectifying circuit 12.

As described above, the current limiting resistor R1 is provided at any one end in the positive side and negative side double voltage rectifying circuits 11 and 12. The capacitor C1 constituting the RC parallel circuit together with this R1 It is found that the response of the output voltage is improved by making the capacitance of the capacitor C0 larger than the capacitance of the capacitor C0 in the other stage.

The result is that the capacity of the capacitor C1 constituting the RC parallel circuit is increased so that this capacitor C1 exerts its function as a speed-up capacitor together with the voltage boosting function in the voltage doubler rectifying circuit.

In the first embodiment, another capacitor for eliminating the influence of the stray capacitance in the above-mentioned discharge electrode unit 13 is used as the capacitor in the voltage doubler rectifying circuit as a function of the speed-up capacitor. It is not necessary to configure the output terminals 6 and 7 in addition to the output terminals 6 and 7 as shown in Fig. This has the advantage that the number of parts can be reduced and the circuit configuration can be simplified as compared with the case where another circuit is provided.

The capacitor C1 that exhibits the function of the speed-up capacitor and the current limiting resistor R1 can be provided at any stage in the voltage doubler rectifying circuits 11 and 12 to improve the responsiveness of the output voltage Could know. The current limiting resistor R1 is provided at the intermediate stage of the voltage doubler rectifying circuits 11 and 12 or at the ends of the transformers T1 and T2 and the capacitor of the stage constituting the RC parallel circuit The effect of improving the responsiveness was confirmed by experiments even for a circuit in which the capacitance of the capacitor C1 is larger than that of the capacitor C0 in the other stage.

The stage in which the current limiting resistor R1 is provided may not be the same in the positive side voltage doubler rectifier circuit 11 and the negative side voltage doubler rectifier circuit 12. [

Fig. 7 is a circuit diagram of the second embodiment using a plurality of resistors r1 as the current limiting resistors R1 provided in the voltage doubler rectifying circuits 11 and 12, respectively.

In this second embodiment, instead of the current limiting resistor R1 of the first embodiment, the current limiting resistors r1 (10) and 10 ). That is, the sum of the resistance values of these current limiting resistors r1 is made equal to the resistance value 50 [M] of the current limiting resistors R1. That is, the total current limiting resistance value (Ra) in both the first and second embodiments is 50 [M].

The capacitor C1 connected to the current limiting resistor r1 is set to 330 pF and the other capacitor C0 is set to 100 pF.

The rest of the configuration is the same as that of the first embodiment shown in Fig. The output voltage at the connection point 8 was measured under the same conditions as in the first embodiment.

The results are shown in Fig. 8 (a) is an enlarged graph of the rising portion A of the output voltage, and Fig. 8 (b) is an enlarged graph of the falling portion B. Fig.

As shown in Fig. 8, in this second embodiment, the rise time is 12 [ms] and the fall time is 13 [ms]. The rise and fall times of one cycle become 25 [ms], which can correspond to the switching frequency of the input voltage of 40 [Hz], which is inferior to that of the first embodiment shown in Fig. 3, The response was improved as compared with Comparative Example 1 of Comparative Example 1 and Comparative Example 2 of FIG.

As described above, even when a current limiting resistor is provided at a plurality of stages in the positive and negative voltage doubler rectifying circuits 11 and 12, the capacity of the capacitor C1 at the stage where this current limiting resistor is provided is set at the other stage It can be seen that the capacitor C1 also functions as a speed-up capacitor together with the voltage-boosting function by making the capacitance of the capacitor C1 larger than that of the capacitor C0.

In the case where a plurality of current limiting resistors are provided separately as in the second embodiment, a capacitor C1 having a larger capacity and having less responsiveness than the first embodiment in which the current limiting resistors are integrated is used It is advantageous that the heat generating part can be dispersed by suppressing the increase in the temperature of the device. In addition, there is an advantage that the withstand voltage of the individual current limiting resistors R1 can be made small.

Also, as in the second embodiment, even in the case where the current limiting resistors R1 are provided at a plurality of stages to constitute an RC parallel circuit, the steps constituting the RC parallel circuit are not limited.

As described above, the static electricity eliminating apparatus of the present invention is characterized in that, at any one of the positive-side double-voltage rectifying circuit 11 and the negative-side double-voltage rectifying circuit 12, the current limiting resistor is connected in series And the relationship between the capacitance value Q1 of the capacitor C1 constituting the RC parallel circuit and the capacitance value Q0 of the capacitor C0 at the other stage by this current limiting resistor should be maintained at Q1> Q0 . In order to confirm the effect of the load resistance Rb and the stray capacitance value Cf on the response voltage of the output voltage on the discharge electrode unit 13 side in this static eliminator, 3 and the fourth embodiment.

The results are described below.

9, a load resistor Rb having a resistance value of 100 [M] is connected in place of the discharge electrode unit 13 of the first embodiment shown in Fig. 1, (cf) is set to 100 [pF].

Other components are the same as those in the first embodiment, and the same reference numerals as those in FIG. 1 are used for the same components as those in the first embodiment.

The output voltage at the connection point 8 was measured under the same conditions as in the first embodiment with respect to the static electricity removing device of the third embodiment.

The results are shown in Fig. 10 (a) is an enlarged graph of the rising portion A of the output voltage, and FIG. 10 (b) is an enlarged graph of the falling portion B. FIG.

As shown in Fig. 10, in this third embodiment, the rise time is 6 [ms] and the fall time is 6 [ms]. The rising and falling times of one cycle become 12 [ms], and it can correspond to the switching frequency of the input voltage of 83 [Hz].

The capacitance value Q1 of the capacitor C1 and the capacitance value C0 of the other capacitor C0 constituting the RC parallel circuit in the voltage doubler rectifying circuits 11 and 12 of the third embodiment shown in Fig. Q0) are set equal to each other and Q1 = Q0 = 100 [pF]. The discharge device of Comparative Example 3 is the same as that of the third embodiment except that the capacitance value Q1 of the capacitor C1 is Q0.

With respect to the static electricity elimination device of this comparative example 3, the output voltage at the connection point 8 was measured under the same conditions as in the third embodiment.

The results are shown in Fig. 11 (a) is an enlarged graph of the rising portion A of the output voltage, and Fig. 11 (b) is an enlarged graph of the falling portion B. Fig.

As shown in Fig. 11, in Comparative Example 3, the rise time was 11 [ms] and the fall time was 11 [ms]. The rise and fall times of one cycle become 22 [ms], and it can not cope with the switching frequency of the input voltage of 46 [Hz] or more. That is, in Comparative Example 3 in which the capacitance value Q1 of the condenser C1 and the capacitance value Q0 of the condenser C0 are equal to each other, in the third embodiment in which the switching frequency of the input voltage is 86 [Hz] It was found that the response was poor compared with the embodiment.

It is found from the experimental results of the third embodiment and the comparative example 3 that the capacitance value Q1 of the capacitor C1 constituting the RC parallel circuit is made larger than the capacitance value Q0 of the other capacitor C0, It was confirmed that the rise and fall of the voltage were improved.

The fourth embodiment is a static eliminator having the same structure as that of the third embodiment except that the resistance value Rb of the load resistor Rb = 300 [M] in the circuit shown in Fig.

In the fourth embodiment, the output voltage at the connection point 8 was measured in the same experiment as the other embodiments.

The results are shown in Fig. 12 (a) is an enlarged graph of the rising portion A of the output voltage, and Fig. 12 (b) is an enlarged graph of the falling portion B. Fig.

As shown in Fig. 12, in this fourth embodiment, the rise time is 9 [ms] and the fall time is 9 [ms]. The rise and fall times of one cycle become 18 [ms], and it is possible to cope with the switching frequency of the input voltage of 56 [Hz] as in the third embodiment.

The capacitance value Q1 of the capacitor C1 and the capacitance value Q0 of the other capacitor C0 constituting the RC parallel circuit in the voltage doubler rectifying circuits 11 and 12 of the fourth embodiment are equal to each other , And Q1 = Q0 = 100 [pF]. The static eliminator of this comparative example 4 is the same as that of the fourth embodiment except that the capacitance value Q1 of the capacitor C1 is Q0. That is, assuming that the load capacitance Cf is 100 pF and the resistance value Rb is 300 MΩ, the capacitance value Q1 of the capacitors C1 and C0 in the voltage doubler rectifying circuits 11 and 12 = And the capacitance value (Q0) = 100 [pF].

With respect to the static eliminator of this comparative example 4, the output voltage at the connection point 8 was measured under the same conditions as in the above-mentioned fourth embodiment.

The results are shown in Fig. 13A is an enlarged graph of the rising portion A of the output voltage, and FIG. 13B is an enlarged graph of the falling portion B. FIG.

As shown in Fig. 13, in Comparative Example 4, the rise time was 18 [ms] and the fall time was 18 [ms]. The rise and fall times of one cycle become 36 [ms], and it can not cope with the switching frequency of the input voltage of 27 [Hz] or more. That is, in the comparative example 4 in which the capacitance value Q1 of the capacitor C1 and the capacitance value Q0 of the capacitor C0 are equal to each other, Q1> Q0 and the switching frequency of the input voltage is 56 [Hz] It can be understood that the response is not good as compared with the fourth embodiment which can cope with this problem.

It is found from the experimental results of the fourth embodiment and the comparative example 4 that the capacitance value Q1 of the capacitor C1 constituting the RC parallel circuit is made larger than the capacitance value Q0 of the other capacitor C0, It was confirmed that the rise and fall of the film were improved.

In the third and fourth embodiments, the load resistance value Rb is different, but the other configurations are completely the same. The RC parallel circuit is formed in the voltage doubler rectifying circuits 11 and 12 and the capacitance value Q1 of the capacitor C1 constituting the RC parallel circuit is set to the other capacitor C0, It is confirmed that the capacitor C1 exhibits a speed-up function in addition to the voltage-boosting function, so that the rise and fall of the output voltage can be improved.

When the above-described static eliminator is used for a long period of time, the dust is attached to the tip of the discharge electrode 9 of the static eliminator electrode portion 13. In the initial stage of use, since the discharge electrode 9 does not adhere to dust, a large amount of discharge current flows and the load resistance Rb is substantially small. However, if dust is attached to the discharge electrode 9 for a long time, As a result, the load resistance Rb becomes large.

Therefore, in the verification tests of the third and fourth embodiments, the load resistance Rb is changed to 100 [M] and 300 [M], so that even when the load resistance value changes, Even if the value of the load resistance Rb is increased from 100 [M?] To 300 [M?] Due to the contamination of the discharge electrode portion 13 due to the long use of the static eliminator, It was confirmed that it is possible to cope with the switching frequency of the input voltage of [Hz] or more.

In the first to fourth embodiments, the current limiting resistance value Ra provided in the voltage doubler rectifying circuits 11 and 12, the capacitance value Q1 of the capacitor C1 constituting the RC parallel circuit, The capacitance value Q0 of the other capacitor C0 is determined according to the required output voltage to be applied to the discharge electrode unit 13 and the load resistance value Rb and the stray capacitance value Qf of the discharge electrode unit 13 An appropriate value should be set.

However, in order to improve the response delay based on the stray capacitance of the discharge electrode unit 13, the capacitance value Q1 of the capacitor C1 in the RC parallel circuit is larger than the capacitance of the other capacitor C0 in the voltage- Value (Q0).

The primary-side circuit of the high-frequency boosting transformers T1 and T2 is not limited to that shown in Fig. 14, and any circuit may be used as long as the high-frequency voltage can be alternately inputted to the plus side and the minus side.

In the embodiment described above, the voltage boosted by the high-frequency boosting transformers T1 and T2 is input to the positive-side double-voltage rectifier circuit 11 and the negative-side double-voltage rectifier circuit 12, However, if the desired high voltage can be output, the step-up transformer is also not essential.

The static eliminator of the present invention has high responsiveness to the high voltage applied to the discharge electrode of the static eliminator electrode portion, so that the amount of ions generated is large and can be applied even before the static elimination of the moving static object.

9: discharge electrode 11: positive side voltage doubler rectifier circuit
12: Negative side voltage multiplier circuit C0: Capacitor
C1: Capacitor D: Diode
R1: Current limit resistor r1: Current limit resistor
13:
R2: Current limiting resistor (connected to the discharge electrode)
Ra: Current limiting resistance value (of double voltage rectifier circuit)
Rb: load resistance value (of the entire negative electrode portion)
cf: stray capacitance Qf: stray capacitance value

Claims (1)

A positive side double voltage rectifier circuit including a plurality of stages including a diode and a capacitor for boosting the high frequency voltage to a positive high voltage and a positive side double voltage rectifier circuit for boosting the high frequency voltage to a negative high voltage, Side voltage doubler rectifying circuit having a plurality of stages including a diode and a capacitor in a reverse direction and an output terminal connected to the output terminal of the positive side voltage doubler rectifying circuit and an output terminal of the negative side voltage doubler rectifying circuit, And a discharge electrode portion having one or a plurality of discharge electrodes for generating positive and negative ions by application of a high voltage output of the side voltage rectifying circuit and a high voltage output of the negative side voltage doubler rectifying circuit,
A current limiting resistor is connected in series to the diode in one or more stages of each of the positive side double voltage rectifier circuit and the negative side double voltage rectifier circuit, The capacitance value Q1 of the capacitor C1 is made larger than the capacitance value Q0 of the capacitor C0 at the other stage.

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