KR101724636B1 - Method for manufacturing plate and probe card - Google Patents
Method for manufacturing plate and probe card Download PDFInfo
- Publication number
- KR101724636B1 KR101724636B1 KR1020150036945A KR20150036945A KR101724636B1 KR 101724636 B1 KR101724636 B1 KR 101724636B1 KR 1020150036945 A KR1020150036945 A KR 1020150036945A KR 20150036945 A KR20150036945 A KR 20150036945A KR 101724636 B1 KR101724636 B1 KR 101724636B1
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- Prior art keywords
- forming
- laminate
- disposed
- stacked
- contact portion
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
- G01R1/07371—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate card or back card with apertures through which the probes pass
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
- G01R1/06733—Geometry aspects
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
A manufacturing method of a plate portion is disclosed, wherein the manufacturing method of the plate portion includes: forming a first laminate in which a lower portion of the plurality of interconnecting structures is vertically disposed; Forming a second laminate in which upper portions of the plurality of interconnecting structures are vertically disposed; Forming n stacked bodies stacked between the first stacked body and the second stacked body and at least a part of the plurality of interconnected structures being arranged through the stacked bodies; And laminating the first laminate, the second laminate and the n laminated bodies.
Description
The present invention relates to a method of manufacturing a plate portion and a probe card.
In general, a semiconductor package is finally subjected to characteristic measurement or defect inspection through various electrical tests by an inspection apparatus. At this time, a probe card is used to electrically connect the circuit pattern of the inspection printed circuit board provided in the inspection apparatus with the semiconductor package.
Generally, such a probe card includes a conductive bump into which a probe and a probe are inserted, and a method of manufacturing such a probe card is disclosed in Patent No. 10-0823310. The disclosed probe card manufacturing method forms the conductive bump at a predetermined height, and then forms a probe insertion hole in the formed conductive bump to form a conductive bump into which the probe is inserted.
According to the conductive bump forming method, the height of the conductive bump is set before the probe insertion hole is formed. When the height of the probe changes, the conductive bump does not correspond to the height variation of the probe There was a problem.
SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of manufacturing a plate portion that realizes a plate portion capable of actively responding to a change in height of an interconnect structure.
According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, the method comprising: forming a first laminate in which a lower portion of the plurality of interconnect structures is vertically penetrated; Forming a second laminate in which upper portions of the plurality of interconnecting structures are vertically disposed; Forming n stacked bodies stacked between the first stacked body and the second stacked body and at least a part of the plurality of interconnected structures being arranged through the stacked bodies; And laminating the first laminate, the second laminate, and the n laminated bodies.
According to the above-mentioned problem solving means of the present invention, when the plate portion is formed by the lamination of the first laminate, the second laminate and the n laminate, when the height of the interconnection structure changes, The height of the plate portion can be set by adjusting the number of laminated layers of the first laminate, the second laminate and the n laminate corresponding to the height.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram for explaining a step of forming a first laminate according to an embodiment of the present invention; FIG.
2A is a schematic diagram for explaining a step of laminating a first laminate and n laminates according to an embodiment of the present invention
Fig. 2B is a schematic diagram for explaining the step of cutting the laminated first laminate and the n laminate.
3 is a schematic cross-sectional view showing a plate portion in which an interconnecting structure is penetrated.
4 is a schematic cross-sectional view showing a plate portion in which an interconnecting structure is penetrated to explain a plate portion including n stacked bodies formed according to another embodiment of the present invention;
5 is a schematic cross-sectional view for explaining an interconnect structure.
Figure 6 (a) is a schematic perspective view of the contactor of the interconnect structure shown in Figure 5;
Figure 6 (b) is a schematic perspective view of the interconnect structure shown in Figure 5.
6C is a cross-sectional view of the interconnect structure shown in FIG. 6B, in which the first contact portion and the second contact portion, which are in contact with each other to show a portion where the first contact portion and the second contact portion are in contact with each other, As shown in Fig.
7 is a schematic sectional view for explaining various shapes of the tip portion.
8 (a) is a schematic perspective view of a contactor according to another embodiment of the present invention.
8 (b) is a schematic perspective view of an interconnect structure according to another embodiment of the present invention.
8C is a schematic cross-sectional view of a portion of the interconnect structure shown in FIG. 8B where the first contact portion and the second contact portion are contacted in the thickness direction.
9 (a) is a schematic perspective view of a contactor according to another embodiment of the present invention.
Figure 9 (b) is a schematic perspective view of an interconnect structure according to another embodiment of the present application.
FIG. 9C is a schematic cross-sectional view of a portion of the interconnect structure shown in FIG. 9B where the first contact portion and the second contact portion are contacted in the thickness direction. FIG.
FIG. 10 is a schematic diagram for explaining a step of forming a contactor according to an embodiment of the present invention; FIG.
FIG. 11 is a schematic diagram for explaining a step of forming a contactor having an inclined surface on an entire surface according to an embodiment of the present invention.
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. It should be understood, however, that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In the drawings, the same reference numbers are used throughout the specification to refer to the same or like parts.
Throughout this specification, when a part is referred to as being "connected" to another part, it is not limited to a case where it is "directly connected" but also includes the case where it is "electrically connected" do.
Throughout this specification, when a member is " on " another member, it includes not only when the member is in contact with the other member, but also when there is another member between the two members.
Throughout this specification, when an element is referred to as "including " an element, it is understood that the element may include other elements as well, without departing from the other elements unless specifically stated otherwise. The terms "about "," substantially ", etc. used to the extent that they are used throughout the specification are intended to be taken to mean the approximation of the manufacturing and material tolerances inherent in the stated sense, Accurate or absolute numbers are used to help prevent unauthorized exploitation by unauthorized intruders of the referenced disclosure. The word " step (or step) "or" step "used to the extent that it is used throughout the specification does not mean" step for.
Throughout this specification, the term " combination thereof " included in the expression of the machine form means one or more combinations or combinations selected from the group consisting of the constituents described in the expression of the machine form, And the like.
For reference, the terms related to direction and position (upper, upper, lower, lower, etc.) in the description of the embodiments of the present application are set based on the arrangement state of each structure shown in the drawings. For example, referring to Fig. 2A, the 12 o'clock direction is generally on the upper side, the upper side generally facing the 12 o'clock direction is the upper side, the 6 o'clock side is on the lower side in general, .
The present invention relates to a method of manufacturing a plate portion in which a plurality of interconnecting structures are arranged to be penetrated.
Hereinafter, a plate portion according to one embodiment of the present invention (hereinafter referred to as " the present manufacturing method ") will be described.
This manufacturing method comprises the steps of: forming a first laminate (21) in which a lower portion of a plurality of interconnecting structures (1) is vertically disposed; a step of forming a plurality of interconnecting structures (1) 2 stacked
According to the present manufacturing method, the plate portion can be formed by stacking the
The present manufacturing method may also include a step of forming an insulating
The insulating
Hereinafter, this production method will be described in more detail.
The step of forming the
1 (b), the step of forming the
The shape of the
In addition, the step of forming the
The step of forming the
In the step of forming the insulating
Further, as described above, the present manufacturing method includes the step of forming the
Referring to FIG. 1 (a), the step of forming the
1B, the step of forming the
Also, the
In other words, the
1 (c), the step of forming the
1D, the step of forming the
Further, the step of forming the n stacked bodies may include the step of forming one of the n stacked bodies.
The step of forming a laminate includes the steps of preparing a substrate, forming a plurality of holes of a shape corresponding to at least a part of each of the plurality of interconnecting structures arranged through the substrate in one laminate, Forming a plurality of holes on the substrate based on the photoresist layer.
In addition, the step of forming one laminate may include the step of forming an insulating thin film on the surface of the substrate on which a plurality of holes are formed. The step of forming one layered body in this manner may be similar to or the same as the step of forming the first
Further, the step of forming n stacked layers may include the step of forming another stacked layer. The step of forming another laminate may be performed similarly to the step of forming one laminate.
2A, the step of laminating the first
Illustratively, the
At this time, the first
Accordingly, an adhesive layer made of a polymer material can be formed between the
The step of laminating the first
Such cutting can be performed by a dicing process or a bridging process.
The step of laminating the first
Also, referring to FIG. 3, a plurality of block plates on which the interconnect structure is disposed may be aligned. Illustratively, the block plates can be arranged so that the interconnect structures disposed in each are arranged in a checkered pattern. As such, the
The
Further, in another embodiment of the present manufacturing method, in the step of forming n stacks, the step of forming one stack may include the steps of preparing a
Hereinafter, a probe card (hereinafter referred to as " probe card ") according to an embodiment of the present invention will be described. However, the same reference numerals are used for the same or similar components as those described in the manufacturing method of the plate portion according to one embodiment of the present invention, and the description thereof will be simplified or omitted.
The probe card includes a plurality of interconnecting structures (1).
Referring to FIG. 5, the
The
Referring to FIG. 5, the
Illustratively, when the inspection of the semiconductor package is performed, the
6 (a), each of the front and rear surfaces of the
7 (a) to (e), the shape of the cross section of the
In the conventional interconnect structure, since the front and rear surfaces are three-dimensional rather than planar, further processing is required to process the end portions in contact with the semiconductor package in various shapes.
However, according to the
Further, as described above, since the
5, the
Referring to FIG. 5, the
Also, the
The
5 and 6, the
Since the
As described above, since the
Specifically, the conventional interconnect structure includes an upper probe pin, a lower probe pin spaced apart from the upper probe pin and disposed below the upper probe pin, a spring surrounding the upper probe pin and the lower probe pin, And a housing surrounding the pin and spring.
According to such an interconnect structure, the transmission of an electrical signal is made along the contact point between the upper probe pin, the spring, the housing and the lower probe pin formed through the tilting of the spring. In addition, according to this, since the movement path of the electrical signal is formed sequentially or in reverse order to the upper probe pin, the spring, the housing, and the lower probe pin, the movement path of the electrical signal is complicated. Further, since the path of the electrical signal is complicated, the inspection time of the semiconductor package may be long, and the impedance matching section may be reduced.
In addition, in the conventional interconnect structure, a housing must be provided for the transmission of electrical signals. In order to transmit electrical signals, a tilting of the spring is required. In order to induce the tilting of the spring, the overall length of the interconnect structure is required to be more than a certain length, and a spring located between the upper probe pin and the lower probe pin And the overall length of the interconnect structure is increased due to the length. Such a requirement for length limits the scratch length of the interconnect structure. In addition, the increase in length required for the interconnect structure also caused a problem of increasing the travel time of the electrical signal.
Further, according to such an interconnect structure, an electrical signal is transmitted by point contact between the upper probe pin, the spring, the housing, and the lower profile pin, so that the occurrence rate of the noise during the transmission of the electrical signal is high and the transferability is low.
However, according to the interconnect structure, since the
Thus, by improving the stroke length while minimizing the overall length of the interconnect structure, high frequency bandwidth, low inductance, and high current electrical characteristics can be secured.
In other words, in the conventional interconnect structure, in view of signal transfer, the upper probe pin, the housing, and the lower probe pin are in point contact to form two contact portions. On the other hand, in the case of this interconnecting structure, since the upper probe pin and the lower probe pin are in surface contact and contact directly through one contact having a wide contact area, the contact resistance, impedance and self inductance can be reduced to improve current flowability Therefore, it can cope with high frequencies.
6 (a) and 6 (c), the
Thus, the
8 and 9, each of the
In addition, the
The
The
The interconnecting
The
In other words, the contact between the
5, the lower end of the
Illustratively, the
Further, the probe card includes a plate portion in which a plurality of the above-described
The plate portion can be formed by the above-described manufacturing method.
Referring to FIG. 3, the plate portion includes a
At this time, as shown in FIG. 3, the
3, the plate portion includes a
As shown in FIG. 3, the
3, the plate portion is formed by stacking n stacks 22 of the
Illustratively, each of the n stacked
The
3, each of the n stacked
In other words, as shown in FIG. 3, the
4, each of the n stacks 22, 23 includes one
In addition, the
Further, the plate portion may include an adhesive layer formed between the
In this probe card, an insulating thin film may be formed on the surfaces of the first
The surface of each of the first
On the other hand, the
FIG. 10 is a schematic conceptual view for explaining a step of forming a contactor according to an embodiment of the present invention, and FIG. 11 is a cross-sectional view illustrating a step of forming a contactor having a slope on the front surface according to an embodiment of the present invention FIG.
The method of forming the
Referring to FIG. 10 (a), the step of forming the
10 (b), the step of forming the
As a result, a
For example, the
10 (c), the step of forming the
Exemplarily, an
10 (d), the step of forming the
10 (e), the step of forming the
The step of polishing the
The predetermined thickness of the
10 (f), the step of forming the
In addition, in the step of removing the
11, when the
Specifically, the step of forming the inclined surface may include the step of depositing the wet etching mask
In addition, the step of forming the inclined surface may include the step of forming the patterned
In addition, the step of forming the inclined surface may include patterning the wet etching mask
Further, the step of forming the inclined surface may include a step of wet-etching the substrate with anisotropic etching liquid, as shown in (b-4) of Fig. Through this step, the
In addition, the step of forming the inclined surface may include the step of forming the
Thereafter, a patterned
Accordingly, the
In addition, a method of forming the
The method of forming the
The method of forming the
It will be understood by those of ordinary skill in the art that the foregoing description of the embodiments is for illustrative purposes and that those skilled in the art can easily modify the invention without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. For example, each component described as a single entity may be distributed and implemented, and components described as being distributed may also be implemented in a combined form.
The scope of the present invention is defined by the appended claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.
1: Interconnection structure 11:
111: upper portion 112: second contact portion
113: upper step portion 12: contactor
121: tip portion 122: first contact portion
123: lower step portion 13:
21: first laminate 22: third laminate
221: hole 222: rim
23: fourth laminate 231: hole
232: rim 24: second laminate
81: substrate 82: seed layer
83: photoresist layer 84: metal layer
86: wet etching mask thin film 87: mask layer
91: substrate 92: photoresist layer
93: insulated thin film 95: hole
Claims (14)
Forming a first laminate in which a lower portion of the plurality of interconnecting structures is vertically disposed;
Forming a second laminate in which upper portions of the plurality of interconnecting structures are vertically disposed;
Forming n stacked bodies stacked between the first stacked body and the second stacked body and at least a part of the plurality of interconnected structures being arranged through the stacked bodies; And
And stacking the first laminate, the second laminate, and the n stacks,
The step of laminating the first laminate, the second laminate and the n laminates
Laminating the first stacked body and the n stacked bodies; And
And a step of forming a plurality of block plates by cutting the stacked first laminate and the n stacked bodies along a partition wall formed between a plurality of holes through which the interconnect structure is disposed .
Wherein forming the first laminate comprises:
Preparing a substrate;
Forming a photoresist layer patterned on the substrate with a plurality of holes each having a shape corresponding to a lower portion of each of the plurality of interconnect structures;
And forming the plurality of holes based on the photoresist layer.
Wherein forming the second laminate comprises:
Preparing a substrate;
Forming a photoresist layer patterned on the substrate with a plurality of holes each having a shape corresponding to an upper portion of each of the plurality of interconnect structures;
And forming the plurality of holes based on the photoresist layer.
Wherein forming the n stacks comprises:
Forming a stack of one of said n stacks,
Wherein the forming of the one laminate comprises:
Preparing a substrate;
Forming a photoresist layer on the substrate patterned with a plurality of holes each having a shape corresponding to at least a portion of each of the plurality of interconnecting structures disposed through the one stacked body;
And forming the plurality of holes based on the photoresist layer.
Wherein forming the n stacks comprises:
Forming a stack of one of said n stacks,
Wherein the forming of the one laminate comprises:
Preparing a substrate;
And forming a hole through which the plurality of interconnecting structures are disposed on the substrate.
Each of the first stacked body, the second stacked body and the n stacked bodies is formed with a plurality of holes through which the interconnecting structures are disposed,
In the step of laminating the first laminate and the n laminate,
Wherein the first laminated body and the n laminated bodies are laminated vertically so that the plurality of holes formed in each of the first laminated body and the n laminated bodies overlap each other in the vertical direction.
Wherein the step of laminating the first laminate, the second laminate and the n laminated bodies comprises:
Disposing the interconnecting structure in each of the plurality of block plates; And
Stacking the second laminate on the plurality of block plates such that the plurality of block plates on which the interconnect structure is disposed are aligned and the second laminate is mounted on the aligned interconnect structure, Wherein the plate portion comprises a plurality of plates.
The step of forming the plate portion includes:
Further comprising the step of forming an insulating thin film on the surface of each of the first laminate, the second laminate and the n laminated bodies.
A plurality of interconnect structures;
And a plate portion through which the plurality of interconnecting structures are disposed,
Wherein the plate portion is formed by the manufacturing method of the plate portion according to Claim 1.
And each of the n stacked bodies includes a plurality of holes through which at least a part of each of the plurality of interconnecting structures is disposed.
Wherein each of the n stacks includes one hole through which at least a part of each of the plurality of interconnecting structures is disposed and a rim formed along the periphery of the one hole.
The interconnect structure may include:
A contactor including a tip portion in contact with the semiconductor package and a first contact portion extending upward from the tip portion;
A connecting body including a second contact portion which is in surface contact with the first contact portion of the contactor and overlaps with the first contact portion in a vertical direction and an upper portion that extends upward from the second contact portion; And
And an elastic body arranged to surround the first contact portion of the contactor and the second contact portion of the connector.
Wherein the n stacked bodies are a third stacked body and a fourth stacked body,
Wherein the tip portion is disposed in the first laminate body, the first contact portion is disposed in the third laminate body, the second contact portion is disposed in the fourth laminate body, the second contact portion is disposed in the second laminate body, And the upper portion is disposed through the probe card.
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KR1020150036945A KR101724636B1 (en) | 2015-03-17 | 2015-03-17 | Method for manufacturing plate and probe card |
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KR1020150036945A KR101724636B1 (en) | 2015-03-17 | 2015-03-17 | Method for manufacturing plate and probe card |
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KR101724636B1 true KR101724636B1 (en) | 2017-04-10 |
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KR102571840B1 (en) | 2016-08-31 | 2023-08-29 | 현대모비스 주식회사 | Folding method of knee air bag apparatus and knee air bag apparatus |
KR102517778B1 (en) * | 2021-02-26 | 2023-04-04 | (주)포인트엔지니어링 | The Electro-conductive Contact Pin Assembly and Method for Manufacturing Thereof |
Citations (3)
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JP2012181948A (en) * | 2011-02-28 | 2012-09-20 | Enplas Corp | Contact pin and socket for electrical component |
JP5276895B2 (en) * | 2008-05-19 | 2013-08-28 | 新光電気工業株式会社 | Probe card and manufacturing method thereof |
JP2014173914A (en) * | 2013-03-07 | 2014-09-22 | Sankei Engineering:Kk | Contact pin |
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KR101123887B1 (en) * | 2009-11-11 | 2012-03-23 | 주식회사 코디에스 | Probe unit |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP5276895B2 (en) * | 2008-05-19 | 2013-08-28 | 新光電気工業株式会社 | Probe card and manufacturing method thereof |
JP2012181948A (en) * | 2011-02-28 | 2012-09-20 | Enplas Corp | Contact pin and socket for electrical component |
JP2014173914A (en) * | 2013-03-07 | 2014-09-22 | Sankei Engineering:Kk | Contact pin |
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