KR101721259B1 - Electrostatic capacity type touch screen panel and method of manufacturing the same - Google Patents

Abstract

The present invention relates to a touch screen panel for improving productivity by reducing the number of mask processes, and improving visibility and contact resistance, and a manufacturing method thereof. A method of manufacturing a touch screen panel includes forming a first conductive layer and a second conductive layer on a front surface of a substrate, forming a first photoresist pattern using a halftone mask, A first step of forming a first conductive pattern including first connection patterns, a plurality of first and second routing wirings in a multilayer structure; A second step of forming an insulating layer made of an insulating material on a front surface of the substrate on which the first conductive pattern is formed and then patterning the insulating material to form an insulating layer having at least two contact holes; And a plurality of first electrode rows arranged in parallel in a first direction by patterning the third conductive layer, and a plurality of second electrode layers arranged in parallel with the first direction, And a second step of forming a second conductive pattern including a plurality of second electrode rows arranged in parallel in a second direction in which the second conductive pattern is formed. In the above configuration, the first electrode row and the second electrode row are electrically insulated, and each of the plurality of first connection patterns includes at least two contact holes that expose portions of the first connection pattern, Connect the pairs to each other.

Description

TECHNICAL FIELD [0001] The present invention relates to an electrostatic capacity type touch screen panel,

The present invention relates to a touch screen panel of a correcting capacity type.

In recent years, display devices such as liquid crystal displays (LCDs), electroluminescent displays, and plasma display panels have attracted attention because of their high response speed, low power consumption, and excellent color recall . Such display devices have been used in various electronic products such as televisions, computer monitors, notebook computers, mobile phones, display parts of refrigerators, personal digital assistants, and automated teller machines. Generally, these display devices constitute an interface with a user by using various input devices such as a keyboard, a mouse, and a digitizer. However, the use of a separate input device such as a keyboard and a mouse has been required to learn how to use the device and to inconvenience such as occupying a space, thereby making it difficult to improve the completeness of the product. Therefore, there is a growing demand for an input device that is convenient and simple and can reduce malfunctions. In accordance with such a demand, a touch screen panel has been proposed in which a user directly touches the screen with a hand or a pen to input information.

The touch screen panel is simple, has little malfunction, can be input without using a separate input device, and can be operated quickly and easily through the contents displayed on the screen. .

The touch screen panel includes a resistive type in which a metallic electrode is formed on a top plate or a bottom plate in accordance with a method of detecting a touched portion to determine a touched position as a voltage gradient according to a resistance in a state in which a direct current voltage is applied, A capacitive type in which an equipotential is formed on a conductive film and a touched portion is sensed by sensing a position where a voltage change of the upper and lower plates due to a touch is sensed and an LC value derived by touching the conductive film is read An electro-magnetic type in which a touch portion is sensed, and the like.

1 and 2, a description will be made of a conventional touch screen panel of a capacitance type according to the related art. FIG. 1 is a plan view of a capacitive touch screen panel according to a related art, and FIG. 2 is a cross-sectional view taken along line I-I 'and II-II' of the touch screen panel shown in FIG.

Referring to FIGS. 1 and 2, a conventional capacitive touch screen panel includes an electrode forming portion 20, a routing wiring portion 40, a pad portion 60, and a protective layer 50.

The electrode forming unit 20 includes a plurality of first electrodes 21 formed on the substrate 10 and arranged in parallel in a first direction (e.g., an X-axis direction) And a plurality of second electrodes 22 arranged in a crossing direction (e.g., a Y-axis direction). Although the first electrodes 21 and the second electrodes 22 intersect with each other, they are electrically isolated by the insulating layer 30. The neighboring first electrodes 21 are connected to each other by a bridge 41. That is, the bridge 41 connects the neighboring first electrodes 21 to each other through the contact holes 30a and 30b formed in the insulating layer 30 covered on the first and second electrodes 21 and 22, Respectively.

The routing wiring portion 40 includes a plurality of first routing wirings 42 and a plurality of second electrodes 22 formed on the outer periphery of the electrode forming portion 20 and connected to the plurality of first electrodes 21, And a plurality of second routing wirings 43 connected to the plurality of second routing wirings 43, respectively.

The pad portion 60 includes a plurality of first pads 61 connected to the plurality of first electrodes 21 through a plurality of first routing wires 42 and a plurality of second routing wires 43 And a plurality of second pads 62 connected to the plurality of second electrodes 22 through a plurality of second pads.

The protective layer 50 covers the electrode forming portion 20 and the routing wiring portion 40 and includes first and second electrodes 21 and 22 and first and second routing wirings 42 and 43, Thereby preventing exposure to the outside.

Hereinafter, a method of manufacturing a capacitive touch screen panel according to a conventional technique will be described with reference to FIGS. 3A to 3D.

Referring to FIG. 3A, a first conductive layer for forming first and second electrodes is deposited on a substrate 10 having an electrode forming portion, a routing wiring portion, and a pad portion by a vapor deposition process such as sputtering. As the first conductive layer, an ITO layer (Indium Tin Oxide layer) is mainly used. A photoresist is coated on the entire surface of the substrate on which the first conductive layer is formed, and then a photolithography process using the first mask is performed to form a first photoresist pattern exposing the first conductive layer in the electrode forming portion. Then, the first conductive layer exposed by the first photoresist pattern is removed by wet etching, and the remaining first photoresist pattern is ashed to form a plurality of first electrodes 21 And a plurality of second electrodes 22 intersecting with the first electrodes.

Referring to FIG. 3B, a first insulating layer 30 is formed on a substrate 10 having a plurality of first and second electrodes 21 and 22, and then a photolithography process using a second mask, The first insulating layer of the routing wiring portion and the pad portion is removed and first and second contact holes 30a and 30b penetrating the first insulating layer 30 of the electrode forming portion are formed. The first and second contact holes 30a and 30b expose a part of the neighboring first electrodes 21. As the first insulating layer 30, silicon nitride, silicon oxide, organic resin, or the like can be used.

Referring to FIG. 3C, a second conductive layer is formed on the entire surface of the substrate on which the first and second contact holes 30a and 30b are formed through a deposition process such as sputtering. As the second conductive layer, aluminum (Al) or molybdenum (Mo) may be used. The photoresist is coated on the substrate on which the second conductive layer is formed and then the photolithography process and the etching process using the third mask are performed to form the first and second routing wirings 42 and 43 And a connecting electrode 41 is formed on the first insulating layer 30 in the electrode forming portion. The connection electrode 41 connects the first electrodes 21 separated through the first and second contact holes 30a and 30b formed in the first insulation layer 30.

3D, a second insulating layer 50 is formed as a protective film on the front surface of the substrate on which the connection electrode 41 and the first and second routing wirings 42 and 43 are formed, Through holes 50a, 50b and 50c penetrating through the second insulating layer 50 are formed in the photolithography process and the etching process so that the first and second routing wirings 42 and 43 of the pad portion are exposed.

However, the conventional capacitive touch screen panel is manufactured by the four mask process as described above, and each mask process includes a photo resist (PR), a coating, an alignmnet, and an exposure A photolithography process that requires a series of continuous processes such as development, cleaning, and the like, and thus a time and cost burden is required to reduce the mask process .

Accordingly, it is an object of the present invention to improve the productivity by reducing the number of mask processes of the capacitive touch screen panel and thereby reducing the tact time.

Another object of the present invention is to solve the problem that the metal layer under the insulating layer is visually recognized through the touch screen panel and to improve the contact resistance between the touch electrodes and the static electricity problem caused thereby.

According to an aspect of the present invention, there is provided a method of manufacturing a capacitive touch screen panel, comprising: forming a first conductive layer and a second conductive layer on a front surface of a substrate; Forming a plurality of first connection patterns made of the first conductive layer, a plurality of first and second routing wirings made up of the first and second conductive layers using the first photoresist pattern, A first step of forming a first conductive pattern including the first conductive pattern; An insulating layer made of an insulating material is formed on the front surface of the substrate on which the first conductive pattern is formed, and then the insulating layer is patterned to expose portions of the first connecting pattern to form an insulating layer having at least two contact holes ; And a plurality of first electrode rows arranged in parallel in a first direction by patterning the third conductive layer, and a plurality of second electrode layers arranged in parallel with the first direction, And a second step of forming a second conductive pattern including a plurality of second electrode rows arranged in parallel in a second direction in which the first electrode row and the second electrode row are electrically insulated, Each of the first connection patterns of the plurality of first electrode patterns connects adjacent pairs of the plurality of first electrode patterns through the at least two contact holes.

The first step in the method comprises: forming the first and second conductive layers on a front surface of the substrate; Forming a 1-1 second photoresist pattern having a first height and a 1-2 photoresist pattern having a second height larger than the first height using the halftone mask; The first 1-1 photoresist pattern is disposed on a second conductive layer at a position where the first and second routing wirings are to be formed and the 1-2 first photoresist pattern is formed on the second Placing on a conductive layer; The first 1-1 and the 1-2 first photoresist patterns are ashed so as to remove the first photoresist pattern disposed at a position where the plurality of second connection patterns are to be formed, ; And removing the remaining first 1-2 photoresist pattern after the ashing.

The second step may include: forming the insulating material on the front surface of the substrate on which the first conductive pattern is formed; Disposing a second photoresist pattern on the insulating material at a position where the first and second routing wirings are to be formed and a position at which the first connecting pattern is to be formed; And patterning the insulating material using the second photoresist pattern as a mask to form an insulating layer having the at least two contact holes exposing the first portion and the second portion of the first connection pattern, .

According to another aspect of the present invention, there is provided a capacitive touch screen panel including: a substrate; An electrode forming unit including a plurality of first electrode rows arranged on the substrate in parallel in a first direction and a plurality of second electrode rows arranged to cross the first electrode rows; A plurality of first routing wirings formed on the substrate at an outer portion of the electrode formation portion and each connected to the plurality of first electrode rows and having a multilayer structure of first and second conductive layers; And a plurality of second routing wires formed on the substrate at an outer portion of the electrode forming portion and connected to the plurality of second electrode lines and each having a multi-layer structure of the first and second conductive layers, A wiring portion; A plurality of first connection patterns formed on the same layer as the plurality of first and second routing wirings and formed of the first conductive layer formed separately from each other; And an insulating layer having at least two contact holes for insulating the first and second electrode rows at the intersections of the first and second electrode rows and exposing portions of the first connection pattern Wherein each of the plurality of first electrode columns includes a plurality of first electrode patterns connected by the first connection patterns and the second electrode columns are arranged in a direction crossing the first electrode columns And a plurality of second electrode patterns connected by a second connection pattern, wherein each of the plurality of first connection patterns connects adjacent pairs of the plurality of first electrode patterns through the at least two contact holes .

In the above arrangement, each of the plurality of first electrode columns includes a plurality of first electrode patterns connected by the first connection patterns, and the second electrode columns are arranged in a direction crossing the first electrode columns Wherein each of the first connection patterns includes a plurality of second electrode patterns connected by a second connection pattern and each of the plurality of first connection patterns includes a plurality of second connection patterns, Adjacent pairs of the first electrode patterns of the first electrode pattern.

Also, the first and third conductive layers include any one of ITO and IZO, and the second conductive layer includes any one of Al, AlNd, Mo, MoTi, Cu, and Cr.

According to the capacitive touch screen panel and the manufacturing method thereof according to the embodiment of the present invention, since the first conductive layer and the second conductive layer can be patterned by a single mask process using a halftone mask process, One mask process can be omitted. Therefore, it is possible to reduce the cost and the tact time by reducing the number of masks.

In addition, since the touch electrodes (electrode patterns) and the connection pattern (particularly, the first connection pattern) connecting them are formed by using the same material, the contact resistance generated when connecting the pairs of adjacent electrode patterns and the defects due to static electricity are suppressed The effect can be obtained.

In addition, since the first and second electrode patterns and the second connection patterns are formed on the uppermost layer of the touch screen panel, and ITO having high hardness is used as the material, scratches do not occur in the subsequent process.

FIG. 1 is a plan view of a capacitive touch screen panel according to the related art,
FIG. 2 is a cross-sectional view taken along lines I-I ', II-II', and III-III 'of the touch screen panel shown in FIG.
FIGS. 3A to 3D are cross-sectional views illustrating a manufacturing process of a capacitive touch screen panel according to a conventional technique shown in FIG.
4 is a plan view of a touch screen panel according to an embodiment of the present invention,
5 is a cross-sectional view taken along lines IV-IV ', VV' and VI-VI 'of the touch screen panel according to the embodiment of the present invention shown in FIG. 4,
6A to 6G are a plan view and a cross-sectional view illustrating a first process using a halftone mask in a manufacturing process of a touch screen panel according to an embodiment of the present invention,
7A to 7D are a plan view and a sectional view showing a second step of the manufacturing process of the touch screen panel according to the embodiment of the present invention,
8A and 8B are a plan view and a cross-sectional view illustrating a third step of a manufacturing process of a touch screen panel according to an embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals refer to like elements throughout the specification.

First, a touch screen panel according to a first embodiment of the present invention will be described with reference to FIGS. 4 and 5. FIG. FIG. 4 is a plan view of a touch screen panel according to an embodiment of the present invention. FIG. 5 is a cross-sectional view taken along line IV-IV ', line V-V', and line VI-VI ' to be.

4 and 5, the electrostatic capacitive touch screen panel according to the first embodiment of the present invention includes an electrode forming portion A, a routing wiring portion B, and a pad portion C. Referring to FIG.

The electrode forming portion A includes a plurality of first electrode rows 130 arranged in parallel in a first direction (e.g., an X axis direction) and a plurality of first electrode rows 130 arranged in a second direction , Y-axis direction). Each of the first electrode lines 130 includes first electrode patterns 131 formed of a triangle, a quadrangle, a rhombic, a polygon, or the like, first connection patterns 110 connecting the first electrode patterns 131, . The second electrode patterns 135 formed of a triangular, square, rhombic, polygonal or similar shape similar to the first electrode patterns 131 and the second electrode patterns 136 And second connection patterns 137 connecting to each other.

In the touch screen panel according to the embodiment of the present invention, the first connection patterns 110 are formed separately from the first electrode patterns 131, and the second connection patterns 137 are formed on the second electrode patterns 136 .

The routing wiring portion B includes a plurality of first routing wirings 112 formed on the outer portion of the electrode forming portion A and connected to the plurality of first electrode rows 130, And a plurality of second routing wirings 114 connected to the plurality of first routing wirings 135, respectively.

The pad portion C includes a plurality of first pads 116 connected to the plurality of first electrode lines 130 through a plurality of first routing wirings 112 and a plurality of second routing wirings And a plurality of second pads 118 connected to the plurality of second electrode lines 135 through the plurality of second electrode lines.

Meanwhile, in the touch screen panel according to the embodiment of the present invention, the first connection patterns 110 are formed of a transparent conductive material such as ITO, and the first and second routing wirings 112 and 114 are transparent 114a formed of a conductive material and upper layers 112b and 114b made of a metal material such as Al, AlNd, Mo, MoTi, Cu, Cr, and the first and second pads 116 and 118, A first layer 116a or 118a made of a transparent conductive material such as ITO and a second layer 116b or 118b made of a metal material such as Al, AlNd, Mo, MoTi, Cu or Cr and a second layer 116b or 118b made of ITO or IZO And third layers 116c and 118c made of the same transparent conductive material. Since the metal material has a low specific resistance, it has an effect of lowering the resistance of the electrode connection portion. In addition, although the first and second pads 116 and 118 have been described as having a three-layer structure in the embodiment of the present invention, the third layers 116c and 118c may be omitted.

In the embodiment of the present invention, the upper layers 112b and 114b and the lower layers 112a and 114a of the first connection pattern 110, the first and second routing wirings 112 and 114, the first and second pads The first layers 116a and 118a and the second layers 116b and 118b of the photoresist layers 116 and 118 are formed by a single mask process using a halftone mask process. As described above, since the first connection patterns 110 and the first and second routing wirings 112 and 114 of the touch screen panel according to the embodiment of the present invention are formed through the same process, It is possible to omit one masking process as compared with the conventional technique in which the connection pattern and the routing wiring are formed in different processes. Therefore, it is possible to obtain the effect of reducing the cost as much as the mask process is omitted and reducing the tact time (production time per product unit for achieving the daily target amount).

The insulating layer 120 is formed on the entire surface of the substrate 100 on which the first connection patterns 110 and the first and second routing wirings 112 and 114 are formed, The first and second contact holes 120a and 120b expose a part of each of the first connection patterns 110 and the third contact holes 120a and 120b, A fourth contact hole 120d (see FIG. 7A) for exposing a part of the second routing interconnections 114 and 120c is formed. As the material of the insulating layer 120, an inorganic film such as silicon nitride (SiNx), silicon dioxide (SiO ₂ ), or an organic film such as photoacryl is used, but the material of the insulating layer is not necessarily limited thereto. However, when the insulating layer 120 is formed using silicon nitride, since it has a high hardness and a strong scratch resistance characteristic, it is possible to prevent damage during the transfer process for a post-process or a post-process, It can be helpful. When silicon nitride is used as the insulating layer 120, the thickness is preferably in the range of 5,000 to 7,000 ANGSTROM. When the thickness of the insulating layer 120 is less than 5,000 ANGSTROM, the insulating layer 120 may be broken or damaged by the voltage applied to the first and the second electrode columns 130 and 135, If the thickness exceeds 7,000 ANGSTROM, the formation of the contact hole becomes difficult due to the hardness characteristic of the silicon nitride film and the process time becomes long, which is not preferable.

On the insulating layer 120 formed with the first to fourth contact holes 120a, 120b, 120c and 120d (see FIG. 7A), a plurality of first electrode patterns 131 are formed in a first direction A plurality of first electrode lines 130 arranged in a first direction (e.g., x-axis direction), and a plurality of second electrode patterns 136 arranged in a second direction intersecting the first direction and the y-axis direction) are formed on the second electrode rows 135. The second electrode rows 135 are arranged in the y-axis direction. Since the first electrode patterns 131 constituting the first electrode lines 130 are formed separately from each other, the insulating layers 120 are formed through the first and second contact holes 120a and 120b formed in the insulating layer 120, The first electrode patterns 131 located at the outermost periphery are connected to the first routing interconnections 112 through the third contact holes 120c, do.

As shown in FIG. 5, a portion of each of the plurality of first electrode patterns 131 is formed to be partially filled in the first and second contact holes 120a and 120b. For example, a portion of the first electrode pattern 131 is formed on exposed portions of the sidewalls of the first and second contact holes 120a and 120b and the first connection pattern 110 and the first routing wiring 112 do. The first and second contact holes 120a and 120b are formed on the first and second contact holes 120a and 120b by portions of the first electrode pattern 131 partially filled in the first and second contact holes 120a and 120b, The second concave portions 122a and 122b are formed.

On the other hand, the second electrode patterns 136 constituting the second electrode row 135 are formed integrally with the second connection patterns 137, and the second routing patterns 137 are formed through the fourth contact holes 120d (see FIG. 7A) And is connected to the wirings 114. The first and second electrode patterns 131 and 136 and the second connection patterns 137 are formed of the same material through the same process. As the material of the first and second electrode patterns 131 and 136 and the second connection patterns 137, a transparent electrode material such as ITO or IZO may be used. In the case of using ITO for the first and second electrode patterns 131 and 136 and the second connection patterns 137 formed on the uppermost layer of the touch screen panel because ITO has a very high hardness, Scratches do not occur in a subsequent process for forming a display device in the touch panel 100, so that a touch screen panel of good quality can be obtained.

Hereinafter, a method of manufacturing a capacitive touch screen panel according to an embodiment of the present invention will be described with reference to FIGS. 6A to 8B.

6A to 6G are a plan view and a cross-sectional view illustrating a first process using a halftone mask in a manufacturing process of a touch screen panel according to an embodiment of the present invention.

Referring to FIGS. 6A to 6G, on a substrate 100 having an electrode forming portion A, a routing wiring portion B, and a pad portion C using a halftone mask process, A first conductive pattern 110 including a connection pattern 110, a first routing wiring 112 and a second routing wiring 114 of a multi-layer structure, first pads 116 and second pads 118 of a multi- Group.

More specifically, as shown in FIG. 6B, the first conductive layer 102 and the second conductive layer 104 are sequentially deposited on the substrate 100 through a deposition process such as sputtering. As the material for forming the first conductive layer, ITO or IZO is used, and as the material for forming the second conductive layer, Al, AlNd, Mo, MoTi, Cu, Cr, or the like is used.

After the first and second conductive layers 102 and 104 are formed on the substrate 100, a photolithography process using a half tone is performed to form a first height h1 A first photoresist pattern 1000 having a first height h1 and a second photoresist pattern 1010 having a second height h2 greater than the first height h1 are formed. The first photoresist pattern 1000 is disposed on the electrode formation portion A where the first connection patterns to be described later are to be formed and the 1-2 photoresist pattern 1010 is formed on the routing wiring portion B and the pad (C).

Next, the first and second conductive layers 102 and 104 are exposed and developed using the 1-1 and 1-2 photoresist patterns 1000 and 1010 as masks, and wet etching is performed The first and second conductive layers 102 and 104 are removed from the portion where the 1-1 and 1-2 photoresist patterns 1000 and 1010 are not located, A first conductive pattern group composed of a first conductive pattern 102 'and a second conductive pattern 104' is formed. When the first and second conductive layers 102 and 104 are etched, the first and second photoconductive layers 1000 and 1010 are formed on the first and second conductive layers 102 and 104, It is preferable that the second conductive patterns 102 and 104 are over-formed to form the first conductive pattern group so as to have an under-cut structure.

Then, as shown in FIG. 6E, the ashing process using the oxygen plasma is used to remove the first photoresist pattern 1000 disposed at the position where the second connection patterns are to be formed, Thereby exposing the pattern 104 '. At this time, the first-second photoresist pattern 1010 on the routing wiring portion B and the pad portion C is lowered by the height of h1 to form the first to third photoresist patterns 1010 'having a height of h2-h1. .

6F, the second conductive pattern 104 'on the electrode formation portion A is removed by wet etching using the first to third photoresist patterns 1010' having a reduced height as a mask, Thereby forming the first connection pattern 110.

Next, as shown in FIG. 6G, the first and second photoresist patterns 1010 'are removed to remove the first and second routing wirings 112 and 114 of the multi-layer structure, the first A connection pattern 110, and first and second pads 116 and 118 of a multi-layer structure are formed. Here, the first connection patterns 110 are formed of a transparent conductive material such as ITO or IZO, and the first and second routing wirings 112 and 114 are formed of a lower layer made of a transparent conductive material such as ITO or IZO The first and second pads 116 and 118 are formed of a metal material such as Al, AlNd, Mo, MoTi, Cu and Cr. The first and second pads 116 and 118 are formed of ITO or IZO Lower layers 116a and 118a made of a transparent conductive material and upper layers 116b and 118b made of a metal material such as Al, AlNd, Mo, MoTi, Cu, and Cr.

7A and 7D are a plan view and a sectional view for explaining a second step of the manufacturing method of the capacitive touch screen panel according to the embodiment of the present invention. Although the first and second routing wirings 112 and 114 indicated by dashed lines in FIG. 7A are substantially invisible on a plan view because they are covered with the insulating layer 120, they are indicated by dotted lines in the present invention for the sake of understanding .

7A and 7B, the first connection pattern 110, the first routing wiring 112, the second routing wiring 114, the lower layer 116a of the first pad, and the lower layer 118a of the second pad, The insulating layer 120 is formed on the entire surface of the substrate 100 on which the first conductive pattern group is formed by a vapor deposition method such as sputtering. As the material of the insulating layer 120, an inorganic insulating material such as silicon nitride (SiNx), silicon oxide, or the like is preferable, but an organic insulating material such as photoacrylic may be used, or a hybrid material obtained by synthesizing them may be used.

After the insulating layer 120 is formed, a photoresist pattern 2000 is formed at a portion where the insulating layer 120 should be present, by using a photolithography process using a mask, as shown in FIG. 7C. The first to fourth contact holes 120a, 120b, 120c, and 120d (see FIG. 7A) through the insulating layer 120 are formed by a dry etching process using the photoresist pattern 2000. 7A and 7D, the first to fourth contact holes 120a and 120b exposing the first connection pattern 110 formed under the insulating layer 120 are formed by removing the photoresist pattern 2000. Then, , 120c and 120d can be obtained. Here, the first contact hole 120a is a part of the first connection pattern 110, the second contact hole 120b is another part of the first connection pattern 110, the third contact hole 120c is a part of the first connection pattern 110, The fourth contact hole 120d exposes a part of the second routing wiring 114 and the fourth contact hole 120d exposes a part of the second routing wiring 114, respectively.

Although the cross-sectional shapes of the first through fourth contact holes 120a, 120b, 120c, and 120d are shown as rectangular in FIG. 7A, the present invention is not limited thereto, , Polygonal, or any other shape, such as an irregular shape.

8A and 8B are a plan view and a cross-sectional view for explaining a third step of the manufacturing method of the capacitive touch screen panel according to the embodiment of the present invention. FIG. 8A is a plan view of a method of fabricating a capacitive touch screen panel according to an embodiment of the present invention, which is formed by a third mask process, in which the insulating layer 120 is omitted for the sake of understanding.

Referring to FIGS. 8A and 8B, a third mask process is performed to expose the first insulating layer 120 in a first direction (for example, a first direction) on the insulating layer 120 on which the first through fourth contact holes 120a, 120b, 120c, a plurality of second electrode rows 130 arranged in parallel in a second direction (for example, the y direction) intersecting the first direction, 135 are formed on the second conductive pattern.

In detail, the third conductive layer is completely deposited on the insulating layer 120 formed with the first through fourth contact holes 120a, 120b, 120c, and 120d through a deposition process such as sputtering. A plurality of first electrode lines 130 arranged in parallel in a first direction (for example, x direction) by patterning the second conductive layer by a photolithography process and an etching process using a third mask, And a plurality of second electrode lines 135 arranged in parallel in a second direction (e.g., the y direction) intersecting the first direction. Each of the first electrode lines 130 includes a plurality of first electrode patterns 131 and each of the second electrode lines 135 includes a plurality of second electrode patterns 136, And second connection patterns 137 connecting second electrode patterns 136 adjacent to each other.

Further, as shown in FIG. 8B, a part of each of the plurality of first electrode patterns 131 is formed to be partially filled in the first and second contact holes 120a and 120b. For example, a portion of the first electrode pattern 131 is formed on exposed portions of the sidewalls of the first and second contact holes 120a and 120b and the first connection pattern 110 and the first routing wiring 112 do. The first and second contact holes 120a and 120b are formed on the first and second contact holes 120a and 120b by portions of the first electrode pattern 131 partially filled in the first and second contact holes 120a and 120b, The third concave portions 122a and 122b are formed.

Each of the first and second electrode patterns 131 and 136 is formed of a triangle, a quadrangle, a diamond, a polygon, or the like, but the embodiment of the present invention is not limited thereto and may include any other shape. In the embodiment of the present invention, the first electrode patterns 131 formed on the insulating layer 120 are formed separately and the second electrode patterns 136 are connected to the second connection patterns 137 The first electrode patterns may be connected by a connection pattern on the insulating layer, and the second electrode patterns may be formed separately. In this case, the second electrode patterns are configured to be electrically connected by another connection pattern formed under the insulating layer.

According to the method of manufacturing a touch screen panel of the present invention, the first photoresist pattern 1000 having the first height h1 and the first photoresist pattern 1000 having the second height h2, The resist pattern 1010 is used to form the first connection patterns 110 of a single layer structure and the first and second routing wirings 112 and 114 of the multilayer structure and the first and second pads The number of masks 116 and 118 can be reduced by one mask process, compared to the conventional method.

Since the first electrode patterns and the first connection patterns and the first electrode patterns for connecting the first electrode patterns are formed of the same material, it is possible to suppress the contact resistance generated when the adjacent pairs of electrode patterns are connected and the defects due to static electricity The effect can be obtained.

In addition, since the first and second electrode patterns and the second connection patterns are formed on the uppermost layer of the touch screen panel, and ITO having high hardness is used as the material, scratches do not occur in the subsequent process.

A touch screen panel according to an exemplary embodiment of the present invention includes a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), an electroluminescent display device Electroluminescence Device, EL), an electrophoretic display device, and the like. In this case, the substrate of the touch screen panel according to the embodiments of the present invention can be used as a substrate of the display device.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

100: substrate 110: first connection pattern
112: first routing wiring 114: second routing wiring
116: first pad 118: second pad
120: insulating layer 120a, 120b, 120c, 120d: contact hole
130: first electrode row 131: first electrode pattern
135: second electrode row 136: second electrode pattern
137: second connection pattern 1000, 1010, 2000: photoresist pattern
A: electrode forming portion B: routing wiring portion
C: pad portion

Claims (9)

A first conductive layer and a second conductive layer are formed on a front surface of a substrate, a first photoresist pattern is formed using a halftone mask, and a plurality of A first step of forming a first conductive pattern including a plurality of first routing patterns and a plurality of first routing patterns, each of the first and second conductive patterns including first and second conductive patterns;
An insulating layer made of an insulating material is formed on the front surface of the substrate on which the first conductive pattern is formed, and then the insulating layer is patterned to expose portions of the first connecting pattern to form an insulating layer having at least two contact holes ; And
A plurality of first electrode rows arranged in parallel in the first direction by patterning the third conductive layer, and a plurality of second electrode layers arranged in parallel in the first direction, And a third step of forming a second conductive pattern including a plurality of second electrode rows arranged in parallel in a second direction,
Wherein the first electrode row and the second electrode row are electrically insulated and each of the plurality of first connection patterns connects adjacent pairs of the plurality of first electrode patterns through the at least two contact holes Wherein the method comprises the steps of:
The method according to claim 1,
In the first step,
Forming the first and second conductive layers on a front surface of the substrate;
Forming a 1-1 second photoresist pattern having a first height and a 1-2 photoresist pattern having a second height larger than the first height using the halftone mask;
The first 1-1 photoresist pattern is disposed on a second conductive layer at a position where the first and second routing wirings are to be formed and the 1-2 first photoresist pattern is formed on the second Placing on a conductive layer;
The first 1-1 and the 1-2 first photoresist patterns are ashed so as to remove the first photoresist pattern disposed at a position where the plurality of second connection patterns are to be formed, ;
And removing the remaining first-second photoresist pattern after the ashing process.
3. The method of claim 2,
In the second step,
Forming the insulating material on a front surface of the substrate on which the first conductive pattern is formed;
Disposing a second photoresist pattern on the insulating material at a position where the first and second routing wirings are to be formed and a position at which the first connecting pattern is to be formed; And
And patterning the insulating material using the second photoresist pattern as a mask to form an insulating layer having the at least two contact holes exposing the first portion and the second portion of the first connection pattern Wherein the method comprises the steps of:
The method of claim 3,
Wherein each of the plurality of first electrode columns includes a plurality of first electrode patterns connected by the first connection patterns and the second electrode columns are arranged in a direction crossing the first electrode columns, And a plurality of second electrode patterns connected by two connection patterns,
Wherein each of the plurality of first connection patterns connects adjacent pairs of the plurality of first electrode patterns to each other through the at least two contact holes exposing portions of the first connection pattern. Gt;
5. The method according to any one of claims 1 to 4,
Wherein the first and third conductive layers comprise one of ITO and IZO.
5. The method according to any one of claims 1 to 4,
Wherein the second conductive layer comprises one of Al, AlNd, Mo, MoTi, Cu, and Cr.
Board;
An electrode forming unit including a plurality of first electrode rows arranged on the substrate in parallel in a first direction and a plurality of second electrode rows arranged to cross the first electrode rows;
A plurality of first routing wirings formed on the substrate at an outer portion of the electrode formation portion and each connected to the plurality of first electrode rows and having a multilayer structure of first and second conductive layers, And a plurality of second routing wirings formed on the substrate at an outer portion of the forming portion and each connected to the plurality of second electrode rows and having a multilayer structure of the first and second conductive layers, ;
A plurality of first connection patterns formed on the same layer as the plurality of first and second routing wirings and formed of the first conductive layer formed separately from each other; And
And an insulating layer having at least two contact holes for insulating the first and second electrode rows at the intersections of the first and second electrode rows and exposing portions of the first connection pattern, ,
Wherein each of the plurality of first electrode columns includes a plurality of first electrode patterns connected by the first connection patterns and the second electrode columns are arranged in a direction crossing the first electrode columns, And a plurality of second electrode patterns connected by two connection patterns,
Wherein each of the plurality of first connection patterns connects adjacent pairs of the plurality of first electrode patterns to each other through the at least two contact holes.
8. The method of claim 7,
Wherein the first and third conductive layers comprise one of ITO and IZO.
8. The method of claim 7,
Wherein the second conductive layer comprises any one of Al, AlNd, Mo, MoTi, Cu, and Cr.

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