KR101687038B1 - 에러 검출 방법 및 하나 이상의 메모리 장치를 포함하는 시스템 - Google Patents
에러 검출 방법 및 하나 이상의 메모리 장치를 포함하는 시스템 Download PDFInfo
- Publication number
- KR101687038B1 KR101687038B1 KR1020117009393A KR20117009393A KR101687038B1 KR 101687038 B1 KR101687038 B1 KR 101687038B1 KR 1020117009393 A KR1020117009393 A KR 1020117009393A KR 20117009393 A KR20117009393 A KR 20117009393A KR 101687038 B1 KR101687038 B1 KR 101687038B1
- Authority
- KR
- South Korea
- Prior art keywords
- error
- packet
- command
- memory devices
- semiconductor memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/1016—Error in accessing a memory location, i.e. addressing error
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0411—Online error correction
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Detection And Correction Of Errors (AREA)
- Memory System (AREA)
Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13857508P | 2008-12-18 | 2008-12-18 | |
| US61/138,575 | 2008-12-18 | ||
| US14014708P | 2008-12-23 | 2008-12-23 | |
| US61/140,147 | 2008-12-23 | ||
| US12/418,892 US8880970B2 (en) | 2008-12-23 | 2009-04-06 | Error detection method and a system including one or more memory devices |
| US12/418,892 | 2009-04-06 | ||
| PCT/CA2009/001777 WO2010069045A1 (en) | 2008-12-18 | 2009-12-10 | Error detection method and a system including one or more memory devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20110103388A KR20110103388A (ko) | 2011-09-20 |
| KR101687038B1 true KR101687038B1 (ko) | 2016-12-15 |
Family
ID=42268218
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020117009393A Expired - Fee Related KR101687038B1 (ko) | 2008-12-18 | 2009-12-10 | 에러 검출 방법 및 하나 이상의 메모리 장치를 포함하는 시스템 |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP2359372B1 (enExample) |
| JP (2) | JP5753988B2 (enExample) |
| KR (1) | KR101687038B1 (enExample) |
| CN (1) | CN102257573B (enExample) |
| TW (1) | TWI517174B (enExample) |
| WO (1) | WO2010069045A1 (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10790011B2 (en) | 2018-02-26 | 2020-09-29 | SK Hynix Inc. | Address and command generation circuit, and semiconductor system |
| US11544004B2 (en) | 2020-01-20 | 2023-01-03 | SK Hynix Inc. | Nonvolatile memory device and memory system including the same |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150248316A1 (en) * | 2012-09-28 | 2015-09-03 | Hewlett-Packard Development Company, L.P. | System and method for dynamically selecting between memory error detection and error correction |
| KR20170086345A (ko) * | 2016-01-18 | 2017-07-26 | 에스케이하이닉스 주식회사 | 메모리 칩 및 메모리 컨트롤러를 포함하는 메모리 시스템 |
| CN107239363B (zh) * | 2017-05-27 | 2020-04-24 | 北京东土军悦科技有限公司 | 一种ecc信息上报方法及系统 |
| CN107134294B (zh) * | 2017-05-27 | 2020-04-24 | 北京东土军悦科技有限公司 | 一种ecc信息获取方法及系统 |
| US10963336B2 (en) | 2019-08-29 | 2021-03-30 | Micron Technology, Inc. | Semiconductor device with user defined operations and associated methods and systems |
| US11200118B2 (en) | 2019-08-29 | 2021-12-14 | Micron Technology, Inc. | Semiconductor device with modified command and associated methods and systems |
| US11042436B2 (en) | 2019-08-29 | 2021-06-22 | Micron Technology, Inc. | Semiconductor device with modified access and associated methods and systems |
| JP7575955B2 (ja) * | 2021-01-13 | 2024-10-30 | キヤノン株式会社 | 制御装置、システム、リソグラフィ装置、物品の製造方法、制御方法及びプログラム |
| KR102867713B1 (ko) | 2021-04-07 | 2025-10-13 | 삼성전자주식회사 | 반도체 메모리 장치 및 이를 포함하는 메모리 시스템 |
| US11822793B2 (en) * | 2022-04-04 | 2023-11-21 | Western Digital Technologies, Inc. | Complete and fast protection against CID conflict |
| CN119339751A (zh) * | 2023-07-19 | 2025-01-21 | 美光科技公司 | 基于错误率的电压缩放 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040148482A1 (en) * | 2003-01-13 | 2004-07-29 | Grundy Kevin P. | Memory chain |
| US20070162824A1 (en) * | 2004-01-30 | 2007-07-12 | Micron Technology, Inc. | Error detection and correction scheme for a memory device |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5826068A (en) * | 1994-11-09 | 1998-10-20 | Adaptec, Inc. | Integrated circuit with a serial port having only one pin |
| US5938742A (en) * | 1995-08-18 | 1999-08-17 | General Magic, Inc. | Method for configuring an intelligent low power serial bus |
| US6691257B1 (en) * | 2000-04-13 | 2004-02-10 | Stratus Technologies Bermuda Ltd. | Fault-tolerant maintenance bus protocol and method for using the same |
| US7234099B2 (en) * | 2003-04-14 | 2007-06-19 | International Business Machines Corporation | High reliability memory module with a fault tolerant address and command bus |
| US20040237001A1 (en) * | 2003-05-21 | 2004-11-25 | Sun Microsystems, Inc. | Memory integrated circuit including an error detection mechanism for detecting errors in address and control signals |
| DE10335978B4 (de) * | 2003-08-06 | 2006-02-16 | Infineon Technologies Ag | Hub-Baustein zum Anschließen von einem oder mehreren Speicherbausteinen |
| US7143207B2 (en) * | 2003-11-14 | 2006-11-28 | Intel Corporation | Data accumulation between data path having redrive circuit and memory device |
| DE102004004796B4 (de) * | 2004-01-30 | 2007-11-29 | Infineon Technologies Ag | Vorrichtung zur Datenübertragung zwischen Speichern |
| US8375146B2 (en) * | 2004-08-09 | 2013-02-12 | SanDisk Technologies, Inc. | Ring bus structure and its use in flash memory systems |
| JP2006065697A (ja) * | 2004-08-27 | 2006-03-09 | Hitachi Ltd | 記憶デバイス制御装置 |
| US20070165457A1 (en) * | 2005-09-30 | 2007-07-19 | Jin-Ki Kim | Nonvolatile memory system |
| US8335868B2 (en) | 2006-03-28 | 2012-12-18 | Mosaid Technologies Incorporated | Apparatus and method for establishing device identifiers for serially interconnected devices |
| US20070271495A1 (en) * | 2006-05-18 | 2007-11-22 | Ian Shaeffer | System to detect and identify errors in control information, read data and/or write data |
| EP2487794A3 (en) | 2006-08-22 | 2013-02-13 | Mosaid Technologies Incorporated | Modular command structure for memory and memory system |
| US8407395B2 (en) * | 2006-08-22 | 2013-03-26 | Mosaid Technologies Incorporated | Scalable memory system |
| JP5575474B2 (ja) * | 2006-08-22 | 2014-08-20 | コンバーサント・インテレクチュアル・プロパティ・マネジメント・インコーポレイテッド | スケーラブルメモリシステム |
| US7904639B2 (en) | 2006-08-22 | 2011-03-08 | Mosaid Technologies Incorporated | Modular command structure for memory and memory system |
| US8700818B2 (en) | 2006-09-29 | 2014-04-15 | Mosaid Technologies Incorporated | Packet based ID generation for serially interconnected devices |
| US7937641B2 (en) * | 2006-12-21 | 2011-05-03 | Smart Modular Technologies, Inc. | Memory modules with error detection and correction |
| KR101308047B1 (ko) * | 2007-02-08 | 2013-09-12 | 삼성전자주식회사 | 메모리 시스템, 이 시스템을 위한 메모리, 및 이 메모리를위한 명령 디코딩 방법 |
-
2009
- 2009-12-10 TW TW098142289A patent/TWI517174B/zh not_active IP Right Cessation
- 2009-12-10 CN CN200980151271.4A patent/CN102257573B/zh not_active Expired - Fee Related
- 2009-12-10 WO PCT/CA2009/001777 patent/WO2010069045A1/en not_active Ceased
- 2009-12-10 EP EP09832759.6A patent/EP2359372B1/en active Active
- 2009-12-10 KR KR1020117009393A patent/KR101687038B1/ko not_active Expired - Fee Related
- 2009-12-10 JP JP2011541038A patent/JP5753988B2/ja not_active Expired - Fee Related
-
2014
- 2014-12-19 JP JP2014257755A patent/JP2015099598A/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040148482A1 (en) * | 2003-01-13 | 2004-07-29 | Grundy Kevin P. | Memory chain |
| US20070162824A1 (en) * | 2004-01-30 | 2007-07-12 | Micron Technology, Inc. | Error detection and correction scheme for a memory device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10790011B2 (en) | 2018-02-26 | 2020-09-29 | SK Hynix Inc. | Address and command generation circuit, and semiconductor system |
| US11373699B2 (en) | 2018-02-26 | 2022-06-28 | SK Hynix Inc. | Address and command generation circuit, and semiconductor system |
| US11544004B2 (en) | 2020-01-20 | 2023-01-03 | SK Hynix Inc. | Nonvolatile memory device and memory system including the same |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2359372B1 (en) | 2020-04-08 |
| EP2359372A1 (en) | 2011-08-24 |
| KR20110103388A (ko) | 2011-09-20 |
| JP2015099598A (ja) | 2015-05-28 |
| CN102257573B (zh) | 2014-11-05 |
| TWI517174B (zh) | 2016-01-11 |
| TW201106369A (en) | 2011-02-16 |
| JP5753988B2 (ja) | 2015-07-22 |
| WO2010069045A1 (en) | 2010-06-24 |
| CN102257573A (zh) | 2011-11-23 |
| JP2012512467A (ja) | 2012-05-31 |
| EP2359372A4 (en) | 2017-06-21 |
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