KR101643871B1 - Solar cell and manufacturing method thereof - Google Patents

Solar cell and manufacturing method thereof Download PDF

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KR101643871B1
KR101643871B1 KR1020100082132A KR20100082132A KR101643871B1 KR 101643871 B1 KR101643871 B1 KR 101643871B1 KR 1020100082132 A KR1020100082132 A KR 1020100082132A KR 20100082132 A KR20100082132 A KR 20100082132A KR 101643871 B1 KR101643871 B1 KR 101643871B1
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electrode
layer
substrate
solar cell
emitter layer
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KR20120019042A (en
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심승환
김진아
남정범
정인도
양주홍
정일형
권형진
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엘지전자 주식회사
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

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Abstract

The present invention relates to a solar cell and a method of manufacturing the same. A solar cell according to the present invention comprises at least one groove for isolating a substrate, an emitter layer and an emitter layer on a substrate to insulate the front and back surfaces of the substrate, an antireflection film on the emitter layer, And an electrode layer in contact with the front electrode and the front electrode that are in contact with each other. The antireflection film is filled in the groove, and the electrode layer may be located on the antireflection film filled in the groove. Thereby, the transistors for bypassing the reverse current for each solar cell are integrated, and the reverse current generated in the local region in the solar cell can be controlled.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solar cell and a manufacturing method thereof,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solar cell and a method of manufacturing the same, and more particularly, to a solar cell having transistors integrated therein and a method of manufacturing the same.

With the recent depletion of existing energy sources such as oil and coal, interest in alternative energy to replace them is increasing. Among them, solar cells are attracting attention as next-generation batteries using semiconductor devices that convert solar energy directly into electric energy.

In the meantime, for solar power generation, several solar cells are connected in series or in parallel. In this case, when a solar cell is connected in series, if the output is mixed with other solar cells, When connected in parallel with the conditions, the overall voltage is adjusted toward the lower voltage, which may reduce the efficiency. In addition, a solar cell having a low output may act as a hot spot, and there is a risk that heat may be generated and destroyed as time goes by.

In order to prevent this, conventionally, a bypass diode is attached in a string unit in which several solar cells are connected. This is because, for example, when a reverse current due to shading of a specific solar cell in a string occurs in a local region, It can be difficult.

An object of the present invention is to provide a solar cell in which transistors capable of controlling reverse current are integrated and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a solar cell including a semiconductor substrate, a front electrode, a rear electrode, and a transistor, the gate and the source of the transistor being connected to the front electrode, , A reverse bias may be applied to the gate voltage and the source voltage of the transistor.

The substrate may also include a groove for isolating the emitter layer and the emitter layer on the substrate, and the source and the drain may be emitter layers separated by grooves.

Further, an insulating layer may be formed on the source and the drain, and the insulating layer may be filled in the groove.

Also, the front electrode may be connected to the source through the insulating layer.

According to another aspect of the present invention, there is provided a solar cell including: a substrate; at least one groove for isolating the emitter layer and the emitter layer on the substrate to insulate the front surface and the rear surface of the substrate; An antireflection film filled in the groove, and an electrode layer disposed on the antireflection film filled in the groove. The antireflection film may be formed on the antireflection film.

In addition, the electrode layer implements the gate, the emitter layer functions as the source and the drain, and the current can be bypassed.

In addition, an emitter layer in contact with the front electrode among the emitter layers separated by the grooves may be a source.

According to another aspect of the present invention, there is provided a method of fabricating a solar cell, comprising: forming an emitter layer on a substrate; forming a groove for insulating the front and back surfaces of the substrate to isolate the emitter layer; Forming an antireflection film on the emitter layer; forming a front electrode connected to the emitter layer through the antireflection film; and forming an electrode layer connected to the front electrode on the antireflection film.

Further, the antireflection film may be filled in the groove, and the electrode layer may be positioned to correspond to the position of the groove.

According to the present invention, the transistors for bypassing the reverse current for each solar cell are integrated to control the reverse current generated in the local region in the solar cell.

1 is a perspective view illustrating a solar cell according to an embodiment of the present invention,
FIG. 2 is a cross-sectional view taken along the line A-A 'in FIG. 1,
FIG. 3 is a view showing an equivalent circuit of the solar cell of FIG. 1,
FIGS. 4 to 8 illustrate a method of manufacturing the solar cell of FIG. 1,
FIG. 9 is a perspective view illustrating a solar cell module according to an embodiment of the present invention, and FIG.
10 is a cross-sectional view taken along the line B-B 'in FIG.

In the following drawings, each component is exaggerated, omitted, or schematically shown for convenience and clarity of explanation. Also, the size of each component does not entirely reflect the actual size.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a perspective view showing a solar cell according to an embodiment of the present invention, FIG. 2 is a cross-sectional view taken along the line A-A 'in FIG. 1, It is a degree.

1 and 2, a solar cell 100 according to the present invention includes a substrate 110, an emitter layer 120 on the substrate 110, and an emitter layer 120, The antireflection film 130 on the emitter layer 120 and the front electrode 140 in contact with the emitter layer 120 through the antireflection film 130 and the front electrode 140, And an electrode layer 170 in contact with the first electrode layer 140 and may include a rear electrode 160 located on the rear surface of the substrate 110. [

The substrate 110 may be formed of silicon. For example, B, Ga, In, or the like, which is a Group 3 element, may be doped with an impurity to realize a P type impurity. The emitter layer 120 may be doped with an impurity such as P, As, Sb, or the like, which is an N-type impurity and a Group 5 element.

When the substrate 110 and the emitter layer 120 are doped with an impurity of the opposite conductivity type, a PN junction is formed at the interface between the substrate 110 and the emitter layer 120, When examined, photovoltaic power can be generated by the photoelectric effect.

Meanwhile, the emitter layer 120 may be formed by doping the P-type substrate 110 with an N-type impurity. In this case, the dopant may be doped on the side surface of the substrate 110 during the doping of the N-type impurity. Thus, the front and rear surfaces of the substrate 110 can be electrically connected. The solar cell 100 may thus include at least one groove 150 for isolating the emitter layer 120 to insulate the front and back sides of the substrate 110.

The groove 150 is located below the electrode layer 170 and operates as a channel of the transistor A. When the reverse bias is applied to the solar cell 100, And the accumulated electrons can move to the outside through the front electrode 140. [ At least two grooves 150 are formed under the electrode layer 170 so that the transistor A may have a dual channel structure.

The antireflection film 130 may be formed of any one single film selected from the group consisting of silicon nitride, silicon oxide, silicon oxynitride, intrinsic amorphous silicon, MgF 2 , ZnS, TiO 2 and CeO 2 , And may have a combined multilayer structure.

The antireflection coating 130 immobilizes defects present in the surface or bulk of the emitter layer 120 and reduces the reflectivity of sunlight incident on the front surface of the substrate 110.

When the defect existing in the emitter layer 120 is immobilized, recombination sites of the minority carriers are removed, and the open-circuit voltage Voc of the solar cell 100 increases. When the reflectance of sunlight is reduced, the amount of light reaching the P-N junction is increased and the short circuit current Isc of the solar cell 100 increases. When the open-circuit voltage and the short-circuit current of the solar cell 100 are increased by the anti-reflection film 130, the conversion efficiency of the solar cell 100 can be improved accordingly.

The anti-reflection film 130 is filled in the groove 150 to prevent the inner surface of the groove 150 from being exposed to the air, thereby preventing the oxide from being formed on the inner surface of the groove 150. Accordingly, defects and electron-hole recombination can be prevented, and the efficiency of the solar cell 100 can be improved.

Although not shown in the drawing, the surfaces of the substrate 110, the emitter layer 120, and the anti-reflection film 130 may have a concave-convex structure. The concave-convex structure of the emitter layer 120 and the antireflection film 130 textures the surface of the substrate 110 to form a concave-convex pattern, and then the emitter layer 120 and the antireflection film 130 are formed on the substrate 110). If the surface of the substrate 110, the emitter layer 120, and the antireflection film 130 are roughened, the reflectance of the incident light decreases, and the optical trapping amount increases, thereby reducing the optical loss of the solar cell 100 .

The front electrode 140 may be formed, for example, by screen printing a front electrode paste containing silver, glass frit, or the like on a surface of the front electrode 140 using a mask having an opening, and then performing heat treatment.

At this time, the silver contained in the front electrode paste is converted into a liquid phase at a high temperature through a heat treatment process of the front electrode 140, and is then recrystallized to a solid phase, and is refined as a solid through the glass frit, through contact with the emitter layer 120.

9 and FIG. 10, the front electrode 140 is connected to the ribbon to connect the photovoltaic cell 100 to the front electrode 140, The generated electrons can be supplied to an external circuit.

The electrode layer 170 may be formed on the groove 150 filled with the antireflection film 130 and may be in contact with the front electrode 140.

As a result, the electrode layer 170 corresponds to the gate, and the emitter layers 121 and 122 separated by the trench 150 are connected to a transistor (Transistor A) corresponding to a source and a drain, Can be implemented.

That is, the solar cell 100 according to the present invention can include the transistor A integrated in the solar cell 100, and the transistor A can prevent the reverse current generated in the local region in the solar cell 100 The hot spot can be prevented.

The electrode layer 170 is in contact with the front electrode 140 and the front electrode 170 is in contact with the emitter layer 121 corresponding to the source of the transistor A through the antireflection film 130. As a result, (A) are connected to each other. The drain of the transistor A is connected to the rear electrode 160.

Referring to FIG. 3, when the reverse bias is generated in the solar cell 100 by shading or the like, the voltage of the emitter layer 121 can be instantaneously increased. This reverse bias is applied to the gate voltage and the source voltage of the transistor (A).

When the gate voltage is applied, holes existing in the substrate 110 are pushed out, and electrons in the source and drain are attracted by the holes pushed around the substrate 110, Inversion effect occurs. As a result, a channel through which a current can flow can be generated. That is, electrons are accumulated in the lower portion of the groove 150, and the accumulated electrons can move to the outside through the front electrode 140.

Therefore, the solar cell 100 according to the present invention includes the integrated transistor (A), so that the reverse current generated in the local region in the solar cell 100 can be controlled. Further, since the reverse bias is set to the gate voltage, the transistor A does not need to externally apply a voltage. Since the gate and the source are connected to each other, reverse current can be controlled simultaneously with generation of the reverse bias.

1, it is preferable that the electrode layer 170 is formed so as to be in contact with the outer circumferential surface of the outermost surface electrode 140 in consideration of the absorption of sunlight incident on the solar cell 100. The electrode layer 170 is a transparent electrode layer made of ITO, IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al-ZnO), AGZO And it is possible to prevent the absorption rate of light incident on the solar cell 100 from being reduced.

1, the electrode layer 170 is formed on all the outer circumferential surfaces of the outermost surface electrode 140. However, the present invention is not limited thereto, and only the outer surface of the outermost surface electrode 140 Of course.

That is, one transistor may be in contact with all the outer circumferential surfaces of the front electrode 140, or may be in contact with only a part of the front electrode 140, or discontinuous metal layers 170 may be formed to form several transistors. This can be appropriately selected in consideration of the magnitude of the reverse bias generated in the solar cell 100 and the power generation efficiency of the solar cell 100. [

The back electrode 160 may be formed by printing a back electrode paste to which a back electrode paste containing aluminum, quartz silica, a binder, and the like is added, on the back surface of the substrate 110 and then performing heat treatment. During the heat treatment of the printed rear electrode paste, aluminum, which is an electrode material, is diffused through the rear surface of the substrate 110, thereby forming a back surface field 160 on the interface between the rear electrode 160 and the substrate 110 .

The rear whole layer 160 can prevent the carrier from moving to the rear surface of the substrate 110 and recombine. If the recombination of the carriers is prevented, the open voltage increases and the efficiency of the solar cell 100 can be improved.

The solar cell 100 described with reference to FIGS. 1 and 2 has a structure in which a portion where the front electrode 140 is wired is referred to as a relative A selective emitter structure formed of a high concentration emitter layer 120 and a passive emitter and rear cell (PERC) structure, a passive emitter and rear locally-diffused cell (PERL) structure, .

4 to 8 are diagrams showing a method of manufacturing the solar cell of FIG.

First, as shown in FIG. 4, an emitter layer 120 is formed on a substrate 110 to form a P-N junction. The emitter layer 120 may be formed by a method such as a diffusion method, a spray method, or a printing method. In one example, the emitter layer 120 may be formed by implanting an N-type impurity into the P-type semiconductor substrate 110.

Although the rear electrode paste for forming the rear electrode 160 is applied to the rear surface of the substrate 110, the formation of the rear electrode 160 is not limited to that shown in FIG. 4, It can be formed at any stage.

In addition, although not shown in the figure, a concave-convex pattern may be formed on one surface of the substrate 110 on which the emitter layer 120 and the antireflection film 130 are sequentially formed. When the one surface of the substrate 110 is textured so as to have a concavo-convex pattern, the emitter layer 120 and the antireflection film 130 sequentially formed on the substrate 110 are formed along the concavo-convex pattern .

The concave and convex structure reduces the reflectance of sunlight incident on the solar cell 100, thereby increasing the amount of light trapped, thereby reducing the optical loss of the solar cell 100. As a method of forming the texturing structure, a method of immersing the substrate 110 in an etching solution or the like may be used, and the concavo-convex structure may be formed into various shapes such as a pyramid, a square, and a triangle.

Since the dopant material may be doped on the side surface of the substrate 110 in the process of doping the N-type impurity to form the emitter layer 120, the front and back surfaces of the substrate 110 are electrically connected to each other. Which may cause the efficiency of the solar cell 100 to be reduced.

5, grooves 150 may be formed to insulate the front surface and the rear surface of the substrate 110. FIG. The grooves 150 isolate the emitter layer 120 and the emitter layer 120 separated as described above may serve as the source and drain of the transistor. In addition, the groove 150 may serve as a channel of the transistor integrated in the solar cell 100 of the present invention.

The formation of the grooves 150 can be performed by a laser isolation process. However, if a laser isolation process is performed, a damage layer may be formed on the inner surface of the groove 150. This may cause deterioration of the solar cell efficiency. Therefore, a potassium hydroxide (KOH) solution or sodium hypochlorite The damage layer 330 may be removed using a base solution such as sodium hydroxide (NaOH).

After the groove 150 is formed, an anti-reflection film 130 is formed as shown in FIG. The antireflection film 130 may be formed by vacuum deposition, chemical vapor deposition, spin coating, screen printing, or spray coating, but is not limited thereto.

The antireflection film 130 may also be filled in the groove 150 to prevent the inner surface of the groove 150 from being exposed to the air to prevent the oxide from being formed on the inner surface of the groove 150 .

Next, as shown in FIG. 7, a front electrode 140 is formed. The front electrode 140 may be screen-printed using a mask having openings, the front electrode paste including silver (Ag), glass frit, and the like, drying the printed front electrode paste, .

In the drying step, the solvent contained in the paste is evaporated, and the front electrode 140 and the emitter layer 121 are connected by the fire through phenomenon during the firing process.

4, the rear electrode 160 may be formed by applying a rear electrode paste containing silver (Al) or the like to the rear surface of the substrate 110 and then performing a heat treatment. The backside layer 160 may be formed on the interface between the rear electrode 160 and the substrate 110 by diffusing the aluminum contained in the rear surface of the substrate 110 during the heat treatment of the rear electrode paste. The rear front layer 160 minimizes the rear recombination of the electrons generated by the sunlight, thereby contributing to the improvement of the efficiency of the solar cell.

Next, an electrode layer 170 is formed as shown in FIG. The electrode layer 170 is formed in contact with the front electrode 140. The electrode layer 170 may be formed by screen printing at a position where the electrode layer 170 is to be formed and then performing heat treatment in the same manner as the method of forming the front electrode 140. However, in order to prevent the electrode layer 170 from being connected to the emitter layer 120 by a fire through phenomenon, a paste containing no glass frit is used.

The electrode layer 170 is a transparent electrode layer made of ITO, IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al-ZnO), AGZO And the absorption rate of light incident on the solar cell 100 can be prevented from being reduced.

Meanwhile, since the electrode layer 170 functions as a gate of the transistor, the solar cell 100 according to the present invention can integrate the transistor into the solar cell 100 by a general solar cell manufacturing process. Thus, the transistors for bypassing the reverse current are integrated for each solar cell 100, and the reverse current generated in the local region in the solar cell 100 can be controlled.

It is preferable that the electrode layer 170 is formed so as to be in contact with the outer peripheral surface of the outermost front electrode 140. The electrode layer 170 may be continuously formed so as to be in contact with all the outer circumferential surfaces of the electrode layer 170 or only a part of the outermost surface electrode 140 may be in contact with the electrode layer 170. Accordingly, the transistor to be implemented may be formed such that one transistor is in contact with all or only a part of the outer circumferential surface of the front electrode 140, and the metal layer 170 is formed discontinuously so that several transistors may be implemented .

FIG. 9 is an exploded perspective view of a solar module according to an embodiment of the present invention, and FIG. 10 is an exploded side view of the solar module shown in FIG.

9 and 10, a solar module 200 according to the present invention includes a plurality of solar cells 250, a plurality of ribbons 243 for electrically connecting the plurality of solar cells, a plurality of ribbons 243, A first sealing film 231 and a second sealing film 232 for sealing the plurality of solar cells 250 on both sides thereof and a front substrate 250 for protecting the light receiving surface of the solar cell 250, And a rear substrate 220 for protecting the rear surface of the solar cell 250 and the rear substrate 220.

First, the ribbon 243 is attached to the upper and lower portions of the solar cell 250 by a tabletting process, respectively, so that the plurality of solar cells 250 can be electrically connected. The tableting process may be performed by applying a flux to one surface of the solar cell 250, placing the ribbon 243 on the solar cell 250 to which flux is applied, and then performing a firing process.

The plurality of solar cells 250 electrically connected by the ribbon 243 constitute the strings 240. The solar cell strings 240 may be positioned adjacent to each other to form several rows.

Referring to FIG. 10, in each solar cell 250 constituting the string 240, the electrons move to the emitter layer and the holes move to the substrate due to the photoelectric effect, so that the upper part of the solar cell 250 attracts the cathode , And the lower part becomes an anode. However, when a specific solar cell 250 is shaded by leaves, dust, or the like, reverse bias occurs in the solar cell 250, so that the upper part of the solar cell 250 has an anode and the lower part has a cathode, Lt; / RTI >

10, the reverse bias generated by the shading or the like is applied to the electrode layer 270 electrically connected to the front electrode 260 by the front electrode 260 and the electrode layer 270 electrically connected to the emitter layer 270 by the front electrode 260. In this case, Gt; 221, < / RTI > which operates on the gate voltage and source voltage of the transistor.

When the gate voltage is applied, the holes existing in the substrate are pushed out, and the holes pushed around the substrate attract electrons of the source and the drain, and electrons e - ) is accumulated.

On the other hand, since the emitter layer 222 separated by the groove 280 and connected to the rear electrode has a relatively low potential, the accumulated electrons can move to the outside through the front electrode 260 due to the potential difference. That is, the solar cell 250 in which the transistor according to the present invention is integrated can be the same as the flow of electrons in the case where reverse bias is generated, and the flow of electrons in the case where reverse bias is not generated. Accordingly, the solar cell 250 according to the present invention can control the reverse current generated in the local region in the solar cell 250. [

Since the integrated transistor uses the reverse bias of the solar cell 250 as the gate voltage, there is no need to externally apply the voltage, and the gate and the source are connected to each other so that the reverse current can be controlled simultaneously with the generation of the reverse bias . In particular, since the solar cell 250 according to the present invention can also control a low reverse bias, the leakage current can be controlled even in a wafer having a high concentration of impurities such as UMG.

On the other hand, the bus ribbon 245 is disposed at a portion where the solar cell string 240 is not disposed, and is connected to the ribbon 243. The bus ribbon 245 is connected to the front electrode and the rear electrode of the solar cell 250 so as to collect the electricity produced by the solar cell 250.

The bus ribbon 245 alternately connects both ends of the ribbon 243 of the solar cell string 240 to electrically connect the solar cell string 240. The bus ribbons 245 may be disposed transversely to both ends of the solar cell strings 240 arranged in a plurality of rows.

The solar cell string 240, which forms several rows, may be positioned between the first sealing film 231 and the second sealing film 232.

The first sealing film 231 may be located on the light receiving surface of the solar cell 250 and the second sealing film 232 may be positioned on the back surface of the solar cell 250. The first sealing film 231 and the second The sealing film 232 may be adhered by lamination to block water or oxygen which may adversely affect the solar cell 250.

In addition, the first sealing film 231 and the second sealing film 232 allow each element of the solar cell 250 to chemically bond. The first sealing film 231 and the second sealing film 232 may be made of an ethylene-vinyl acetate copolymer resin (EVA), a polyvinyl butyral, an ethylene-vinyl acetate partial oxide, a silicon resin, an ester- Can be used.

The front substrate 210 is positioned on the first sealing film 231 so as to transmit sunlight and is preferably made of tempered glass to protect the solar cell 250 from an external impact or the like. Further, it is more preferable to use a low-iron-content tempered glass containing a small amount of iron in order to prevent the reflection of sunlight and increase the transmittance of sunlight.

The rear substrate 220 is a layer for protecting the solar cell from the back surface of the solar cell 250 and has a waterproof, insulating and ultraviolet shielding function, and may be of TPT (Tedlar / PET / Tedlar) type .

The rear substrate 220 is preferably made of a material having a high reflectance so that sunlight incident from the front substrate 210 can be reflected and reused, and the rear substrate 220 can be formed of a transparent material from which sunlight can be incident.

The solar cell according to the present invention is not limited to the configuration and method of the embodiments described above, but the embodiments may be modified so that all or some of the embodiments are selectively combined .

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the present invention.

100: solar cell 110: substrate
120: Emitter layer 130: Antireflection film
140: front electrode 150: groove
160: Rear electrode 162: Rear front layer
170: electrode layer

Claims (20)

A semiconductor substrate, a front electrode, a rear electrode, and a transistor,
A gate and a source of the transistor are connected to the front electrode, a drain of the transistor is connected to the rear electrode,
Wherein when the reverse bias is generated in the solar cell, the reverse bias is applied to the gate voltage and the source voltage of the transistor to bypass the reverse current due to the reverse bias. The method according to claim 1,
And a groove for isolating the emitter layer and the emitter layer on the substrate, wherein the source and the drain are the emitter layers separated by the grooves. 3. The method of claim 2,
And an insulating layer on the source and the drain, wherein the insulating layer is filled in the groove. The method of claim 3,
Wherein the insulating layer is an antireflection film. The method of claim 3,
And the front electrode is connected to the source through the insulating layer. The method according to claim 1,
And a rear front layer between the rear electrode and the substrate. The method according to claim 1,
Wherein the source and the drain are n-type semiconductor layers. Board;
An emitter layer on said substrate;
At least one groove isolating the emitter layer to insulate the front and back surfaces of the substrate;
An antireflection film on the emitter layer;
A front electrode which is in contact with the emitter layer through the spin valve;
An electrode layer in contact with the front electrode; And
A rear electrode formed apart from the front electrode,
/ RTI >
Wherein the antireflection film is filled in the groove, the electrode layer is positioned on the antireflection film filled in the groove,
Wherein the electrode layer is a gate, the emitter layer is a source and a drain,
The gate and the source are connected to the front electrode, the drain is connected to the rear electrode,
Wherein when the reverse bias is generated in the solar cell, the reverse bias is applied to the gate voltage and the source voltage of the transistor to bypass the reverse current due to the reverse bias. delete 9. The method of claim 8,
And the emitter layer contacting the front electrode among the emitter layers separated by the grooves is the source. 9. The method of claim 8,
Wherein the electrode layer is a transparent electrode layer. 9. The method of claim 8,
Wherein a surface of the substrate, the emitter layer, and the antireflection film is a concavo-convex structure. 9. The method of claim 8,
Wherein the antireflection film is made of at least one material selected from the group consisting of silicon nitride (SiN x ), silicon oxide (SiO 2 ), and intrinsic amorphous silicon. Forming an emitter layer on the substrate;
Isolating the emitter layer by forming grooves for insulating the front and back surfaces of the substrate;
Forming an antireflection film on the emitter layer;
Forming a front electrode through the antireflection film and connected to the emitter layer;
Forming an electrode layer on the anti-reflection film, the electrode layer being connected to the front electrode; And
Forming a rear electrode spaced apart from the front electrode
Lt; / RTI >
Wherein the electrode layer is a gate, the emitter layer is a source and a drain,
The gate and the source are connected to the front electrode, the drain is connected to the rear electrode,
Wherein when the reverse bias is generated in the solar cell, the reverse bias is applied to the gate voltage and the source voltage of the transistor to bypass the reverse current due to the reverse bias. 15. The method of claim 14,
Wherein the antireflection film is filled in the groove, and the electrode layer is positioned to correspond to the position of the groove. 15. The method of claim 14,
Wherein the step of forming the emitter layer comprises doping an impurity having a conduction type opposite to that of the substrate. 15. The method of claim 14,
Wherein the groove is formed by any one of a laser isolation method, a plasma etching method, and an etching solution etching method. 15. The method of claim 14,
Wherein the electrode layer is formed by applying a paste containing no glass frit. 15. The method of claim 14,
And forming a rear electrode on a rear surface of the substrate. 20. The method of claim 19,
Wherein a rear front layer is formed between a rear surface of the substrate and a rear surface electrode of the upper substrate.
KR1020100082132A 2010-08-24 2010-08-24 Solar cell and manufacturing method thereof KR101643871B1 (en)

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JP2010080916A (en) 2008-09-26 2010-04-08 Dragon Energy Pte Ltd Solar cell panel
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JP2010524057A (en) 2007-03-30 2010-07-15 サンパワー コーポレイション Localized power point optimizer for solar cell devices
JP2010080916A (en) 2008-09-26 2010-04-08 Dragon Energy Pte Ltd Solar cell panel

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