KR101603566B1 - Semiconductor device drive circuit and semiconductor device drive unit - Google Patents

Abstract

An object of the present invention is to provide a semiconductor device driver circuit capable of miniaturization. The semiconductor device driving circuit 100 includes a high side driver 3 for on / off driving the high side switching element 5, a low side driver 4 for on / off driving the low side switching element 6, And a control switching element 14 that is turned on in conjunction with the ON state of the high side switching element 5. The positive potential input terminal of the low side driver 4 is connected to the positive potential VCC Side input terminal of the low-side driver 4 is connected to the negative side of the external second voltage source 12, both sides of the second voltage source are connected to the reference potential GND, and the connection point VS and the high- A capacitor 18 for an external negative voltage is inserted between the negative input terminals of the driver 3 and the high side switching element 5 and the controlling switching element 14 are connected between the negative voltage capacitor 18 and the high voltage source 8 ) To form a loop.

Description

Technical Field [0001] The present invention relates to a semiconductor device driving circuit and a semiconductor device driving device,

More particularly, the present invention relates to an external high-side switching element connected to an external high-voltage source, and an external low-side switching element connected in series between the high-side switching element and the reference potential. to a semiconductor device driving circuit for driving an external load by turning on / off a low-side switching element.

When driving a switching device such as a MOSFET or an IGBT having a low gate threshold value, it is necessary to apply a negative potential to the device reference potential (source potential) during turn-off.

To drive the switching device, a high side switching element and a low side switching element are used to turn on / off the switching device. A positive potential based on the source of each switching element is applied to the positive input terminal of each switching element and a negative potential based on the source of each switching element is applied to the negative input terminal of each switching element .

When the voltage sources are individually provided for the potential of the respective switching elements, the circuit scale increases, which is not preferable. Therefore, a technique is known in which a bootstrap circuit is connected to a voltage source for a positive potential of a low-side switching element, and a positive potential of the high-side switching element is generated.

A technique is also known in which a capacitor is provided between a source and a negative input terminal of a high side switching element and a capacitor is charged by a voltage source for a negative side of the low side switching element to generate a negative potential of the high side switching element (See, for example, Patent Document 1). In this case, a control switching element for controlling charge / discharge of the capacitor is provided. According to the power converter described in Patent Document 1, the ON state of the control switching element is interlocked with the ON state of the low side switching element, so that the capacitor is charged while the low side switching element is ON.

Japanese Patent Application Laid-Open No. 2011-66963

In the power converter described in Patent Document 1, since a high voltage which is a power source of a load (a switching device such as a MOSFET or an IGBT) is applied to both ends of the element while the control switching element is turned off, high- Is required. Also, high current performance sufficient to charge the capacitor is required. Therefore, the size of the switching element for control has become large, which has led to a problem of increasing the size of the circuit as a whole.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and it is an object of the present invention to provide a semiconductor device driver circuit which can be downsized as compared with the prior art.

The semiconductor device driving circuit according to the present invention drives and controls an external high-side switching element and an external low-side switching element connected in series between a high-side switching element and a reference potential connected to an external high- A semiconductor device driving circuit for driving a semiconductor device of a high-side switching device, comprising: a high-side driver for on / off-driving a high-side switching element; a low-side driver for on / The negative input terminal of the low side driver is connected to the positive potential of the first external voltage source, the negative potential of the first voltage source is connected to the reference potential, and the negative potential of the low side driver The input terminal is connected to the negative potential of the second external voltage source, The potential is connected to the reference potential and the constant potential input terminal of the high side driver is connected to an external bootstrap circuit for applying a positive voltage with reference to the connection point of the high side switching element and the low side switching element, A capacitor for external sub-potential is inserted between the connection point of the switching element and the low-side switching element and the sub-potential input terminal of the high-side driver, and the high-side switching element and the control switching element comprise a capacitor for the sub- Thereby forming a loop together.

According to the semiconductor device driver circuit of the present invention, when the control switching element is on, a high voltage is applied between the source and the drain of the control switching element by a high voltage source. That is, since the control switching element operates in the saturation region, it is possible to pass a sufficient current to the capacitor for the sub-field. When the switching element for control is off, only the voltage of about the second voltage source is applied to both ends of the switching element for control, so that the control switching element is not required to have high voltage resistance. Therefore, the demand for high current capability and high voltage resistance for the switching element for control is alleviated. That is, it is possible to further reduce the size of the switching element for control. It becomes possible to reduce the size of the control switching element, thereby making it possible to more easily integrate the entire semiconductor device driver circuit into one chip.

BRIEF DESCRIPTION OF DRAWINGS FIG. 1 is a diagram showing a configuration of a semiconductor device driver circuit according to a first embodiment. FIG.
2 is a diagram showing a configuration example of a high-voltage level shift circuit according to the first embodiment.
3 is a diagram showing a configuration example of the voltage clamp circuit according to the first embodiment.
4 is a diagram showing a configuration example of a charge current correction circuit according to the first embodiment.
5 is a diagram showing an operation sequence of the semiconductor device driver circuit according to the first embodiment.
6 is a diagram showing an operation region of the control switching element according to the first embodiment.
7 is a diagram showing a configuration example of a switch control circuit according to the second embodiment.
8 is a diagram showing an operation sequence of the semiconductor device driver circuit according to the second embodiment.
9 is a diagram showing the configuration of the semiconductor device driver circuit according to the third embodiment.
10 is a diagram showing a configuration example of a voltage clamp circuit according to the third embodiment.
11 is a diagram showing a configuration example of a high-voltage reverse-level shift circuit according to the third embodiment.
12 is a diagram showing a configuration example of a switch control circuit according to the third embodiment.
13 is a diagram showing an operation sequence of the semiconductor device driver circuit according to the third embodiment.
14 is a diagram showing a configuration of a semiconductor device driver circuit according to the fourth embodiment.
15 is a diagram showing a configuration example of a low-voltage level shift circuit according to the fourth embodiment.
16 is a diagram showing an operation sequence of the semiconductor device driver circuit according to the fourth embodiment.
17 is a diagram showing a configuration of a semiconductor device driver circuit according to Embodiment 5;
18 is a diagram showing an operation sequence of the semiconductor device driver circuit according to the fifth embodiment.

≪ Embodiment 1 >

<Configuration>

Fig. 1 shows a configuration of a semiconductor device driving apparatus according to the present embodiment. The semiconductor device driving apparatus according to the present embodiment includes a semiconductor device driver circuit 100, a bootstrap circuit 20 to be described later, and a capacitor 18 for a negative potential. The semiconductor device driving apparatus further includes a high-side switching element 5 and a low-side switching element 6 for driving the load 7 on / off. The high-side switching element 5 and the low-side switching element 6 are, for example, n-type MOSFETs.

The semiconductor device driving circuit 100 includes a high side driver 3 and a low side driver 4 for on / off driving the external high side switching element 5 and the low side switching element 6, respectively . The external load (that is, the semiconductor device) 7 is driven by turning on / off the high-side switching element 5 and the low-side switching element 6.

The high side switching element 5 and the low side switching element 6 are connected in series and the source of the low side switching element 6 is connected to the reference potential GND. The drain of the high side switching element 5 is connected to the positive potential of the external high voltage source 8 and the negative potential side of the high voltage source 8 is connected to the reference potential GND. The load 7 is connected between the connection point VS of the high side switching element 5 and the low side switching element 6 and the reference potential GND.

The positive input terminal of the low side driver 4 is connected to the positive potential VCC of the first external voltage source 11. The negative potential of the first voltage source 11 is connected to the reference potential GND.

The negative input terminal of the low side driver 4 is connected to the negative potential of the second external voltage source 12 and the negative potential of the second voltage source 12 is connected to the reference potential LGND. Further, the positive potential of the second voltage source 12 is connected to the reference potential GND.

The constant-potential input terminal of the high-side driver 3 is connected to an external bootstrap circuit 20 which applies positive voltage with reference to the connection point VS.

The bootstrap circuit 20 is constituted by a resistance element 9, a diode 10 and a capacitor for electrostatic potential 17 connected in series between a first voltage source 11 and a connection point VS. The capacitor for electrostatic charge 17 is connected between the positive potential input terminal of the high side driver 3 and the connection point VS. An external sub-capacitor (18) is inserted between the connection point (VS) and the negative input terminal of the high-side driver (3).

The semiconductor device driver circuit 100 according to the present embodiment further includes a control switching element 14 and a switch control circuit 13 for controlling ON / OFF of the control switching element. The source of the control switching element 14 is connected to the reference potential LGND and the drain thereof is connected to the negative input terminal of the high side driver 3.

The semiconductor device driver circuit 100 according to the present embodiment further includes an input circuit 1. The input circuit 1 receives a high side signal HIN for controlling ON / OFF of the high side driver 3 and a low side signal LIN for controlling ON / OFF of the low side driver 4. [

The high-side level shift circuit 2 and the switch control circuit 13 at the previous stage of the high-side driver 3 receive the high-side signal HIN via the input circuit 1. The low-side signal LIN is input to the low-side driver 4 via the input circuit 1.

To the switch control circuit 13, a signal LSB having the same waveform as that of the high side signal HIN is inputted via the input circuit 1. Further, the switch control signal LSA is inputted to the switch control circuit 13, and when the signal LSB and at least one of the switch signals LSA are at the high level, the switch control circuit 13 outputs the high level signal to the connection point SOUT.

An example of the high-voltage level shift circuit 2 is shown in Fig. The high-voltage level shift circuit 2 shifts the signal level of the signal based on the input-side potential (positive potential VCC, reference potential LGND) to a signal level based on the potential on the output side (connection point VB, LVS) Into a circuit.

At this time, as shown in Fig. 1, the voltage clamp circuit 16 may be inserted into both ends of the capacitor 18 for the negative electrode. The voltage clamp circuit 16 has a function of fixing the voltage at both ends of the capacitor 18 for the negative electrode to a predetermined value when the voltage across the negative capacitor 18 exceeds a predetermined value. An example of the voltage clamp circuit 16 is shown in Fig.

1, the charge current correction circuit 15 may be additionally provided so as to be connected to the connection points VB, VS, and LVS. An example of the charge current correction circuit 15 is shown in Fig. At this time, the function of the charge current correction circuit 15 will be described later.

<Operation>

The operation of the semiconductor device driver circuit 100 in this embodiment will be described. Fig. 5 shows an operation sequence of the semiconductor device driving circuit 100. Fig. 5 is a graph showing a change with time of the potential of each connection point and each input signal.

First, an initial operation will be described. Initially, the first and second voltage sources 11 and 12 start (operations 101 and 102). Next, in order to initially charge the capacitor 17 for the constant potential, a continuous pulse-like low-side signal LIN is input to the input circuit 1 (operation 103). Then, the low side switching element 6 is turned on (operation 104), and the capacitor 17 is charged by the first voltage source 11 (operation 105).

The switch control circuit 13 is also supplied with a continuous pulse-like switch signal LSA (operation 106), the control switching device 14 is turned on (operation 107), and the second voltage source 12 Capacitor 18 is initially charged (act 108).

Subsequently, the high voltage source 8 is started (operation 109). Next, to further charge the capacitor 18 for initialization, a pulse-shaped high-side signal HIN is input to the input circuit 1 (operation 110). Since the high-side switching element 5 is turned on (operation 111) and the control switching element 14 is also turned on (operation 112), the high-voltage source 8 and the second voltage source 12 The capacitor 18 is charged (action 113). When the high-side switching element 5 is turned off, the capacitor 18 for negative power is discharged (operation 114), and the negative potential input terminal of the high-side driver 3 is charged with a negative potential Is applied.

Next, the normal operation will be described. When the high-level low-side signal LIN is input to the input circuit 1 (operation 115), the low-side switching device 6 is turned on (operation 116). While the low side switching element 6 is on, the capacitor 17 for the positive voltage is charged by the first voltage source 11 (operation 117), and the discharge of the capacitor 18 for the negative voltage causes the high side driver 3 A negative potential based on the connection point VS is applied.

At this time, when the low side switching element 6 is off, the control switching element 14 is off and a voltage of about the second voltage source 12 is applied between the source and the drain of the control switching element 14.

Next, when a high-level high-side signal HIN is input to the input circuit 1 (operation 118), the high-side switching element 5 is turned on (operation 119). When the high side switching element 5 is turned on, the capacitor 17 for the positive potential is discharged (operation 120), and a positive potential based on the connection point VS is applied to the positive potential input terminal of the high side driver 3.

Further, the control switching element 14 is also turned on in conjunction with the ON state of the high-side switching element 5 (operation 121). Since the closed loop including the secondary capacitor 12, the high voltage source 8 and the secondary voltage source 12 is formed by the high voltage source 8 and the second voltage source 12, (Operation 122). At the same time, a negative potential based on the connection point VS is applied to the negative input terminal of the high side driver 3 by the high voltage source 8 and the second voltage source.

When the high-side switching element 5 is turned off (operation 123), the capacitor 18 for the sub-potential is discharged (operation 124) A negative potential is applied.

At this time, a constant potential based on the reference potential GND is always applied from the first voltage source 11 to the constant potential input terminal of the low-side driver 4. The sub-potential input terminal of the low-side driver 4 is always applied with the reference potential GND as a reference from the second voltage source 12.

Next, the charge current correction circuit 15 will be described. When the positive electrostatic capacitor 17 of the bootstrap circuit 20 is discharged and a positive potential is applied to the positive potential input terminal of the high side switching element 5, the positive and negative potential inputs of the high side driver 3 When the potential difference between the terminals exceeds the voltage necessary for driving the high side driver 3, the discharging current of the capacitor for electrostatic potential 17 is used for charging the capacitor for negative power. At this time, both ends of the capacitor for the sub-capacitor 18 are short-circuited via the current limiting circuit (for example, the transistor in Fig. 4). The current flowing between the source and the drain of the transistor is limited by the voltage applied to the gate. As a result, the charging current of the secondary-side capacitor 18 is increased, so that the charging of the secondary-side capacitor 18 can be performed more rapidly. At this time, the circuit configuration of FIG. 4 is an example, and a circuit having the above-described function is sufficient.

<Effect>

Conventionally, the control switching element 14 is turned on in conjunction with the on state of the low-side switching element 6 in the circuit configuration of Fig. That is, when the control switching element 14 is on, only the voltage of the second voltage source 12 is applied between the source and the drain of the control switching element 14. At this time, the control switching element 14 operates in the linear region of Fig. That is, in order to allow a sufficient current to flow in the capacitor 18 for the sub-field under the linear region, the control switching element 14 is required to have a high current capability.

On the other hand, in the present embodiment, when the control switching element 14 is on, a voltage higher than the conventional voltage is applied between the source and the drain of the control switching element 14 by the second voltage source 12 and the high voltage source 8 . That is, since the control switching element 14 operates in the saturation region shown in Fig. 6, it is possible to pass a sufficient current to the capacitor for negative power 18.

Further, conventionally, when the control switching element 14 is off, a high voltage is applied between the source and the drain of the switching element 14 for control by the second voltage source 12 and the high voltage source 8, The switching element 14 is required to have a high voltage resistance. On the other hand, in the present embodiment, since only the voltage of about the second voltage source 12 is applied to both ends of the control switching element 14 when the control switching element 14 is off, High pressure resistance as in the prior art is not required.

Therefore, in the semiconductor device driver circuit 100 according to the present embodiment, the demand for high current capability and high voltage resistance for the control switching element 14 is relaxed compared with the conventional one. Therefore, it is possible to make the control switching element 14 more compact. By miniaturizing the control switching element 14, it becomes possible to more easily integrate the entire semiconductor device driver circuit 100 into one chip.

The semiconductor device driver circuit 100 according to the present embodiment has a serial connection (not shown) between an external high-side switching element 5 and a high-side switching element 5 connected to an external high- The semiconductor device driving circuit 100 for driving the external semiconductor device 7 by driving the external side low side switching device 6 on / Side driver 3 for driving the high-side switching element 5, a low-side driver 4 for driving the low-side switching element 6 to turn on and off, and a control switching element 14 for turning on the high- , The positive input terminal of the low side driver 4 is connected to the positive potential of the first external voltage source 11, the negative potential of the first voltage source 11 is connected to the reference potential GND, 4) The constant potential of the second voltage source 12 is connected to the reference potential GND and the constant potential input terminal of the high side driver 3 is connected to the high side switching element 5 and an external bootstrap circuit 20 for applying a positive voltage with reference to a connection point VS of the low side switching element 6 and connected to an external bootstrap circuit 20 connected between the high side switching element 5 and the low side switching element 6 A capacitor 18 for an external negative potential is inserted between the connection point VS and the negative input terminal of the high side driver 3 and the high side switching element 5 and the control switching element 14 are connected to the non- (18), a high voltage source (8), and a second voltage source (12).

Therefore, when the control switching element 14 is on, a high voltage is applied between the source and the drain of the control switching element 14 by the high voltage source 8. [ That is, since the control switching element 14 operates in the saturation region, it is possible to pass a sufficient current to the capacitor 18 for the sub-field. When the control switching element 14 is off, only the voltage of the second voltage source 12 is applied to both terminals of the control switching element 14, so that the control switching element 14 is not required to have high voltage resistance Do not. Therefore, in the semiconductor device driver circuit 100 according to the present embodiment, the demand for high current capability and high voltage resistance for the control switching element 14 is relaxed compared with the conventional one. That is, it is possible to make the control switching element 14 more compact. The control switching element 14 can be miniaturized, and the semiconductor device driver circuit 100 can be more easily integrated into one chip.

The semiconductor device driver circuit 100 according to the present embodiment further includes a voltage clamp circuit 16 for preventing the voltage applied to both ends of the capacitor 18 for the secondary side from exceeding a predetermined value. Therefore, it is possible to prevent overcharging of the capacitor 18 for the negative power. By preventing overcharging, it is possible to extend the life of the capacitor 18 for the secondary side.

The semiconductor device driver circuit 100 further includes a charge current correction circuit 15. The bootstrap circuit 20 is connected between the positive input terminal of the high side driver 3 and the high side input terminal of the high side driver 3, And a constant current capacitor 17 connected between the side switching element 5 and the connection point VS of the low side switching element 6. The charging current correction circuit 15 is connected between the positive potential input of the high side driver 3 Both ends of the capacitor for electrostatic potential (17) are short-circuited via a current limiting circuit that limits the amount of current when the potential difference between the terminal and the negative input terminal exceeds a predetermined value.

Therefore, it is possible to short-circuit the both ends of the capacitor 17 for the electrostatic potential through the current limiting circuit (for example, the transistor in Fig. 3) to charge the capacitor 18 for the negative electrode by discharging the capacitor for electrostatic potential 17 It is possible. Therefore, by adding the charge current correcting circuit 15, the charge current of the capacitor for negative power 18 can be further increased. Therefore, it is possible to shorten the charging time of the capacitor 18 for the sub-electric potential.

The semiconductor device driving apparatus according to the present embodiment includes a semiconductor device driving circuit 100, a high side switching element 5, a low side switching element 6, a capacitor for a negative power 18, And further includes a strap circuit (20).

Therefore, even when a high-side or a low-side switching element or the like is added to the semiconductor device driver circuit 100 to constitute a power module, it is possible to miniaturize the entire module by downsizing the semiconductor device driver circuit 100 .

In the semiconductor device driving apparatus according to the present embodiment, the high-side switching element 5 and the low-side switching element 6 are characterized by including a wide bandgap semiconductor.

Therefore, by configuring the high-side switching element 5 and the low-side switching element 6 with a wide-gap semiconductor material such as SiC or GaN, high-speed switching under high temperature becomes possible.

&Lt; Embodiment 2 >

The semiconductor device driver circuit in this embodiment is obtained by replacing the switch control circuit 13 in the first embodiment (Fig. 1) with the switch control circuit 13A shown in Fig. Since the configuration other than the switch control circuit 13A is the same as that in Embodiment 1 (Fig. 1), the description is omitted.

The switch control circuit 13A in the present embodiment further includes a pulse generating unit 131 for the switch control circuit 13 in the first embodiment. When the high level signal LSB is continuously inputted, the pulse generating section 131 outputs a high level signal to the connection point LSP until a predetermined time elapses, and outputs a low level signal after a lapse of a predetermined time do. That is, the pulse generating section 131 has a function of turning off the control switching element 14 after a predetermined time has elapsed since the control switching element 14 is turned on. At this time, the configuration of the pulse generator 131 shown in Fig. 7 is merely an example, and a configuration having the above-described functions is sufficient.

The operation of the semiconductor device driver circuit in this embodiment will be described with reference to the sequence diagram of Fig. In the first embodiment, the control switching element 14 is turned on / off in conjunction with on / off of the high side switching element 5. In the present embodiment, as shown by the operation 221 in Fig. 8, the control switching element 14 turns off after a certain period of time after it is turned on in conjunction with the high-side switching element 5 being turned on. The other operations, that is, the operations 201 to 220 and the operations 222 to 224 are the same as the operations 101 to 120 and the operations 122 to 124 in Fig. 5 of the first embodiment, and therefore description thereof will be omitted.

The time from when the control switching element 14 is turned on to when it is turned off can be adjusted, for example, by changing the capacitance of the capacitor provided in the pulse generating section 131 in Fig. The time from when the control switching element 14 is turned on to when it is turned off may be set based on the time required for charging the capacitor 18 for the sub-electric potential. This is because the control switching element 14 does not have to be turned on after the charging of the secondary capacitor 18 is completed.

<Effect>

In the semiconductor device driver circuit according to the present embodiment, it is possible to adjust the time until the control switching element 14 is turned on and then turned off.

Therefore, in the present embodiment, since the time during which the control switching element 14 is turned on can be minimized, the effect of reducing power consumption and suppressing heat generation by energization are expected.

&Lt; Embodiment 3 >

<Configuration>

Fig. 9 shows a circuit configuration of the semiconductor device driver circuit 300 according to the present embodiment. Fig. 10 shows an example of the voltage clamp circuit 16A in this embodiment. A high-voltage reverse-level shift circuit 51 is inserted between the connection point VS and the connection point LVS. An example of the high-voltage reverse-level shift circuit 51 is shown in Fig. 12 shows an example of the switch control circuit 13B in this embodiment. Other configurations are the same as those in Embodiment 1 (Fig. 1), and a description thereof will be omitted.

<Operation>

The voltage clamp circuit 16A is a circuit for preventing the voltage across the negative capacitor 18 from exceeding a predetermined value, like the voltage clamp circuit 16 in the first embodiment. The voltage clamp circuit 16A in the present embodiment is configured to apply the high level signal DLVS to the high voltage (high voltage) when the voltage at both ends of the capacitor 18 for the subelectric potential (that is, the voltage between the connection point VS and the connection point LVS) To the inverse level shift circuit (51). By setting the predetermined value of the voltage to be set in the voltage clamp circuit 16A to the voltage when the capacitor 18 for the sub-electric potential is charged, the signal DLVS of the high level becomes a signal indicating completion of charging the capacitor 18 for the sub- .

The high voltage reverse level shift circuit 51 converts the level of the signal based on the voltage between the connection point LVS and the connection point VS into the level of the signal based on the voltage between the connection point LGND and the constant potential VCC, Respectively. The high voltage reverse level shift circuit 51 converts the reference potential of the signal DLVS and outputs it as the signal LSC to the switch control circuit 13B.

The switch control circuit 13B in the present embodiment further receives the signal LSC as compared with the switch control circuit 13 in the first embodiment. When the signal LSB input from the input circuit 1 is at the high level and the signal LSC is at the high level, the switch control circuit 13B outputs the low level signal from the terminal SOUT. That is, when a high-level signal LSC indicating that the voltage at both ends of the capacitor 18 for the negative electrode reaches a predetermined value is input, the switch control circuit 13B turns off the control switching element 14. The control switching element 14 is turned off, so that the charging of the capacitor 18 for the sub-electric potential is stopped. The other operations are the same as those in the first embodiment, and a description thereof will be omitted.

The operation of the semiconductor device driver circuit 300 in this embodiment will be described with reference to the sequence diagram of FIG. When the high-side switching element 5 is turned on in the operation 319 of Fig. 13, the control switching element 14 is also turned on in conjunction with the high-side switching element 5 (operation 321), and charging of the capacitor 18 for the sub- 322).

When the charging of the secondary side capacitor 18 is completed and the voltage at both ends of the secondary side capacitor 18 (voltage between the connection point VS and the connection point LVS) exceeds a predetermined value (operation 323) Since the signal DLVS is output (operation 324), the level of the signal LSC input to the switch control circuit 13B is switched from the low level to the high level. Accordingly, since the potential of the connection point LSP in the switch control circuit 13B changes from the high level to the low level (operation 325), the potential of the output S OUT becomes low level and the control switching element 14 is turned off (Operation 326). When the control switching element 14 is turned off, the charging of the capacitor 18 for the sub-electric potential is stopped.

When the high side switching element 5 is turned off, a negative potential based on the connection point VS is applied (operation 327) to the negative potential input terminal of the high side driver 3 by discharging the negative potential capacitor 18. Other operations, that is, the operations 301 to 318 and the operation 320 are the same as the operations 101 to 118 and the operation 120 in Fig. 5 in the first embodiment, and therefore description thereof will be omitted.

<Effect>

The semiconductor device driver circuit 300 according to the present embodiment is characterized in that the charging of the capacitor 18 for the sub-electric potential is stopped when the voltage at both ends of the capacitor 18 for the sub-electric potential reaches a predetermined value.

Therefore, when the voltage at both ends of the capacitor 18 for the negative electrode reaches a predetermined value, the control switching element 14 is automatically turned off. Therefore, in addition to the effects described in the second embodiment, It is possible to quickly detect the overvoltage and turn off the switching element for control 14 to prevent overcharging of the capacitor for the secondary side.

&Lt; Fourth Embodiment >

<Configuration>

The circuit configuration of the semiconductor device driver circuit 400 in this embodiment is shown in Fig. An example of the low-level shift circuit 71 shown in Fig. 14 is shown in Fig. In Embodiment 1 (Fig. 1), the reference potential of the high-side signal HIN and the low-side signal LIN input to the input circuit 1 was the reference potential LGND. In addition, the reference potential of the high-voltage level shift circuit 2 is set as the connection point LVS. On the other hand, in the present embodiment, the reference potential of the high-side signal HIN and the low-side signal LIN is made equal to the reference potential GND of the load 7. The reference potential of the high-voltage level shift circuit 2 is taken as the connection point VS.

In this embodiment, a low-voltage level shift circuit 71 is provided in front of the high-side driver 3, the low-side driver 4, and the switch control circuit 13. The low-voltage level shift circuit 71 is a circuit having a function of changing the reference potential of a signal between input and output, and an example thereof is shown in Fig. The positive polarity and the negative polarity of the power supply on the input side of the low-voltage level shift circuit 71 are respectively connected to the reference potential of the input signal. The cathode of the power source on the output side is connected to the reference potential of the output signal. For example, in the case of the low-voltage level shift circuit 71 provided at the front end of the low-side driver 4, the positive and negative electrodes of the power source on the input side are connected to the positive potential VCC and the reference potential GND, respectively, The cathode is connected to the reference potential LGND. Other configurations are the same as those in Embodiment 1 (Fig. 1), and a description thereof will be omitted.

<Operation>

The operation of the semiconductor device driver circuit in this embodiment will be described with reference to the sequence diagram of Fig. When comparing FIG. 16 and the sequence diagram (FIG. 5) in Embodiment 1, the reference potential of the high side signal HIN, the low side signal LIN, and the switching signal LSA is changed from the reference potential LGND to the reference potential GND. Further, the reference potential of the connection point HBVS on the output side of the high-voltage level shift circuit 2 changes from the potential of the connection point LVS to the potential of the connection point VS. The time change of the potential of the connection point HBVS becomes the same waveform as the temporal change of the potential of the high side signal HIN and the connection point HOUT.

In Fig. 16, the change of the potential waveform at each connection point is shown in Fig. In other words, the operations 401 to 424 in FIG. 16 are the same as the operations 101 to 124 in FIG. 5, and the detailed description of the operation will be omitted.

<Effect>

The semiconductor device driver circuit 400 according to the present embodiment further includes a low voltage level shift circuit 71 at the front end of each of the high side driver 3, the low side driver 4 and the control switching element 14 do.

Therefore, even when the input signal having the reference potential of the load is inputted, it is possible to change the reference potential of the signal by the low-voltage level shift circuit 71. Therefore, similarly to the first embodiment, (400). Further, by disposing the low-level shift circuit 71, it is possible to change the reference potential of the circuit (for example, the input circuit 1) from which the stability of the power supply is required from the reference potential LGND to the reference potential GND. Therefore, the second voltage source 12 can be simplified.

&Lt; Embodiment 5 >

<Configuration>

The circuit configuration of the semiconductor device driver circuit 500 in this embodiment is shown in Fig. In the semiconductor device driver circuit 400 of the fourth embodiment, a negative potential is applied from the second external voltage source 12 to the negative input terminal of the low-side driver 4. On the other hand, in the present embodiment, an external capacitor 81 is used in place of the external voltage source 12.

Between the negative input terminal of the high side driver 3, that is, the connection point LVS and the reference potential LGND (that is, the negative potential side of the second voltage source 12 in Embodiment 4), the cathode is connected to the connection point LVS Diode 83 with current resistance and current limiting resistor 84 are inserted in series. A diode 82 connected to the connection point LVS is inserted between the connection point LVS and the drain of the control switching element 14. Further, the source of the control switching element 14 is connected to the reference potential GND. Since the other structures are the same as those in Embodiment 4 (Fig. 14), description thereof will be omitted.

<Operation>

While the high-side switching element 5 is on, the high-voltage source 8 charges the capacitor 18 for the sub-potential and applies the negative potential to the negative input terminal of the high-side driver 3.

When the high side switching element 5 is turned off and the low side switching element 6 is turned on, a negative potential is applied to the negative potential input terminal of the high side driver 3 by the capacitor 18 for the negative side. The low side switching element 6 also forms a loop together with the capacitor 18 for the negative side, the external capacitor 81, the current limiting resistor 84 and the diode 83. Then, the external capacitor 81 is charged by the discharge of the capacitor 18 for the non-electric potential.

Next, when the high-side switching element 5 is turned on and the low-side switching element 6 is turned off, the external capacitor 81 is discharged, so that a negative potential is applied to the negative input terminal of the low- Is done.

In this embodiment, the negative voltage is applied to the negative input terminal of the low-side driver 4 by using the external capacitor 81 instead of the second voltage source 12 in the fourth embodiment.

The operation of the semiconductor device driver circuit 500 will be described in detail with reference to the sequence diagram of FIG. First, an initial operation will be described. Initially, the first voltage source 11 is started (operation 501). Next, in order to initially charge the capacitor for electrostatic charging 17, a continuous pulse-like low-side signal LIN is input to the input circuit 1 (operation 502). Then, the low side switching element 6 is turned on (operation 503), and the capacitor 17 for the constant potential is charged by the first voltage source 11 (operation 504).

A continuous pulse-like switching signal LSA is also inputted to the switch control circuit 13 (operation 505), the switching element 14 for control is turned on (operation 506), but the sub-potential capacitor 18 is not charged (Operation 507).

Then, the high voltage source 8 is started (operation 508). Next, in order to initially charge the secondary capacitor 18, the pulse-like high-side signal HIN is input to the input circuit 1 (operation 509). Then, since the signal is input to the high side driver 3 through the high voltage level shift circuit 2 and the low voltage level shift circuit 71 (operation 510), the high side switching element 5 is turned on (operation 511 ). The control switching element 14 is also turned on in conjunction with the ON operation of the high side switching element 5 (operation 512), so that the capacitor 18 for the negative potential is charged by the high voltage source 8 (operation 513). When the high side switching element 5 is turned off, the negative side capacitor 18 is discharged (operation 514), and the negative side input terminal of the high side driver 3 is connected to the negative side Is applied.

Next, in order to initially charge the external capacitor 81, a continuous pulse-like low-side signal LIN is input to the input circuit 1 (operation 515). Then, the low side switching element 6 is turned on (operation 516) and the external capacitor 81 is charged by the discharge of the capacitor 18 for the negative side (operation 517). Further, while the low side switching element 6 is on, the capacitor for electrostatic potential 17 is charged by the first voltage source 11 (operation 518).

Next, the normal operation will be described. When the high-level low-side signal LIN is input to the input circuit 1 (operation 519), the low-side switching element 6 is turned on (operation 520). At this time, the high-side switching element 5 and the control switching element 14 are off, and the low-side switching element 6 is connected to the capacitor 18, the external capacitor 81, the current limiting resistor 84, (83). Thus, the capacitor 18 is discharged (act 521) and the external capacitor 81 is charged (act 522). At the same time, a negative potential is applied to the negative input terminal of the low-side driver 4 by the discharge of the external capacitor 81. [

When the low side switching element 6 is turned off, a negative potential is applied to the negative potential input terminal of the low side driver 4 by the discharge of the external capacitor 81 (operation 523).

Next, when a high-level high-side signal HIN is input to the input circuit 1 (operation 524), the high-side switching element 5 is turned on (operation 525). When the high side switching element 5 is turned on, the capacitor 17 is discharged (operation 526), and a positive potential based on the connection point VS is applied to the positive potential input terminal of the high side driver 3.

Further, the control switching element 14 is also turned on in conjunction with the ON state of the high side switching element 5 (operation 527). Then, since the loop including the capacitor 18 and the high voltage source 8 is formed, the capacitor 18 for the negative potential is charged by the high voltage source 8 (operation 528). At the same time, a negative potential based on the connection point VS is applied to the negative potential input terminal of the high side driver 3 by the high voltage source 8. [

Then, when the high-side switching element 5 is turned off, the capacitor 18 for negative power is discharged (operation 529), and the negative potential input terminal of the high-side driver 3 is connected to the negative potential Is applied. At this time, a positive potential based on the reference potential GND is always applied to the positive input terminal of the low-side driver 4 by the first voltage source 11.

<Effect>

The semiconductor device driver circuit 500 according to the present embodiment further includes a diode 83 connected between a negative input terminal of the high side driver 3 and a negative potential side of the second voltage source 12, An external capacitor 81 is provided in place of the second voltage source 12 and the low side switching element 6 is connected to the negative input terminal of the high side driver 3, The capacitor 18, the external capacitor 81 and the diode 83 form a loop.

Therefore, in the present embodiment, the external capacitor 81 is used instead of the external second voltage source 12 as a voltage source for applying a negative potential to the negative input terminal of the low-side driver 4. Therefore, since one power source can be reduced, the circuit can be simplified.

At this time, the present invention can freely combine the embodiments or can appropriately modify or omit the embodiments within the scope of the invention.

1 high-voltage level shift circuit, 3 high-side driver, 4 low-side driver, 5 high-side switching element, 6 low-side switching element, 7 load, 8 high-voltage source, 9 resistive element, 10 diode, 11 first voltage source 16 voltage clamp circuit, 17 capacitors for capacitors, 18 capacitors for capacitors, 20 bootstrap circuit, 51 high-voltage switch circuit, 15 switch control circuit, 14 control switching element, 15 charge current compensation circuit, Reverse bias circuit, 71 low-level shift circuit, 81 external capacitor, 82, 83 diode, 84 current-limiting resistor, 100, 300, 400, 500 semiconductor device driver circuit.

Claims (9)

An external high-side switching element connected to an external high-voltage source, and an external low-side switching element connected in series between the high-side switching element and a reference potential, As such,
A high-side driver for driving the high-side switching element on / off,
A low side driver for on / off driving the low side switching element,
And a control switching element which is turned on in conjunction with the ON state of the high side switching element,
Wherein a positive potential input terminal of the low side driver is connected to a positive potential of an external first voltage source, a negative potential of the first voltage source is connected to the reference potential,
A negative potential input terminal of the low side driver is connected to a negative potential of an external second voltage source, a positive potential of the second voltage source is connected to the reference potential,
The constant-potential input terminal of the high-side driver is connected to an external bootstrap circuit for applying a positive voltage with respect to a connection point of the high-side switching element and the low-side switching element,
A capacitor for an external negative potential is inserted between a connection point of the high side switching element and the low side switching element and a negative potential input terminal of the high side driver,
Wherein the high-side switching element and the control switching element form a loop together with the capacitor for the sub-potential and the high-voltage source.
The method according to claim 1,
And a voltage clamp circuit for preventing a voltage applied to both ends of the capacitor for the sub-potential from exceeding a predetermined value.
The method according to claim 1,
Wherein the bootstrap circuit includes a constant potential input terminal of the high side driver and a constant potential capacitor connected between a connection point of the high side switching element and the low side switching element,
Further comprising a charge current correction circuit,
Wherein the charge current correction circuit comprises:
And shorting both ends of the capacitor for constant potential through a current limiting circuit that limits the amount of current when the potential difference between the positive input terminal and the negative input terminal of the high side driver exceeds a predetermined value, in.
The method according to claim 1,
And the time from when the control switching element is turned on to when it is turned off can be adjusted.
The method according to claim 1,
And stops charging the capacitor for the sub-potential when the voltage across the sub-capacitor reaches a predetermined value.
The method according to claim 1,
Further comprising a low-voltage level shift circuit in front of each of the high-side driver, the low-side driver, and the control switching element.
The method according to claim 6,
Further comprising a diode connected between a negative potential input terminal of the high side driver and a negative potential side of the second voltage source,
A cathode of the diode is connected to a negative potential input terminal of the high side driver,
An external capacitor is provided instead of the second voltage source,
Wherein the low side switching element forms a loop together with the negative side capacitor, the external capacitor and the diode.
A semiconductor device comprising: the semiconductor device driver circuit according to any one of claims 1 to 7;
A high-side switching element,
The low side switching element,
A capacitor for the sub-
And said bootstrap circuit.
9. The method of claim 8,
Wherein the high-side switching element and the low-side switching element comprise a wide bandgap semiconductor.

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