KR101588577B1 - A fabrication method of vertically aligned GaAs semiconductor nanowire arrays with large area - Google Patents
A fabrication method of vertically aligned GaAs semiconductor nanowire arrays with large area Download PDFInfo
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- KR101588577B1 KR101588577B1 KR1020140070745A KR20140070745A KR101588577B1 KR 101588577 B1 KR101588577 B1 KR 101588577B1 KR 1020140070745 A KR1020140070745 A KR 1020140070745A KR 20140070745 A KR20140070745 A KR 20140070745A KR 101588577 B1 KR101588577 B1 KR 101588577B1
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- gallium arsenide
- nanowire
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Abstract
The present invention relates to a method of manufacturing a GaAs semiconductor nanowire by a top-down method, and more particularly, to a method of fabricating a GaAs semiconductor nanowire using a metal thin film formed by an economical method of fabricating a metal thin- (H + ) into a gallium arsenide substrate to continuously induce a wet etching process to produce a vertically aligned gallium arsenide semiconductor nanowire array in a large area. The resulting vertically aligned gallium arsenide semiconductor nanowires can be applied to the fabrication of nano devices such as solar cells, transistors, and light emitting diodes. In the present invention, the diameter of the gallium arsenide semiconductor nanowire can be controlled by controlling the mesh size of the metal thin film. The length of the nanowire can be freely controlled by controlling the etching time, the applied voltage and the applied current, Can be applied to the fabrication of line arrays.
Description
The present invention relates to a method for economically manufacturing a metal mesh thin film.
The present invention also relates to a method of fabricating a vertically aligned gallium arsenide semiconductor nanowire array using the method.
More particularly, the present invention relates to a method of manufacturing a gallium arsenide substrate by injecting a hole (h + ) into a gallium arsenide substrate by applying a voltage or an electric current from the outside using a metal thin film having aligned nano-sized holes as an anode, To a method of large area fabrication of a vertically aligned gallium arsenide semiconductor nanowire array having a large surface area and a large aspect ratio with controlled diameter and length by wet etching the substrate.
In recent years, due to the unique physical and structural characteristics of low-dimensional semiconductor nanostructures, researches for application as high-performance devices using semiconductor nanowires have been actively conducted. Compound semiconductors, which are composed of two or more elements compared to single-crystal semiconductors such as silicon (Si) and germanium (Ge), can realize various types of semiconductor nano-devices have.
Among them, gallium arsenide, which is a III-V semiconductor, has a transfer rate of electrons five times faster than that of silicon, and also has a simple transistor structure, so that many high-speed integrated circuits can be produced. In addition, it can process up to 250GHz high frequency band and it is less affected by temperature change, so it has less noise in operation compared with silicon. Recently, light emitting diodes (LEDs) or solar cell modules that are experiencing rapid growth are attracting attention.
Therefore, in order to use gallium arsenide as an actual device, it is necessary to uniformly control the diameter and length of the nanowire, as well as to spatially align a high quality vertically aligned gallium arsenide nanowire array having a large surface area and a large aspect ratio Adjusting its density should be preceded.
As reported so far, growth of gallium arsenide nanowires can be broadly categorized into a top-down approach and a bottom-up approach.
The bottom-up approach can be grown using Molecular Beam Epitaxy (MBE) or Metal Organic Chemical Vapor Deposition (MOCVD). However, in the above-described bottom-up approach, it is difficult to vertically align a nanowire having uniform length and diameter as well as a twin-like defect at the time of growing the nanowire. In addition, the top-down approach can be divided into dry etching and wet etching. Reactive ion etching (RIE), which is typical of dry etching, requires expensive equipment and can damage materials in the process, It is disadvantageous in that it may be uneven and contain a large amount of impurities. Therefore, it is undesirable because it can greatly affect the physical and chemical properties and can be a variable in device design.
On the other hand, wet etching represented by metal-assisted chemical etching is currently the most actively studied in the manufacture of silicon nanowires, and a patterned thin film is used as a catalyst and an etching solution containing an oxidizing agent To induce a spontaneous reaction to obtain a nanowire having a controlled length and diameter in a short period of time. This method is expanding the scope of research for manufacturing III-V semiconductor nanowires including gallium arsenide.
However, in the case of III-V semiconductor substrate containing gallium arsenide, it is difficult to fabricate nanowires with uniform diameter and length due to active etching and lateral etching simultaneously with vertical etching during chemical etching using such a metal as a catalyst. There are difficulties in manufacturing routes.
It is an object of the present invention to overcome various technical limitations of a gallium arsenide semiconductor nanowire array fabrication process by chemical wet etching of a gallium arsenide semiconductor substrate using a metal as a catalyst, And to provide arsenic semiconductor nanowire arrays
It is also an object of the present invention to provide a technology for fabricating a gallium arsenide semiconductor nanowire array having a uniform diameter and length vertically aligned in a large area.
It is still another object of the present invention to provide a method of overcoming the limit of length due to the lateral etching effect that is commonly found in III-V semiconductor substrates by fabricating a nanowire having a large aspect ratio with a uniform diameter by suppressing lateral etching .
The present invention also provides a method for fabricating a vertically aligned gallium arsenide nanowire array regardless of the doping concentration and doping type of the gallium arsenide substrate.
The present invention also provides a method for fabricating a vertically aligned gallium arsenide nanowire array having the same orientation as a substrate regardless of the crystallographic orientation of the substrate.
It is also possible to fabricate a gallium arsenide nanowire array with one or more crystallographic orientations by controlling the etch direction of gallium arsenide nanowires fabricated on a gallium arsenide substrate with one crystallographic orientation, The present invention provides a method of fabricating a gallium arsenide nanowire array as well as a zigzag type gallium arsenide nanowire array.
According to an aspect of the present invention, there is provided a method of manufacturing a gallium arsenide substrate, comprising: (a) preparing a patterned metal mesh on a surface of a gallium arsenide substrate; And (b) wet etching the gallium arsenide substrate in the etchant by applying an external bias to the metal mesh; A method for manufacturing a gallium arsenide nanowire array is provided.
According to an aspect of the present invention, the step (a) includes the steps of: (a1) forming a monolayer array of organic particles on a gallium arsenide substrate; (a2) depositing a metal thin film on the organic particle monolayer array; And (a3) removing the organic particle monolator array to produce a metal mesh; As shown in FIG.
According to an embodiment of the present invention, the step (a1) may further include a step of pre-treating the gallium arsenide substrate.
According to an embodiment of the present invention, after the step (a2), heat is applied or plasma treatment is performed in an oxygen atmosphere (air or oxygen or ozone atmosphere) to shrink the organic particles of the organic particle array, So that the formation distance of the nanowire can be controlled.
Hereinafter, an embodiment of the present invention will be described in detail.
One aspect of the present invention is a method of manufacturing a semiconductor device, comprising: (a) preparing a patterned metal nanomesh on a surface of a Group III-V compound semiconductor substrate; And (b) wet etching the gallium arsenide substrate in the etchant by applying an external bias to the metal mesh; And a method of manufacturing a III-V compound semiconductor nanowire array.
In an embodiment of the present invention, in this embodiment, (a) comprises: (a1) forming a monolayer array of organic particles on a gallium arsenide substrate; (a2) depositing a metal thin film on the organic particle monolayer array; And (a3) removing the organic particle monolator array to produce a metal mesh; The present invention provides a method for manufacturing a III-V compound semiconductor nanowire array.
An aspect of the present invention also relates to a method of forming an array, further comprising the step of expanding the gap between the array and the array by shrinking the particles of the organic particle array by applying heat after step (a2) -V group compound semiconductor nanowire array.
According to an aspect of the present invention, there is provided a method of manufacturing a III-V compound semiconductor nanowire array in which the conductive mesh hole has a shape of a circle, an ellipse, a square, a rectangle, a fiber, or a polygon.
An aspect of the present invention also provides a method of manufacturing a III-V compound semiconductor nanowire array by applying a voltage or an electric current to the anode of the conductive mesh.
In an embodiment of the present invention, the conductive mesh comprises a III-V compound semiconductor nanowire that is a metal that does not corrode the etchant, such as silver (Ag), gold (Au), palladium (Pd), or platinum And to provide a manufacturing method of the array. The conductive mesh of the present invention may be an alloy having two or more elements, or may be a method of manufacturing a III-V compound semiconductor nanowire array using two or more metals deposited in multiple layers. In addition, the conductive mesh may be manufactured through various patterning methods other than the manufacturing method using organic particles.
The present invention also provides a method of manufacturing a III-V compound semiconductor nanowire array, characterized in that the length of the nanowire is controlled by the amount of bias controlled or applied by the time during which the wet etching is performed have.
The present invention also provides a method of manufacturing a III-V compound semiconductor nanowire array, wherein the etchant of the present invention includes hydrofluoric acid (HF), hydrochloric acid (HCl), or nitric acid (HNO 3 ).
Further, the present invention may be a method of manufacturing a III-V compound semiconductor nanowire array, wherein the nanowire is formed in a vertical or zigzag shape from the substrate in the wet etching step. Further, the present invention may be a method of manufacturing a III-V compound semiconductor nanowire array which induces a bias on a substrate in the wet etching step so that a nanowire has a porous surface.
In addition, the shortening length of the nanowire in the wet etching step may be a method of manufacturing a III-V compound semiconductor nanowire array in which the pore size of the porous conductive mesh is controlled in accordance with the change.
In the present invention, the III-V compound semiconductor may be gallium arsenide.
The steps of the manufacturing method of the present invention will be described below.
In the present invention, the formation of the organic-based particle monolayer array in the step (a1) is based on the formation of the entire gallium arsenide substrate, but only a part of the organic-based particle monolayer array can be formed if necessary, Layer or the like, and the shape of the gallium arsenide nanowire may be formed in a non-vertical shape instead of a vertical shape. These plural layers may also be formed partially or entirely, or may be formed so as to be mixed with each other if necessary. It is obvious to those skilled in the art that even if a monolayer array is formed stochastically in the present invention, it may have some defects, but it is best to use a monolayer of the most highly packed type.
In the present invention, pretreatment of the gallium arsenide substrate is preferable for uniformity of nanowires formed by removing contaminants. The pretreatment is preferably a pretreatment by alternately washing with organic solvent and ionized water. The organic solvent is not limited as long as it does not damage the gallium arsenide substrate, and examples thereof include, but not limited to, acetone, ketone, ethanol, methanol, ethyl ether, ethyl acetate or tetrahydrofuran. Pretreatment can be done in vortex or it can be done by various means.
The method of forming the organic-based particle monolayer array according to the present invention on a gallium arsenide substrate is formed by dispersing organic particles on a surface of a solvent or water in the form of a monolayer and then transferring the organic particles to a gallium arsenide substrate. The transfer method may be variously adopted. For example, after a gallium arsenide substrate is put into a liquid medium in which organic particles are dispersed, the substrate is gradually withdrawn from the liquid medium so that the organic particles can form a monolayer array on the substrate surface . It is apparent that the liquid medium may adopt various media depending on the nature of the organic particles. For example, water and organic solvents used for the pretreatment may be adopted, but the present invention is not limited thereto.
In the present invention, the organic particles can be varied in size from 1 nm to 5000 탆, preferably from 10 nm to 100 탆, and more preferably from 10 nm to 10 탆, but are not limited thereto. As the kind of organic particles, for example, various materials such as polystyrene, polymethyl methacrylate, polyolefin, polyvinyl acetate, polybutadiene, crosslinked acrylic particles, epoxy particles or other rubber particles can be adopted, but the present invention is not limited thereto . Although the polystyrene particles are low in specific gravity and floated in water and many of them are commercialized, it is preferable to adopt them, but the present invention is not limited thereto.
In addition, the shape of the organic particles in the present invention may have various shapes such as circular, elliptical, square, rectangular, fibrous or plate-like shapes, and the shapes of the nanowires produced in the present invention may have various shapes according to this shape. This is because the shape of the hole of the metal mesh is determined according to the shape of the organic particle, and the shape of the nanowire is determined according to the shape of the metal mesh.
In the present invention, after the step (a2), the organic particles of the organic particle array are contracted by applying heat or plasma treatment in an oxygen atmosphere (air, oxygen or ozone atmosphere) to widen the gap between the array and the array, It is also possible to adjust the formation distance of the line. The shrinkage of the organic particles by this step is due to crosslinking by plasma treatment or heat treatment, or dense shrinkage of the expanded volume inside the particles. Since the organic particles should not be melted in the case of heat treatment, it is preferable to perform the heat treatment at a temperature higher than the glass transition temperature and lower than the melting temperature.
The step of depositing the metal thin film adopted in the step (a2) of the present invention can adopt various conventional metal thin film forming methods adopted in this or the adjacent technology, and is not limited thereto. For example, it is possible to deposit palladium (Pd), gold (Au), platinum (Pt), or silver (Ag) used as an electrode in the fabrication of a nanowire array. Plasma sputtering or e-beam evaporation may be employed.
Next, the step (a3) of the present invention will be described. The step (a3) of the present invention is a step of removing the organic particles after the deposition of the metal. By removing the organic particles, the organic particles adhered on the gallium arsenide substrate are formed in a mesh form. The removal of the organic particles may be performed by dissolving the organic particles in a solvent or by removing the organic particles in a non-solvent, and then physically removing the particles by ultrasonic treatment or the like, but the present invention is not limited thereto. For example, in the case of adopting polystyrene particles in the present invention, the porous metal mesh can be prepared by removing the polystyrene nanoparticles aligned on the surface of the gallium arsenide substrate by putting it in toluene or chloroform and then performing ultrasonic treatment.
When the organic particles are removed as described above, the mesh is formed on the gallium arsenide substrate on which the metal thin film is deposited by the thickness of the metal thin film and the height deviation of the attachment position of the organic particles.
According to an embodiment of the present invention, the cross section of the hole of the porous metal mesh may be a shape of at least one of a circle, an ellipse, a square, a rectangle, and a regular polygon.
In addition, the material of the porous mesh used in the present invention has excellent properties of gold (Au), silver (Ag), palladium (Pd) or platinum (Pt), but the present invention is not limited thereto. But it is not limited thereto.
Next, the step (b) according to one embodiment of the present invention will be described.
In the step (b), the gallium arsenide substrate may be wet-etched using the porous metal mesh prepared in the step (a) to form a nanowire. According to an embodiment of the present invention, in the step (b), the gallium arsenide substrate is wet-etched in the etchant by forming the hole (h + ) on the gallium arsenic substrate which is in contact with the lower portion of the metal mesh by directly applying the external bias to the porous metal mesh. And the nanowire is formed in a top-down manner by etching.
That is, as the gallium arsenide substrate in contact with the metal substrate is etched, the portion of the non-contact mesh shape is lowered by the etching of the gallium arsenide substrate and is not etched as it is in the unetched mesh position. .
In the present invention, the externally applied power may include a direct current, a voltage, and a pulse form thereof.
The aspect ratio (= length / diameter) of the obtained gallium arsenide nanowire is controlled by controlling the applied oxidation voltage, the oxidation current, the concentration of the etching solution, and the etching time.
According to an embodiment of the present invention, the etchant used in step (b) may include any solution capable of etching gallium arsenide such as hydrofluoric acid (HF), hydrochloric acid (HCl), or nitric acid (HNO 3 ) It does not. In addition, the gallium arsenic etchant used in the present invention may include an etchant diluted with deionized water and may be a mixed solution of deionized water and anhydrous ethanol (C 2 H 5 OH), but is not limited thereto.
In the present invention, the bias applied to the metal thin film may be applied in a current of 0.5 to 50 mA (current density: 2.5 to 250 mA / cm 2 ) or a voltage of 0.2 to 10 V.
In the present invention, doped GaAs substrate may also be used. The present invention for producing gallium arsenic nanowire by inducing electrochemical etching of a gallium arsenide substrate with an external applied direct current or voltage has the advantage that if it has an electrical characteristic at a certain doping concentration or more, And has the advantage that an additional doping process is not necessary because the wafer having the required doping concentration is directly etched without a separate doping process in order to produce a gallium arsenide substrate having generally desired electrical characteristics.
A gallium arsenide nanowire array having one or more crystallographic orientations can be fabricated by controlling the etch direction of gallium arsenic nanowires fabricated on a gallium arsenide substrate with a single crystallographic orientation, and a zigzag configuration in which the crystallographic orientations are periodically crossed Lt; RTI ID = 0.0 > gallium arsenic < / RTI > nanowire array as well as a porous gallium arsenide nanowire array.
That is, by controlling the magnitude and the pulse shape of the DC voltage or current applied to the metal thin film, it is possible to control the etching direction of the nanowires formed on the gallium arsenide substrate of a given crystallographic orientation to form gallium An arsenic nanowire array can be fabricated and a zigzag type gallium arsenide nanowire array with periodically crossed crystallographic orientations can be fabricated.
In addition, porous gallium arsenide nanowire arrays can also be fabricated by applying direct current or voltage directly to a gallium arsenide substrate other than a metal mesh.
According to the gallium arsenide nanowire array fabrication method of the present invention, a vertically aligned gallium arsenide nanowire array can be manufactured regardless of the doping concentration and the doping type of the gallium arsenide substrate. Therefore, the doping concentration The nanowire can be directly fabricated using the substrate having the above-described structure.
In addition, vertically aligned gallium arsenide nanowire arrays having the same orientation as the substrate can be fabricated regardless of the substrate having different crystallographic orientation.
In addition, vertically aligned gallium arsenide nanowire arrays having the same orientation as the substrate can be fabricated regardless of the substrate having different crystallographic orientation.
It is also possible to fabricate a gallium arsenide nanowire array with one or more crystallographic orientations by controlling the etch direction of gallium arsenide nanowires fabricated on a gallium arsenide substrate with one crystallographic orientation, It is possible to fabricate a zigzag type gallium arsenide nanowire array as well as to fabricate a porous gallium arsenide nanowire array.
In addition, it is possible to overcome the limit of the length due to the side etching effect, which is commonly seen in the III-V semiconductor substrate, by manufacturing the nanowire having a large aspect ratio with a uniform diameter by suppressing side etching.
FIG. 1 is a flowchart illustrating a method of manufacturing a gallium arsenide semiconductor nanowire array according to an embodiment of the present invention,
2 is a cross-sectional view illustrating a polystyrene nanoparticle monolayer array formed on the surface of deionized water according to one aspect of the present invention,
3 is a cross-sectional view illustrating a method of transferring a monolayer array of polystyrene nanoparticles onto a surface of a gallium arsenide substrate according to an aspect of the present invention,
4 is a cross-sectional view illustrating a method of reducing the size of polystyrene nanoparticles according to an aspect of the present invention,
5 is a cross-sectional view illustrating a metal thin film deposited on a polystyrene nanoparticle monolayer array formed on a gallium arsenide substrate according to an aspect of the present invention,
6 is a cross-sectional view illustrating a polystyrene removing process according to an aspect of the present invention,
FIG. 7 is a scanning electron micrograph showing a porous metal mesh formed on a gallium arsenide substrate according to an aspect of the present invention,
8 is a schematic view showing a method of manufacturing a gallium arsenic nanowire array according to an aspect of the present invention,
9 is a scanning electron microscope (SEM) image of a gallium arsenide nanowire array fabricated by wet-etching an N-type (100) gallium arsenide substrate according to an aspect of the present invention,
10 is a scanning electron microscope (SEM) image of a gallium arsenide nanowire array prepared by wet-etching an N-type (111) gallium arsenide substrate according to an aspect of the present invention,
11 is a scanning electron microscope (SEM) image of a gallium arsenide nanowire array prepared by wet-etching a p-type (100) gallium arsenide substrate according to an aspect of the present invention,
12 is a scanning electron microscope (SEM) image of a zigzag type gallium arsenide nanowire array fabricated by wet-etching an n-type (100) gallium arsenide substrate according to an aspect of the present invention,
13 is a scanning electron microscope (SEM) image of a porous gallium arsenide nanowire array prepared by wet-etching an n-type (100) gallium arsenide substrate according to an aspect of the present invention.
BRIEF DESCRIPTION OF THE DRAWINGS The present invention is capable of various modifications and various embodiments, and specific embodiments are illustrated in the drawings and described in detail in the description. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprises" or "including" are used to specify that a feature, a number, a step, an operation, an element, a component, or a combination thereof, And does not preclude the presence or addition of one or more other features, integers, steps, integers, components, parts, or combinations thereof.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Hereinafter, the present invention will be described in detail with reference to the drawings corresponding to an embodiment. Referring to the drawings, the same or corresponding components are denoted by the same reference numerals, .
First, a method of manufacturing a gallium arsenide semiconductor nanowire array according to the present invention will be described with reference to FIG.
First, a monolayer array of polystyrene particles having a six-dimensional structure (in the case of the closest packing) is formed on the surface of deionized water, and then a polystyrene monolayer array is transferred to a gallium arsenide substrate, Followed by vapor deposition of a metal thin film by a conventional vapor deposition method to remove the polystyrene particles. Then, a bias is applied to the porous metal mesh as an anode to etch the contact surface between the gallium arsenide substrate and the metal thin film using the etching solution, and the gallium arsenide substrate and the metal portion, which are not in contact with the metal thin film, The nanowire is generated in a top-down manner.
Hereinafter, steps of manufacturing the metal mesh of Figs. 2 to 6 to Fig. 7 will be described.
According to the method for producing a gallium arsenide nanowire array according to the present invention, a porous metal mesh should first be prepared.
In order to produce the porous metal mesh, the
Next, as shown in FIG. 4, the diameter of the polystyrene should be reduced by oxygen plasma treatment of the polystyrene nanoparticle monolayer array transferred onto the surface of the gallium arsenide substrate.
5, a metal is deposited on the substrate on which the
Next, as shown in FIG. 6, the substrate is supported on toluene or chloroform to remove the polystyrene
7 is a scanning electron microscope (SEM) image of a
Next, a gallium arsenide substrate is wet-etched in an etchant by applying a bias from the outside using the
8 is a schematic diagram of a method for fabricating a gallium
The diameter of the through
The etching solution used for the wet etching may be hydrofluoric acid (HF), sulfuric acid (H 2 SO 4 ), hydrochloric acid (HCl) or nitric acid (HNO 3 ). In addition, the etchant may include an etchant diluted with deionized water and may be a mixture of deionized water and anhydrous ethanol (C 2 H 5 OH).
9-11 illustrate a photograph of a gallium
9 is a scanning electron micrograph of a vertically aligned gallium arsenide nanowire (60) array formed by wet-etching a n-type (100)
10 is a scanning electron micrograph of a vertically aligned gallium arsenide nanowire (60) array formed by wet etching an n-type (111)
11 is a scanning electron micrograph of a vertically aligned gallium arsenide nanowire (60) array formed by wet etching a p-type (100)
According to an aspect of the present invention, there is provided a method of wet etching a
Further, in another embodiment of the present invention, a bias is applied to the
Hereinafter, the present invention will be described in more detail with reference to Examples. It should be understood, however, that these examples are for illustrative purposes only and are not to be construed as limiting the scope of the present invention.
Hereinafter, embodiments of the present invention will be described in detail with reference to the embodiments of the present invention.
(Example 1) The vertical nanowire formation method of FIG.
Pretreatment of gallium arsenide substrate
The gallium arsenide N type (100) substrate, the N type (111) substrate and the P type (100) substrate of iNexus were washed and dried in the order of acetone, ethanol and deionized water to remove contaminants present on the surface, Oxygen: 100 sccm, plasma power: 300 W, time: 20 minutes).
Fabrication of polystyrene nanoparticle monolayer array
Polystyrene nanoparticles (average particle size 250 nm) from Microparticles were mixed with propanol (C 3 H 7 OH) and injected onto the surface of deionized water contained in the beaker using a syringe pump to obtain a hexagonal dense polystyrene nanoparticle monolayer array Is uniformly formed on the surface of deionized water, immersed in a pretreated gallium arsenide substrate, and then slowly pulled up to transfer the polystyrene nanoparticles onto the surface of the gallium arsenide substrate.
Manufacture of metal mesh
An array of polystyrene nanoparticle monolayers (monolayer) aligned in hexagonal density structure transferred to a gallium arsenide substrate was reduced in size through oxygen plasma treatment (oxygen: 100 sccm, plasma power 300 W, time: 20 min) During the fabrication of the nanowire array, palladium (Pd) used as an electrode was deposited. Deposition of the metal may be achieved by plasma sputtering. After the deposition of the metal, toluene was loaded and ultrasonicated to remove the polystyrene nanoparticles aligned on the surface of the gallium arsenide substrate to produce a porous metal mesh.
Fabrication of gallium arsenide nanowire arrays
The gallium arsenide substrate placed on the surface of the metal mesh obtained by the above method is supported on a hydrofluoric acid (HF), and a voltage or current is applied (0.5 to 50.0 mA or 0.2 to 10.0 V) Area of gallium arsenide nanowire array. The aspect ratio (= length / diameter) of the obtained gallium arsenide nanowire is controlled by controlling the applied voltage, current, concentration of etchant, and etching time.
(Example 2) The vertical nanowire formation method of FIG.
Except that the n-type (100) gallium arsenide substrate was changed to the n-type (111) gallium arsenide substrate in Example 1 above.
(Example 3) The vertical nanowire formation method of FIG.
Except that the n-type (100) gallium arsenide substrate was changed to the p-type (100) gallium arsenide substrate in Example 1 above.
(Fourth Embodiment) The vertical nanowire forming method of FIG.
Except that the current type was changed to a pulse current by using the same type of n-type (100) substrate as in Example 1 above.
(Example 5) The vertical nanowire forming method of FIG.
Except that a vertically aligned nanowire was formed in the same manner as in Example 1 and a current or voltage was changed to a GaAs substrate instead of a metal mesh.
While the present invention has been particularly shown and described with reference to specific embodiments thereof, those skilled in the art will appreciate that such specific embodiments are merely preferred embodiments and that the scope of the present invention is not limited thereto will be. It is therefore intended that the scope of the invention be defined by the claims appended hereto and their equivalents.
10: gallium arsenide substrate
20: Polystyrene nanoparticle monolayer array
30: deionized water
40: Porous metal mesh
50: hole of porous metal mesh
60: gallium arsenide semiconductor nanowire
Claims (10)
A method of manufacturing a III-V compound semiconductor nanowire array by applying a voltage or current to the metal mesh as an anode.
Wherein the metal mesh comprises silver (Ag), gold (Au), palladium (Pd), or platinum (Pt) which is a metal that does not corrode the etchant.
Wherein the metal mesh is an alloy having two or more elements, or two or more metals are deposited in multilayers.
Wherein the length of the nanowires is controlled by the time during which the wet etching is performed or by the magnitude of the applied bias.
Wherein the etchant comprises hydrofluoric acid (HF), hydrochloric acid (HCl), or nitric acid (HNO 3 ).
Wherein the nanowires are formed in a vertical or zigzag shape from the substrate in the wet etching step.
A method for fabricating a III-V compound semiconductor nanowire array, the method comprising: applying a bias to a substrate in the wet etching step to induce a nanowire to have a porous surface.
Wherein the minor axis length of the nanowires in the wet etching step is controlled as the pore size of the metal mesh is varied.
Wherein the III-V compound semiconductor is gallium arsenide.
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| PCT/KR2014/005645 WO2015190637A1 (en) | 2014-06-11 | 2014-06-25 | Process for fabricating vertically-assigned gallium arsenide semiconductor nanowire array of large area |
| CN201480079794.3A CN106794985B (en) | 2014-06-11 | 2014-06-25 | The large area manufacturing method of the GaAs conductor nano tube/linear array of vertical alignment |
| JP2016572503A JP6391716B2 (en) | 2014-06-11 | 2014-06-25 | Fabrication process of large area vertically aligned gallium arsenide semiconductor nanowire arrays |
| US15/317,922 US10147789B2 (en) | 2014-06-11 | 2014-06-25 | Process for fabricating vertically-aligned gallium arsenide semiconductor nanowire array of large area |
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| CN106128957B (en) * | 2016-07-29 | 2019-02-01 | 东莞华南设计创新院 | A kind of production method of GaAs nano wire |
| KR101960589B1 (en) * | 2017-02-20 | 2019-03-21 | 연세대학교 산학협력단 | Method of wet bulk patterning and etching composition for the same |
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