KR101582546B1 - Embedded substrate and method for manufacturing the same - Google Patents

Abstract

An object of the present invention is to provide a built-in substrate and a method of manufacturing the same, in which a lamination step by a built-in device does not occur by forming an insulating layer using a liquid adhesive. The present invention relates to a film-type first substrate in which a first circuit pattern having conductivity is formed on at least one surface thereof; A first device mounted on at least one surface of the first substrate; An insulating layer formed by disposing an insulating adhesive on the first device and the first substrate; And a conductive second circuit pattern disposed on an opposite surface of the insulating layer to the first substrate.

Description

[0001] Embedded substrate and method for manufacturing same [0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an embedded board and a method of manufacturing the same. More particularly, the present invention relates to an embedded board having an electronic chip embedded therein.

Recent electronic products have entered the era of multi-functional integration using ubiquitous computing such as mobile phones or various information technology (IT) mobile devices. In addition to the evolution of electronic devices, information delivery media that transmit various information to humans anytime and anywhere are required to be strong against external shocks and easy to carry.

For this purpose, there has been a need for a device-embedded substrate including various devices such as semiconductor chips therein. Such an embedded substrate may be formed by forming a wiring using a DES (Development Etching and Strip) process on both sides or an end face of an inner core substrate, mounting a device such as a semiconductor chip on the upper surface of a core substrate on which a pattern is formed And then laminated the outer layer substrate.

In a conventional method for manufacturing an embedded substrate, the insulating layer material for lamination may be a film in the form of a sheet or a roll. However, there is a structural problem in that a stacking step occurs in the chip bonding region when a film is stacked.

Therefore, it is difficult to optimize the process process for minimizing the step difference, and there is a problem that chip damage may occur at the time of stacking semiconductor chips. Further, there is a problem that it is difficult to control the film-type material for lamination.

An object of the present invention is to provide a built-in substrate and a method of manufacturing the same, in which a lamination step by a built-in device does not occur by forming an insulating layer using a liquid adhesive.

The present invention relates to a film-type first substrate in which a first circuit pattern having conductivity is formed on at least one surface thereof; A first device mounted on at least one surface of the first substrate; An insulating layer formed by disposing an insulating adhesive on the first device and the first substrate; And a conductive second circuit pattern disposed on an opposite surface of the insulating layer to the first substrate.

A conductive third circuit pattern disposed on an area of the insulating layer where the second circuit pattern is disposed and a second device disposed on the third circuit pattern; can do.

The first device may be electrically connected to the first substrate in the form of flip chip bonding or wire bonding.

A via hole is formed in the insulating layer in the first circuit pattern from the second circuit pattern, and the via hole is filled with a conductive material.

The insulating layer may be formed by curing a liquid adhesive.

The gap between the first substrate and the second circuit pattern may be constant.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: supplying a base substrate having a conductive layer stacked on a film substrate of a core substrate; Forming the conductive layer in the first circuit pattern on the core substrate; Mounting a first device on the first circuit pattern; Supplying and laminating a liquid adhesive and a conductive foil together on the first device and the core substrate; Curing the adhesive to form an insulating layer; And forming the conductive foil in a second circuit pattern.

The base substrate may be supplied in a reel form so that the embedded substrate in which the first device is embedded may be manufactured by a continuous process in a reel to reel method.

Forming a conductive third circuit pattern on a surface of the insulating layer where the second circuit pattern is disposed, the conductive third circuit pattern being disposed in a region where the second circuit pattern is not disposed; And disposing a second device on the third circuit pattern.

The first device is mounted on the upper surface of the core substrate and the core substrate is turned over so that the first device is positioned below and then the adhesive and the conductive foil are fed from the bottom to the reel type and laminated.

The first device may be electrically connected to the first substrate by flip chip bonding or wire bonding.

Forming a via hole in the insulating layer from the second circuit pattern with the first circuit pattern; And filling the via hole with a conductive material.

The gap between the first substrate and the second circuit substrate may be constant.

The base substrate may be an FCCL (Flexible Copper Clad Laminate) of both sides or a cross section.

According to the embedded board and the method of manufacturing the same according to the present invention, the insulating layer is formed by using the liquid adhesive, thereby preventing the occurrence of stacking steps due to the built-in device.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a schematic cross-sectional view of an embedded substrate 100 as a preferred embodiment according to the present invention.

Referring to the drawings, an embedded substrate 100 according to the present invention includes a first substrate 110; A first device (120); An insulating layer 130; And a second circuit pattern 140 may be provided.

The first substrate 110 is formed of a film type, and a conductive first circuit pattern 112 may be formed on at least one surface. The first device 120 may be mounted on at least one surface of the first substrate 110.

The insulating layer 130 may be formed by disposing an insulating adhesive on the first device 120 and the first substrate 110. The second circuit pattern 140 is formed of a conductive material and may be disposed on the opposite side of the first substrate 110 of the insulating layer 130.

The embedded substrate 100 may be a flexible substrate formed of a film type including a semiconductor element or active and / or passive electric and electronic elements therein. At this time, the first device 120 may be semiconductor devices or active and / or passive electrical and electronic devices included between the substrates.

Meanwhile, the embedded substrate 100 may further include a third circuit pattern 150 and a second device 160.

The third circuit pattern 150 is formed of a conductive material and is disposed in an area where the second circuit pattern 140 of the surface of the insulating layer 130 on which the second circuit pattern 140 is disposed is not disposed .

The second device 160 may be disposed on the third circuit pattern 150. At this time, the second device 160 may be disposed on the second circuit pattern 140 according to the embodiment. The second device 160 may be a semiconductor device or active and / or passive electrical and electronic devices.

The first substrate 110 may be formed of a flexible copper clad laminate (FCCL) on both sides or a cross section as a base substrate. That is, the flexible copper-clad laminate (FCCL) may include a core substrate 111 and a conductive metal layer made of copper.

The first circuit pattern 112 may be formed by processing a conductive metal layer of a flexible copper-clad laminate substrate (FCCL). The first circuit pattern 112 can be formed by a process such as normal exposure, development, and etching.

The first device 120 may be electrically connected to the first substrate 110 in the form of flip chip bonding or wire bonding. The first device 120 may be mounted by applying heat and pressure to the first substrate 110. In one embodiment, FIG. 1 illustrates an embodiment in which a first device 120 is connected to a first substrate 110 by flip chip bonding.

The first device 120 may be mounted on the bumps 113 formed on the first substrate 110. The first device 120 may include an electrode 121 for receiving signals from the outside or supplying power to the first device 120 and may be electrically connected to the bumps 113 of the first substrate through the electrode 121. At this time, a bump plating layer 113a formed by plating is formed on the surface of the bump 113 and can be connected to the electrode 121 through the bump plating layer 113a.

In the conventional embedded type substrate, a film in the form of sheet or roll is used as the insulating layer material for lamination. When an insulating layer is laminated using a film in the form of a sheet or a roll, a lamination step may occur in the chip bonding region. In addition, a sheet or a roll-shaped film is heated and pressed to form an insulating layer. In this process, a device included therein may be subjected to an impact.

However, in the embedded substrate 100 according to the present invention, the insulating layer 130 may be formed by curing a liquid adhesive. Therefore, even when the first device 120 is disposed, the gap between the first substrate 110 and the second circuit pattern 140 is kept constant even when the first device 120 is surrounded by the liquid adhesive .

Therefore, occurrence of stacking steps of the insulating layer 130 can be minimized. It is possible to realize a fine pitch pattern with improved precision at the time of forming the outer layer patterns of the second circuit pattern 140 and / or the third circuit pattern 150 and the like. Therefore, it is possible to prevent the occurrence of pattern peeling and to manufacture a highly integrated electronic module. In addition, it is possible to prevent micro-defects from occurring in the lamination and curing process, thereby improving the reliability of the product.

Further, since the liquid adhesive agent can be cured at a pressure smaller than that of the film type, it is possible to prevent chip damage caused by the impact. Further, since a liquid adhesive is used, control of the material for lamination is facilitated.

A via hole 131 is formed in the insulating layer 130 from the second circuit pattern 140 to the first circuit pattern 112. The via hole 131 is filled with a conductive material to form a connection portion 132, The first circuit pattern 112 and the second circuit pattern 140 may be electrically interconnected by the first circuit pattern 132.

The second circuit pattern 140 may include a second conductive layer 141 and a protective layer 142. The second conductive layer 141 is a metallic conductive layer and can be formed by a conventional circuit pattern forming method. The protective layer 142 surrounds and protects the second conductive layer 141 and may include a conventional coverlay and / or a dry film solder resist (DFSR).

The third circuit pattern 150 may be formed by a conventional circuit pattern forming process. The third circuit pattern 150 may include a third conductive layer 151 and a third plating layer 152. The third conductive layer 151 is a metallic conductive layer and can be formed by a conventional circuit pattern forming method. The third plating layer 152 surrounds the third conductive layer 151 by plating or the like, thereby protecting the third conductive layer 151 from the outside.

According to the present invention, by forming an insulating layer using a liquid adhesive, it is possible to prevent the occurrence of lamination steps caused by a built-in device.

FIGS. 2 to 5 illustrate a method of manufacturing an embedded substrate according to a preferred embodiment of the present invention, and are vertical cross-sectional views according to manufacturing steps according to a process sequence of a reel to reel method.

Referring to the drawings, a method of manufacturing an embedded substrate according to the present invention (FIGS. 2 to 5) includes: supplying a base substrate (S210); A first pattern formation step (S220, S230); Device mounting step S240; Supplying and laminating adhesive and foil (S250, S260); Curing step S270; And an outer layer pattern forming step (S300).

In the base substrate supply step (S210), the base substrate 110a, on which the conductive layer 112a is laminated, is supplied to the film type core substrate 111. In the first pattern formation step S220 and S230, the conductive layer 112a is formed as the first circuit pattern 112 on the core substrate 111. [

In the device mounting step S240, the first device 120 is mounted on the first circuit pattern 112. The liquid adhesive 130a and the conductive foil 141a are supplied together and stacked on the first device 120 and the core substrate 111 in the adhesive and foil supply and laminating steps S250 and S260.

In the curing step S270, the adhesive 130a is cured to form the insulating layer 130. [ In the outer layer pattern forming step (S300), the conductive foil 141a is formed as the second circuit pattern 140.

2 through 5), the embedded substrate in which the base substrate 110a is supplied in a reel shape and the first device 120 is embedded is reel-to-reel, ≪ / RTI > By the method of manufacturing the embedded substrate (FIGS. 2 to 5), the flexible substrate of FIG. 1 and the embedded substrate in which the device is embedded can be manufactured.

For this purpose, the base substrate 110a may be a flexible copper clad laminate (FCCL) of both sides or a cross section. The flexible copper-clad laminate (FCCL) may include a core substrate 111 and a conductive layer 112a made of copper.

In the first pattern formation step S220 and S230, the conductive layer 112a may be formed on the core substrate 111 as the first circuit pattern 112 by a conventional circuit pattern forming process. The first pattern forming step S220 and S230 may include an exposure step S220 and a development etching and a pre-treatment S230.

A photosensitive layer 221 such as a photoresist (PR) or a dry film resist (DFR) is formed on the conductive layer 112a and an ultraviolet ray is irradiated through a mask 222 according to a desired circuit pattern, To form a mask pattern. In the development and etching (S230), the development, etching, and peeling processes used in the ordinary circuit pattern formation process are applied, and surface treatment operations for chip bonding and lamination adhesion enhancement are performed.

Meanwhile, the outer layer pattern forming step S300 may further include a third circuit pattern forming step and a device placing step. The third circuit pattern forming step may include forming a conductive third circuit pattern 150 on the surface of the insulating layer 130 where the second circuit pattern 140 is disposed, . In the device placement step, the second device 160 is disposed on the third circuit pattern 150.

The third circuit pattern 150 may be formed by a conventional circuit pattern forming process. The third circuit pattern 150 may include a third conductive layer 151 and a third plating layer 152. The third conductive layer 151 is a metallic conductive layer and can be formed by a conventional circuit pattern forming method. The third plating layer 152 surrounds the third conductive layer 151 by plating or the like, thereby protecting the third conductive layer 151 from the outside.

The second device 160 may be disposed on the third circuit pattern 150. At this time, the second device 160 may be disposed on the second circuit pattern 140 according to the embodiment. The second device 160 may be a semiconductor device or active and / or passive electrical and electronic devices.

In the device mounting step S240, the first device 120 is mounted on the first circuit pattern 112. To this end, a bump plating layer 113a is formed on the surface of the bump 113 in the chip bonding area on the first circuit pattern 112 ) Can be formed. The first device 120 may be mounted by applying heat and pressure to the first substrate 110.

At this time, the first device 120 may be electrically connected to the first substrate 110 in the form of flip chip bonding or wire bonding. In one embodiment, FIG. 2 illustrates an embodiment in which the first device 120 is connected to the first circuit pattern 112 by flip chip bonding.

The first device 120 may be mounted on the bumps 113 formed on the first substrate 110. The first device 120 may include an electrode 121 for receiving signals from the outside or supplying power to the first device 120 and may be electrically connected to the bumps 113 of the first substrate through the electrode 121. At this time, a bump plating layer 113a formed by plating is formed on the surface of the bump 113 and can be connected to the electrode 121 through the bump plating layer 113a.

At this time, the first device 120 may be semiconductor devices or active and / or passive electrical and electronic devices included between the substrates.

On the other hand, in a conventional method for manufacturing an embedded substrate, a sheet or a film in the form of a roll may be used as the insulating layer material for lamination. When an insulating layer is laminated using a film in the form of a sheet or a roll, a lamination step may occur in the chip bonding region. In addition, a sheet or a roll-shaped film is heated and pressed to form an insulating layer. In this process, a device included therein may be subjected to an impact.

However, in the method of manufacturing the embedded substrate according to the present invention, the liquid adhesive 130a and the conductive foil 141a are simultaneously laminated and applied to the adhesive and foil supply and laminating steps S250 and S260. Therefore, even when the first device 120 is surrounded by the liquid adhesive, the first substrate 110 (the core substrate and the first circuit pattern) and the second circuit pattern 140 can be kept constant.

Therefore, it is possible to minimize the occurrence of lamination step of the insulating layer 130 by the method of manufacturing the embedded substrate according to the present invention. It is possible to realize a fine pitch pattern with improved precision at the time of forming the outer layer patterns of the second circuit pattern 140 and / or the third circuit pattern 150 and the like. Therefore, it is possible to prevent the occurrence of pattern peeling and to manufacture a highly integrated electronic module. In addition, it is possible to prevent micro-defects from occurring in the lamination and curing process, thereby improving the reliability of the product.

Further, since the liquid adhesive agent can be cured at a pressure smaller than that of the film type, it is possible to prevent chip damage due to the impact. Further, since a liquid adhesive is used, control of the material for lamination is facilitated.

The adhesive and foil supply and laminating steps S250 and S260 may include a supplying step S250 for supplying the adhesive 130a and the conductive foil 141a together and a laminating step S260 for laminating at the same time. A flexible conductive foil 141a is supplied in a reel form in a feeding step S250 and a liquid adhesive 130a is applied onto the conductive foil 141a through a predetermined dispenser 251 to form a liquid phase The adhesive 130a and the conductive foil 141a are supplied together.

The first device 120 is mounted on the upper surface of the core substrate 111 and the core substrate 111 is rolled up by the rollers so that the first device 120 is positioned below, And the conductive foil 141a are supplied from the bottom to the reel type so as to be stacked on the first device 120 and the first substrate 110.

In the laminating step S260, the temperature of the roller is set to about 40% or less of the conventional film type, and the temperature of the roller is set to about 40% or less, The conductive foil 141a coated with the conductive foil 141a can be laminated.

The liquid adhesive 130a and the conductive foil 141a are supplied together by the structure as shown in Figure 3 so that the liquid adhesive 130a is stacked on the first device 120 and the first substrate 110, . Since all the manufacturing steps are performed by the continuous process of reel tulle, the productivity of the built-in substrate can be improved and the price competitiveness can be ensured.

In the curing step S270, the adhesive 130a is cured to form the insulating layer 130. [ At this time, it is preferable to cure in a temperature environment higher than the temperature in the laminating step (S260).

In the second pattern formation step (S300), the conductive foil 141a is formed as the second circuit pattern 140. The second circuit pattern 140 may include a second conductive layer 141 and a protective layer 142. The second conductive layer 141 is a metallic conductive layer and can be formed by a conventional circuit pattern forming method. The protective layer 142 surrounds and protects the second conductive layer 141 and may include a conventional coverlay and / or a dry film solder resist (DFSR).

Meanwhile, the built-in substrate manufacturing method may include a hole processing step (S280) and a hole filling step (S290). The first circuit pattern 112 and the second circuit pattern 140 may be electrically interconnected through the hole processing step S280 and the hole filling step S290.

In the hole forming step S280, the via hole 131 may be formed in the insulating layer 130 from the second circuit pattern 140 to the first circuit pattern 112. At this time, the via hole 131 can be processed by a CNC (computer numerical control) drill or a laser drill.

In the hole filling step S290, the via hole 131 is filled with a conductive material to form a connection part 132. The first circuit pattern 112 and the second circuit pattern 140 are electrically connected to each other You can connect.

The method for manufacturing an embedded substrate may further include inspecting and packaging the completed embedded substrate by performing an outer layer pattern forming step (S300).

INDUSTRIAL APPLICABILITY According to the present invention, by manufacturing an embedded substrate by a continuous process of reel tolure, productivity can be improved and an insulating layer can be easily formed using a liquid adhesive.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, You will understand. Accordingly, the true scope of protection of the present invention should be determined only by the appended claims.

1 is a cross-sectional view schematically showing a built-in substrate according to a preferred embodiment of the present invention.

FIGS. 2 to 5 are views for explaining a manufacturing method of a built-in substrate according to a preferred embodiment of the present invention, and are vertical cross-sectional views according to manufacturing steps according to a process sequence manufactured by a reel to reel method.

Description of the Related Art

100: an embedded substrate, 110: a first substrate,

120: first device, 130: insulating layer,

140: second circuit pattern.

Claims (14)

A first substrate of a film type in which a first conductive circuit pattern is formed on at least one side; A first device mounted on at least one surface of the first substrate; An insulating layer formed by disposing an insulating adhesive on the first device and the first substrate; And And a conductive second circuit pattern disposed on an opposite surface of the insulating layer to the first substrate. The method according to claim 1, A conductive third circuit pattern disposed on an area of the insulating layer where the second circuit pattern is disposed, And a second device disposed on the third circuit pattern. The method according to claim 1, Wherein the first device is electrically connected to the first substrate in the form of flip chip bonding or wire bonding. The method according to claim 1, Wherein a via hole is formed in the insulating layer from the second circuit pattern in the first circuit pattern, and the via hole is filled with a conductive material. The method according to claim 1, Wherein the insulating layer is formed by curing a liquid adhesive. The method according to claim 1, Wherein an interval between the first substrate and the second circuit pattern is constant. Providing a base substrate having a conductive layer stacked on a film substrate of a core substrate; Forming the conductive layer in the first circuit pattern on the core substrate; Mounting a first device on the first circuit pattern; Supplying and laminating a liquid adhesive and a conductive foil together on the first device and the core substrate; Curing the adhesive to form an insulating layer; And And forming the conductive foil in a second circuit pattern. 8. The method of claim 7, Wherein the base substrate is supplied in a reel form so that the embedded substrate in which the first device is embedded is manufactured by a continuous process in a reel to reel method. 9. The method of claim 8, Forming a conductive third circuit pattern on a surface of the insulating layer where the second circuit pattern is disposed, the conductive third circuit pattern being disposed in a region where the second circuit pattern is not disposed; And And disposing a second device on the third circuit pattern. 9. The method of claim 8, Wherein the first device is mounted on the upper surface of the core substrate and the core substrate is turned over so that the first device is positioned below and then the adhesive and the conductive foil are fed from the bottom to the reel type, Way. 9. The method of claim 8, Wherein the first device is electrically connected to the first circuit pattern by flip chip bonding or wire bonding. 9. The method of claim 8, Forming a via hole in the insulating layer from the second circuit pattern with the first circuit pattern; And filling the via hole with a conductive material. 9. The method of claim 8, Wherein the gap between the core substrate and the first circuit pattern and the second circuit substrate is constant. 9. The method of claim 8, Wherein the base substrate is an FCCL (Flexible Copper Clad Laminate) of both sides or a cross section.

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