KR101528929B1 - Organic Light Emitting Diode Display - Google Patents

Abstract

The present invention relates to an organic light emitting diode display device capable of reducing the size of a driver IC.

The organic light emitting diode display device includes an effective display area in which a plurality of light emitting pixels for displaying gradation are formed, and a plurality of monitoring pixels including a plurality of monitoring pixels outside the effective display area, A display panel having a monitoring pixel portion for providing an equivalent resistance value; A driving voltage setting unit for supplying a monitoring current to the monitoring pixels in response to a sample & hold control signal, and detecting at the output node a voltage determined by the monitoring current and the equivalent resistance value as a driving voltage to be applied to the light emitting pixels; ; And a control voltage generator for generating the monitoring gate signal; When the total number of monitoring pixels is j and the monitoring pixels determined for the setting of the driving voltage are k (k < j), the monitoring gate signal can turn on the monitoring pixels at the timing applied to the k monitoring pixels Occurs at a level that allows the monitoring pixels to be turned off at the timing applied to the non-k monitoring pixels.

Description

[0001] The present invention relates to an organic light emitting diode (OLED) display,

The present invention relates to an organic light emitting diode (OLED) display device that is driven in a digital manner, and more particularly, to an organic light emitting diode display device capable of reducing the size of a driver IC.

2. Description of the Related Art In recent years, various flat panel displays (FPDs) have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such a flat panel display device includes a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP) And a light emitting device (Electroluminescence Device).

PDP has attracted attention as a display device that is most advantageous for large screen size but small size because of its simple structure and manufacturing process, but it has disadvantage of low luminous efficiency, low luminance and high power consumption. A TFT LCD to which a thin film transistor (hereinafter referred to as "TFT") is applied as a switching element is the most widely used flat panel display device, but has a problem of a narrow viewing angle and a low response speed because it is a non-light emitting device. On the other hand, the electroluminescent device is divided into an inorganic light emitting diode display device and an organic light emitting diode display device according to the material of the light emitting layer. In particular, the organic light emitting diode display device uses self light emitting devices that emit self- Brightness and viewing angle are large.

The organic light emitting diode display device has an organic light emitting diode (OLED) as shown in FIG. The OLED has organic compound layers (HIL, HTL, EML, ETL, EIL) formed between the anode electrode and the cathode electrode.

The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer EIL).

When a driving voltage is applied to the anode electrode and the cathode electrode, holes passing through the HTL and electrons passing through the ETL are transferred to the EML to form excitons, Thereby generating visible light.

The organic light emitting diode display device arranges the pixels including the OLED in a matrix form and controls the brightness of the pixels selected by the scan pulse according to the gradation of the video data. To this end, the organic light emitting diode display sequentially turns on the TFT, which is the active element, to select the pixel and maintain the emission of the pixel at the voltage held in the storage capacitor.

As a method of driving such an organic light emitting diode display device, there are an analog method of displaying a gray scale according to a data voltage or a data current applied to a pixel and an analog method of displaying a gray scale according to a data voltage or a data current application time There is a digital method of displaying gradation. In the organic light emitting diode display device driven in an analog manner, the electric characteristics (threshold voltage, electron mobility, etc.) of the driving TFT for controlling the amount of current flowing in the organic light emitting diode according to the applied data voltage or the intensity of the data current, It is difficult to realize an accurate gradation because it varies from pixel to pixel depending on conditions. On the other hand, in the digitally driven organic light emitting diode display device, since the driving TFT is used only as the switching means, it is possible to prevent the image quality failure due to the difference in electric characteristics of the driving TFTs between the pixels. Recently, many technologies for driving an organic light emitting diode display device in a digital manner have been proposed.

In a conventional organic light emitting diode (OLED) display device, driving voltages necessary for R emission pixels, G emission pixels, and B emission pixels are applied to match a target luminance and a target color coordinate. In this case, since the driving voltage required for each pixel slightly differs according to the organic material characteristic of each RGB, the organic light emitting diode display device displays an effective display area A / A to monitor the organic material characteristic as shown in FIG. 2 and FIG. And has monitoring pixels MP_R, MP_G, and MP_B on the outside thereof. Each of the monitoring pixels MP_R, MP_G, and MP_B is formed by the number of vertical resolutions.

Referring to FIGS. 2 and 3, the conventional organic light emitting diode display device displays a monitoring current Im flowing in each of the R monitoring pixel MP_R, the G monitoring pixel MP_G, and the B monitoring pixel MP_B, (VOR, VOG, VOB) formed by the pixels (MP_R, MP_G, MP_B) are detected as drive voltages and the R emission pixels, the G emission pixels, and the B emission Lt; / RTI &gt; Here, the monitoring current Im is a current applied to the monitoring pixels MP_R, MP_G and MP_B for detecting the driving voltages VOR, VOG and VOB corresponding to the target color coordinate and the target luminance, do. Each of the monitoring pixels MP_R, MP_G and MP_B includes a monitoring driving TFT MDT switched by the monitoring gate signal MGR / MGG / MGB and a monitoring OLED MR / / MB).

The principle of setting the driving voltage using these monitoring pixels follows the Ohm's law. Accordingly, the set driving voltage VOR / VOG / VOB can be expressed by the product of the monitoring current Im and the equivalent resistance Rth by monitoring pixels of the same color as shown in FIG.

However, since the monitoring driving TFTs included in the monitoring pixels of the same color are not individually controlled and are simultaneously controlled by the monitoring gate signal, the number of monitoring pixels contributing to the equivalent resistance value is fixed. Therefore, in the conventional organic light emitting diode display device, the driving voltage (VOR / VOG / VOB) is set by varying only the monitoring current while the equivalent resistance value is fixed. In this case, since a monitoring current margin is secured when a large current level is formed in the driver IC design, there is a problem that the size of the driver IC increases in the conventional organic light emitting diode display device. Further, there is a problem that an additional process of reducing the resistance value is required to change the TFT mask in order to overcome the supply limit to the required current amount.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an organic light emitting diode display device capable of varying the number of monitoring pixels used for setting a driving voltage so that a driving voltage can be set without changing a monitoring current .

In order to achieve the above object, an organic light emitting diode display according to an embodiment of the present invention includes an effective display region in which a plurality of light emitting pixels for displaying gray scales are formed, and a plurality of monitoring pixels outside the effective display region, A display panel having a monitoring pixel portion for providing an equivalent resistance value of said monitoring pixels adjustable according to an input monitoring gate signal; A driving voltage setting unit for supplying a monitoring current to the monitoring pixels in response to a sample & hold control signal, and detecting at the output node a voltage determined by the monitoring current and the equivalent resistance value as a driving voltage to be applied to the light emitting pixels; ; And a control voltage generator for generating the monitoring gate signal; When the total number of monitoring pixels is j and the monitoring pixels determined for the setting of the driving voltage are k (k < j), the monitoring gate signal can turn on the monitoring pixels at the timing applied to the k monitoring pixels Occurs at a level that allows the monitoring pixels to be turned off at the timing applied to the non-k monitoring pixels.

The organic light emitting diode display device according to the present invention can be configured to vary the number of monitoring pixels used for setting the driving voltage so that the driving voltage can be set without changing the monitoring current.

Accordingly, in the organic light emitting diode display device according to the present invention, it is not necessary to form a large current level in advance in order to secure the monitoring current margin in the driver IC design, and the size of the driver IC can be greatly reduced. In addition, according to the present invention, it is possible to omit the additional step of reducing the resistance value by changing the TFT mask in order to overcome the supply limit for the required current amount, thereby greatly reducing manufacturing time and manufacturing cost.

Hereinafter, preferred embodiments of the present invention will be described with reference to FIGS. 5 to 9. FIG.

FIG. 5 shows an organic light emitting diode display according to an embodiment of the present invention, and FIG. 6 shows the timing controller of FIG. 5 in detail. FIG. 7 shows part of the display panel of FIG. 5 in detail; FIG. 8 shows a sample and hold control signal S / H for controlling a lighting pulse, a monitoring gate signal, and a sampling / ). &Lt; / RTI &gt;

5, an organic light emitting diode display device according to an embodiment of the present invention includes an effective display area A / A in which light emitting pixels 11 are formed, a driver IC chip 12 mounted thereon, (VOR, VOG, VOB) from the monitoring pixel portion 16 and the display panel 10 having the non-display region where the monitoring pixel portion 16 and the monitoring pixel portion 16 are formed, And a driving voltage setting unit 17 for applying the driving voltage to the pixels 11.

A plurality of data lines DL and a plurality of gate lines GL are intersected with each other in the effective display area A / A of the display panel 10, and the light emitting pixels 11 are arranged in a matrix . The light emitting pixels 11 include a plurality of R light emitting pixels for displaying red, a plurality of G light emitting pixels for displaying green, and a plurality of B light emitting pixels for displaying blue. The R drive voltage VOR, the G drive voltage VOG, and the B drive voltage VOB are supplied to the R, G, and B emission pixels, respectively. Each of the light emitting pixels 11 includes an OLED, a driving TFF, a plurality of switch TFTs, and a storage capacitor, and displays gradations according to a digital driving method.

The driver IC chip 12 includes a timing controller 13, a source driver 14, a level shifter (not shown), and a control voltage generator (not shown) ) In the non-display region. The driver IC chip 12 may further include a driving voltage setting unit 17.

The timing controller 13 includes a data converter 131 and a control signal generator 132 as shown in FIG.

The data converter 131 converts the input image data RGB into a data format suitable for digital driving. To this end, the data converter 131 includes a host memory 131a, a data adjustment unit 131b, and a display memory 131c. The host memory 131a stores image data (RGB) input from the outside in frame units. The data adjustment unit 131b divides the image data RGB of one frame into j bit planes (j is a natural number of 2 or more) and displays one frame in k (k Is divided into two subframes temporally. In order to allow each of the divided bit planes to be distributed and displayed in a single or a plurality of sub-frames, the data adjustment unit 131b uses a time mapping table (Bit Mapping Table) Mapped to the corresponding sub-frame and stored in the display memory 131c. Further, the data adjustment unit 131b supplies the source driver 14 with data (DATA) temporally dispersed in a time mapping table format.

The control signal generator 132 generates a control signal based on timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a dot clock signal DCLK, and a data enable signal DE, A control signal GDC for controlling the operation timing of the scan driver 15 and a control signal GDC for controlling the sampling and detection operation of the drive voltage setting unit 17, And generates a sample and hold control signal (S / H). The control signal DDC for controlling the operation timing of the source driver 14 includes a source sampling clock for instructing a latch operation of data in the source driver 14 on the basis of a rising or falling edge, And a source output enable signal indicating the output of the driver 14. The control signal GDC for controlling the operation timing of the scan driver 15 is inputted to a shift register in the scan driver 15, which is a gate start pulse indicating the start horizontal line at which the scan starts, and sequentially shifts the gate start pulse A gate shift clock signal generated with a pulse width corresponding to the ON period of the TFT, and a gate output enable signal indicating the output of the scan driver 15, and the like. The sample and hold control signal S / H for controlling the sampling and detection operation of the driving voltage setting unit 17 applies a monitoring current of a predetermined magnitude to the monitoring pixel unit 16 and outputs the monitoring current to the monitoring pixel unit 16 A voltage to be applied is sampled, and timing for detecting this sampled voltage as a drive voltage is indicated.

In response to the control signal DDC from the timing controller 13, the source driver 14 converts the input data (DATA) into analog data voltages and supplies them to the data lines DL.

The control voltage generator generates the monitoring gate signals MGR, MGG, and MGB and supplies the monitoring gate signals MGR, MGG, and MGB to the monitoring pixel portion 16. The monitoring gate signals (MGR, MGG, MGB) serve to control the number of monitoring pixels used in setting the driving voltage. If the number of monitoring pixels determined for setting the driving voltage is k (k < j), assuming that the total number of monitoring pixels implementing the same color is j, then the monitoring gate signal has a timing At a level that allows the monitoring pixels to turn on at the timing that is applied to the monitoring pixels other than the k other monitoring pixels.

The level shifter generates a voltage level suitable for driving the TFTs, that is, a scan high voltage VGH and a scan low voltage VGL with reference to the drive voltage VGP from the drive voltage setting unit 17, .

The scan driver 15 is composed of a shift register array formed on a non-display region of the display panel 10 through the same process as the TFTs in the light emitting pixels 11 by a GIP (Gate In Panel) method. The scan driver 15 generates a lighting pulse WS and an erasing pulse ES in response to a control signal GDC from the timing controller 13 so as to correspond to subframes emitted by a predetermined time allocation value And the writing pulse WS to sequentially drive the scan lines and sequentially drive the erase lines using the erasing pulse ES. Data (DATA) is written to the light emitting pixels on the horizontal line to which the writing pulse WS is applied. This data (DATA) is erased from the light emitting pixels when an erasing pulse (ES) is applied. To this end, the erasing pulse ES is generated with a predetermined time difference from the lighting pulse WS so as to correspond to the light emitting time of the corresponding sub-frame.

The monitoring pixel section 16 is formed on a non-display area outside the effective display area A / A of the display panel 10. [ The monitoring pixel section 16 includes a plurality of R monitoring pixels MP_R, a plurality of G monitoring pixels MP_G and a plurality of B monitoring pixels MP_B to which a monitoring current Im is applied do. Here, the R monitoring pixels MP_R have a number corresponding to the vertical resolution of the display panel 10, and are connected to each other in parallel to the signal wiring to which the monitoring current Im is applied. G monitoring pixels MP_G have the number of vertical resolutions of the display panel 10 and are connected to each other in parallel to the signal wiring to which the monitoring current Im is applied. B monitoring pixels MP_B have the same number as the vertical resolution of the display panel 10 and are connected to each other in parallel to the signal wiring to which the monitoring current Im is applied. The monitoring current Im applied to each of the monitoring pixels MP_R, MP_G and MP_B is calculated by taking into consideration the difference in organic material characteristics between RGB and the driving voltages VOR, VOG and VOB corresponding to the target color coordinate and the target luminance And has a predetermined difference for each color to be detected. R monitoring pixels MP_R each have a monitoring switch TFT MST, a monitoring driving TFT MDT, a monitoring storage capacitor MC and an R monitoring OLED MR. G monitoring pixels MP_G each include a monitoring switch TFT MST, a monitoring driving TFT MDT, a monitoring storage capacitor MC and a G monitoring OLED MR. B monitoring pixels MP_B each include a monitoring switch TFT MST, a monitoring driving TFT MDT, a monitoring storage capacitor MC and a B monitoring OLED MR. In each of the monitoring pixels MP_R, MP_G and MP_B, the monitoring switch TFT MST applies a corresponding monitoring gate signal MGR / MGG / MGB to the monitoring driving TFT (MST) in response to the lighting pulse WS supplied to the scan line MDT). The monitoring storage capacitor MC supplies the corresponding monitoring gate signal MGR / MGG / MGB applied to the control terminal of the monitoring driving TFT MDT for a predetermined period of time, that is, Hold control signal (S / H) for controlling the detection operation is generated. The monitoring driver TFT (MDT) operates in response to the monitoring gate signal (MGR / MGG / MGB) applied to its control terminal. In other words, the monitoring driving TFT MDT is turned on only by the monitoring gate signal MGR / MGG / MGB of the turn-on level as shown in FIG. 8 and is turned on by the monitoring gate signal MGR / MGG / Off state without being turned on. The monitoring pixel portion 16 is formed on both sides of the non-display region of the display panel 10 in a divided manner. For example, the R monitoring pixels MP_R and the G monitoring pixels MP_G are formed in the right non-display area of the display panel 10, and the B monitoring pixels MP_B are formed in the left non-display area of the display panel 10. On the other hand, the monitoring pixel portion 16 may be formed on one side of the non-display region of the display panel 10 in a biased manner.

The driving voltage setting unit 17 sets the driving voltage Im to the monitoring pixels MP_R and MP_R after flowing the monitoring current Im to the R monitoring pixels MP_R, G monitoring pixels MP_G, and B monitoring pixels MP_B, (VOR, VOG, and VOB) formed by the red, green, and blue light emission pixels MP_G and MP_B are detected as drive voltages for the R light emission pixels, the G light emission pixels, and the B light emission pixels . To this end, the driving voltage setting unit 17 supplies a current source for generating the monitoring current Im and a monitoring current Im from the current source to each of the monitoring pixels MP_R, MP_G and MP_B as shown in Fig. 7 And a holding switch S2 for detecting the voltage of the output node No formed by the monitoring pixels MP_R, MP_G and MP_B. The sampling switch S1 and the holding switch S2 are turned on in response to the sample and hold control signal S / H from the timing controller 13 until the monitoring pixels determined for setting the driving voltage are all turned on State, but is short-circuited immediately after all the monitoring pixels are turned on. The driving voltage setting unit 17 may further include an output buffer at its output terminal to stabilize the output of the driving voltages VOR, VOG, and VOB.

FIG. 9 shows a principle in which the driving voltage can be set without changing the monitoring current through the above-described configuration capable of varying the number of monitoring pixels used for setting the driving voltage.

Referring to FIG. 9, in the organic light emitting diode display according to the embodiment of the present invention, the monitoring pixel portion including the monitoring pixels of a specific color includes a plurality of resistors R1 to Rn connected in parallel with each other, Rn connected in series to each of the switches SW1 to SWn. Here, the resistors R1 to Rn are equivalents of each of the monitoring OLEDs, and the switches SW1 to SWn are equivalent to the switching circuits including the monitoring switch TFT, the monitoring storage capacitor, and the monitoring driver TFT, As shown in Fig.

The switches SW1 to SWn are opened in response to the turn-on level monitoring gate signals MGR / MGG / MGB and are short-circuited in response to the turn-off level monitoring gate signals MGR / MGG / MGB. The switches SW1 to SWn can be individually controlled according to the signal level of the monitoring gate signal MGR / MGG / MGB, and only the monitoring pixels with the switch open can function as a resistance value for setting the driving voltage. As a result, if the monitoring gate signal (MGR / MGG / MGB) is appropriately selected, the equivalent resistance (Rth) value by the monitoring pixels becomes sufficiently adjustable. Since the set driving voltage VOR / VOG / VOB can be expressed as a product of the monitoring current Im and the equivalent resistance Rth by the monitoring pixels of the same color, the organic light emitting diode display according to the present invention can monitor The driving voltage can be set by adjusting only the value of the equivalent resistance (Rth) as described above without changing the current.

Accordingly, in the organic light emitting diode display device according to the present invention, it is not necessary to form a large current level in advance in order to secure the monitoring current margin in the driver IC design, and the size of the driver IC can be greatly reduced. In addition, according to the present invention, it is possible to omit the additional step of reducing the resistance value by changing the TFT mask in order to overcome the supply limit for the required current amount, thereby greatly reducing manufacturing time and manufacturing cost.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram for explaining the principle of light emission of a general organic light emitting diode display device. FIG.

2 is a view for explaining a placement position of monitoring pixels in a display panel;

3 is a detailed view showing a part of monitoring pixels and light-emitting pixels.

FIG. 4 is a schematic diagram for explaining setting of a driving voltage using conventional monitoring pixels. FIG.

5 is a block diagram illustrating an organic light emitting diode display device according to an embodiment of the present invention.

6 is a block diagram showing the timing controller of FIG. 5 in detail;

FIG. 7 is a detailed view showing a part of the display panel of FIG. 5; FIG.

8 is a waveform diagram showing driving timings of a lighting pulse, a monitoring gate signal, and a sample and hold control signal for controlling a sampling / detection operation applied to a display panel;

9 is a schematic diagram showing a principle in which a driving voltage can be set without changing a monitoring current through a configuration capable of varying the number of monitoring pixels used for setting a driving voltage.

Description of the Related Art

10: display panel 11: light emitting pixel

12: Driver IC 13: Timing controller

14: Source driver 15: Scan driver

16: monitoring pixel part 17: driving voltage setting part

Claims (6)

A monitoring pixel including a plurality of monitoring pixels outside the effective display area and providing an equivalent resistance value of the monitoring pixels adjustable according to an input monitoring gate signal, A display panel having a portion; A driving voltage setting unit for supplying a monitoring current to the monitoring pixels in response to a sample & hold control signal, and detecting at the output node a voltage determined by the monitoring current and the equivalent resistance value as a driving voltage to be applied to the light emitting pixels; ; And And a control voltage generator for generating the monitoring gate signal; The monitoring gate signal is applied to each of the scan lines of the monitoring pixels while sequentially applying lighting pulses to the respective scan lines of the monitoring pixels when the total number of monitoring pixels is j and the monitoring pixels determined for setting the driving voltage are k (k < j) Wherein the monitoring pixels are generated at a level capable of turning on the monitoring pixels at a timing synchronized with a lighting pulse and sequentially applied to the k monitoring pixels, while at the timing applied to the monitoring pixels other than k, Off &lt; / RTI &gt; Wherein the number of the k monitoring pixels is plural, Wherein the monitoring current applied to the k monitoring pixels is fixed. The method according to claim 1, Wherein the monitoring current is maintained at a fixed level during the driving voltage setting. The method according to claim 1, Wherein the monitoring pixels are connected in parallel with each other to a first signal line to which the monitoring current is applied. The method of claim 3, Wherein each of the monitoring pixels comprises: Monitoring OLED; A monitoring drive TFT connected between said output node and said monitoring OLED for switching a current path between said output node and said monitoring OLED in accordance with said monitoring gate signal applied to its control terminal; A monitoring switch TFT connected between a second signal line to which the monitoring gate signal is applied and a control terminal of the monitoring driving TFT and is switched in response to a writing pulse for writing data of the light emitting pixels; And And a monitoring storage capacitor connected between the control terminal of the monitoring driving TFT and the output node to maintain the monitoring gate signal for a predetermined period of time. 5. The method of claim 4, Wherein the predetermined period of time is up to a point of time when the sample & hold control signal is generated. The method according to claim 1, Wherein the monitoring pixel unit comprises: A plurality of R monitoring pixels separated from each other, a plurality of G monitoring pixels, and a plurality of B monitoring pixels; Wherein the monitoring current is fixed with a predetermined difference for R, G, and B monitoring pixels.

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