KR101480551B1

KR101480551B1 - vertical structured group 3 nitride-based light emitting diode and its fabrication methods

Info

Publication number: KR101480551B1
Application number: KR20080031900A
Authority: KR
Inventors: 송준오
Original assignee: 엘지이노텍 주식회사
Priority date: 2008-04-04
Filing date: 2008-04-04
Publication date: 2015-01-08
Also published as: KR20090106294A

Abstract

The present invention is characterized in that an n-type ohmic contact electrode structure and a p-type ohmic contact electrode structure are vertically opposed to each other with a light emitting structure made of a group III nitride-based semiconductor and a heat sink support having a laminate structure The present invention also provides a vertical structure group III nitride-based semiconductor light-emitting diode device and a method of manufacturing the same.

A n-type ohmic contact electrode structure includes a n-type ohmic contact electrode structure, a n-type nitride-based clad layer, a nitride-based active layer, and a p-type nitride-based clad layer formed on the underside of the n-type ohmic contact electrode structure. A p-type ohmic contact electrode layer and a first device passivation layer including a current blocking region and a reflective ohmic contact electrode layer formed on a bottom surface of the p-type ohmic contact electrode layer and the first device passivation layer; A second device passivation layer surrounding the light emitting structure, the p-type ohmic contact electrode layer, the first device passivation layer, the reflective ohmic contact electrode layer, and the conductive wafer bonding layer; and a second semiconductor passivation layer surrounding the conductive wafer bonding layer, A heat sink support of the structure, and a heat sink support of the laminate structure Generated p-type provides an ohmic contact electrode structure, and a die bonding layer group III nitride-based semiconductor vertical cavity light emitting diode elements consisting of a.

The present invention also provides a method of fabricating the vertical structure group III nitride-based semiconductor light-emitting diode device.

According to the group III nitride-based semiconductor light-emitting diode device having the heat sink support of the laminate structure of the present invention, the heat emission effect and the current density distribution can be improved and the luminance can be improved remarkably, Post-processing can improve manufacturing costs and product yield, which can lower product prices.

A p-type ohmic contact electrode structure, an n-type ohmic contact electrode structure, a reflective ohmic contact electrode layer, a conductive wafer bonding layer, a vertical growth substrate, a heat sink support, a laminate, a wafer plate, a sacrificial separation layer, Structure Group III nitride-based semiconductor light-emitting diode device

Description

[0001] The present invention relates to a vertical structure group III nitride-based semiconductor light-emitting diode device and a method of manufacturing the same,

The present invention is characterized in that an n-type ohmic contact electrode structure and a p-type ohmic contact electrode structure are vertically opposed to each other with a light emitting structure made of a group III nitride-based semiconductor and a heat sink support having a laminate structure The present invention provides a next generation vertical structure group III nitride-based semiconductor light emitting diode device and a method of manufacturing the same.

BACKGROUND ART Light emitting devices such as light emitting diodes (LEDs) and laser diodes (LDs) are solid state semiconductor devices that generate light by flowing a current in a forward direction to a p-n junction. In particular, LED devices using solid-state semiconductors have a high efficiency of converting electrical energy into light energy, have a long life span of 5 to 10 years, and can save power and maintenance costs. Has attracted attention in the field.

In general, a group III nitride-based semiconductor light-emitting diode device is grown on the surface of a transparent sapphire growth substrate. However, since the sapphire growth substrate is hard, electrically insulating, and not excellent in heat conduction characteristics, a group III nitride semiconductor light- There is a limit in improving the characteristics of the unit chip such as reducing the manufacturing cost by reducing the size, light extraction efficiency, or electrostatic discharge (ESD). In other words, since the sapphire growth substrate is electrically insulative, it poses a great limitation in the structure of the group III nitride-based semiconductor light-emitting diode device. As shown in FIG. 1, the structure of a conventional Group III nitride-based semiconductor light emitting diode device formed on the upper surface of a sapphire growth substrate will be described in detail.

1 is a cross-sectional view of a conventional Group III nitride-based semiconductor light-emitting diode device. The light emitting structure for the group III nitride-based semiconductor light-emitting diode device is grown on the upper surface of the sapphire growth substrate 10. The conventional group III nitride-based semiconductor light-emitting diode device includes a growth substrate 10, And a light-emitting structure 20, 30, 40 for a group III nitride-based semiconductor light-emitting diode element.

The light emitting structure 20, 30, 40 for the group III nitride-based semiconductor light-emitting diode device includes an n-type nitride-based clad layer 20 and a multi-quantum well Type active layer 30 and the p-type nitride-based cladding layer 40. The nitride- The light emitting structure for the light emitting diode device may be grown using a process such as MOCVD. At this time, a buffer layer (not shown) made of AlN or GaN is formed in order to relax the stress caused by the lattice matching and the difference in thermal expansion coefficient with the growth substrate 10 before growing the n-type nitride-based clad layer 20 It is possible.

The p-type nitride-based clad layer 40 and the nitride-based active layer 30 corresponding to a predetermined region are dry-etched to expose a part of the upper surface of the n-type nitride-based clad layer 20 to the atmosphere, A p-type ohmic contact electrode and a pad 60 for applying a predetermined voltage to the upper surface of the nitride-based clad layer 20 and an upper surface of the p-type nitride-based cladding layer 40, an n-type ohmic contact electrode, and a pad 70 . The p-type ohmic contact electrode and the p-type ohmic contact electrode, the p-type ohmic contact electrode and the p-type ohmic contact electrode, and the n-type nitride based cladding layer are formed on the n- Type ohmic contact electrode and the transparent current spreading layer may be formed before forming the pad 70. 1 shows a transparent current spreading layer 50 located between a p-type nitride-based cladding layer 40 and a p-type electrode and pad 60. In FIG.

As described above, since the conventional Group III nitride-based semiconductor light-emitting diode device uses the sapphire growth substrate 10 which is an electric insulator, it is necessary to form the two ohmic contact electrodes and the pads 60 and 70 in parallel in the horizontal direction none. Therefore, current flow from the n-type ohmic contact electrode and the pad 70 to the p-type ohmic contact electrode and the pad 60 through the nitride-based active layer 30 must be narrowly formed along the horizontal direction when an external voltage is applied . Due to such a narrow current flow, the group III nitride-based semiconductor light emitting diode device has a problem that the forward voltage is increased to reduce the current injection efficiency (referred to as " current crowding phenomenon "), ) There is a problem that the effect is weak.

In addition, in the conventional group III nitride-based semiconductor light-emitting diode device, a large amount of heat is generated due to an increase in the current density. On the other hand, heat dissipation to the outside due to low thermal conductivity of the sapphire growth substrate 10 Mechanical stress is generated between the sapphire growth substrate 10 and the light emitting diode for the light emitting diode device according to the increase of the current density, thereby affecting the electrical and optical characteristics of the device.

Furthermore, in order to form the n-type ohmic contact electrode and the pad 70 in the conventional Group III nitride-based semiconductor light emitting diode device, at least the n-type ohmic contact electrode and the nitride 70 Since a part of the active layer 30 must be removed, there is a problem that the light emitting area decreases and the luminous efficiency decreases depending on the device size versus luminance.

Based group III nitride semiconductor light emitting diode device having a high energy conversion efficiency and a high luminance emission characteristic, which overcomes the problems of the group III nitride based semiconductor light emitting diode device formed on the upper surface of the sapphire growth substrate 10 which is electrically insulative, It is necessary to apply a large amount of electric energy from the outside or manufacture a large-sized unit chip when driving the light emitting device. Currently, the implementation of a light emitting diode device having a high energy conversion efficiency and a high luminance emission characteristic is performed by applying a large current (i.e., a large capacity) to a light emitting diode device, which is a relatively easy method. However, It is difficult to solve the heat emission problem.

Recently, as a new alternative, OSRAM, Germany, has developed a vertical structure group III nitride-based semiconductor light-emitting diode device called thin-GaN LED through growth substrate removal as a laser lift-off growth Substrate removal technology has been developed and developed, and some advanced companies are also focusing on the development of similar type vertical structure Group III nitride-based semiconductor light-emitting diode devices.

If the sapphire growth substrate 10 is removed only with certainty, the manufacturing process and the unit cost of the vertical structure group III nitride-based semiconductor light-emitting diode device having a high energy conversion efficiency through the removal of the transparent growth substrate and a high- I can innovate much more. In addition, in the case of manufacturing the group III nitride-based semiconductor light-emitting diode device formed on the upper surface of the sapphire growth substrate 10, the light-emitting area is about 50% of the unit chip area, The light emitting area of the device is about 90% of the unit chip area, which is much more advantageous than the horizontal structure light emitting diode device including the sapphire growth substrate 10 from the economic and technical point of view. However, the vertical-type light-emitting diode device using the horizontal-structure light-emitting diode device including the sapphire growth substrate 10 and the sapphire growth substrate 10 removal method is a method of applying a large current to a device having a constant unit chip light- Conversion efficiency ('externally applied electrical energy versus emitted light energy' definition) is not superior.

Therefore, in order to realize a group III nitride-based light emitting diode device having the next generation high energy conversion efficiency and high luminance characteristic, it is more advantageous from the technical and economical point of view to use a large-area low current injection method as much as possible.

At present, the horizontal light emitting diode device including the sapphire growth substrate 10 has a current crowding phenomenon due to the electrical conductivity of the low p-type nitride-based clad layer, . In addition, vertical-type light-emitting diode devices using the sapphire growth substrate 10 can be fabricated by fabricating a vertical-structured light-emitting device with a large laser beam size, Is not easy to secure. Generally, the conventional laser lift-off method can irradiate a uniform and strong energy source laser beam having one square centimeter area, so that the damage and cracks of the solid semiconductor thin film before irradiation with the laser beam it is necessary to perform isolation processing using a trench to the sapphire growth substrate 10 by a dry etching process in order to minimize crack propagation. The above-described smoothing process is a technique for preventing generation of fine cracks in the group III nitride-based semiconductor thin film and propagation to generation (generation and propagation of crack). However, since the area of the light emitting structure for a light emitting diode device isolated by a predetermined light emitting area transferred to the electrically conductive support by the laser lift off method is limited to the shape and size of the laser beam used, Can not be increased freely.

In order to realize a vertically structured light emitting diode device constituted of a group III nitride-based semiconductor as a next-generation light source in addition to the trench-through-trenching process, it is necessary to minimize the damage of the semiconductor thin film layer caused by introduction of the laser lift- For the purpose of preventing cracking, propagation, and breaking due to latent stress existing between the light emitting structure 10 and the group III nitride-based semiconductor thin film layer, ). In addition to the role of mitigating the potential stress during the laser lift-off process, the support also has a good thermal and electrical conductivity at the same time, thereby releasing a large amount of heat generated at the time of driving the vertically structured light- It should act as a heat-sink and serve as electrodes and pads for current injection.

As described above, electroplating and wafer bonding are mainly used as a method of forming a support for manufacturing a vertical structure light emitting diode device through a laser lift-off method.

The use of the supporting plate formed by the electroplating is advantageous in that a vertically structured light emitting diode device can be relatively easily manufactured. However, there is a lot of room for serious problems in the overall device reliability of the finally fabricated vertical light emitting diode device There is a limitation in device performance improvement (see FIG. 2). On the other hand, the support formed by the above-described wafer bonding is advantageous in securing stable device reliability and potentially increasing device performance. The process of forming the support by such wafer bonding must successfully perform wafer bonding between dissimilar materials having different thermal expansion coefficients. However, due to thermal stress after bonding the wafers between different materials, various serious problems such as fine cracks or cracks in the growth substrate or the semiconductor thin film layer, and further, debonding phenomenon have arisen (refer to FIG. 3). Thus, the fabrication of vertically-structured light-emitting diode devices through current wafer bonding utilizes a conductive wafer bonding layer (e. G., Eutectic process reaction system) capable of wafer bonding at temperatures below 300 ° C.

The fabrication of a vertically structured light emitting diode device through the electroplating (see FIG. 2) and the wafer bonding (see FIG. 3) through an electrically conductive support member will now be described in more detail.

The process of fabricating a vertical structure light emitting diode device using a support formed by the electroplating is as shown in FIG. A light emitting structure for a light emitting diode element consisting essentially of an n-type nitride-based clad layer 20, a nitride-based active layer 30 and a p-type nitride-based clad layer 40 is grown and formed on the upper surface of the growth substrate 10 (Not shown), the isolation process is performed using the trench 80 smaller than the laser beam size, as shown in FIG. 2A. Thereafter, a reflective layer 60 including a device passivation layer 50 and a current blocking region, and a seed layer 70a for electroplating a metal thick film such as Ni, Cu, etc., which are electrically conductive materials, Is formed on the upper surface or the side surface of the light emitting structure for the light emitting diode element. Then, as shown in FIG. 2B, a seed layer 70a for forming an organic material post 90 in the region of the trench 80 and simultaneously forming a metal thick film such as Ni, Cu, etc., which is an electrically conductive material, And also on the upper surface of the organic material posts 90. Then, as shown in FIG. 2C, a metal thick film such as Ni or Cu, which is an electrically conductive material serving as the support 100, is formed by electroplating. Then, as shown in FIG. 2D, a planarization process for removing the growth substrate 10 and removing the laser lift-off debris is performed using the laser lift off method. Then, as shown in FIG. 2E, a surface texture 110, an ohmic contact electrode, and a pad 120 are formed in a part of the n-type nitride-based clad layer 20 exposed to the atmosphere. Then, as shown in FIG. 2F, the final step is to complete the unit chip through mechanical or laser processing.

The process of fabricating the vertical structure light emitting diode device using a support formed by wafer bonding is as shown in FIG. A light emitting structure for a light emitting diode element consisting essentially of an n-type nitride-based clad layer 20, a nitride-based active layer 30 and a p-type nitride-based clad layer 40 is grown and formed on the upper surface of the growth substrate 10 (Not shown), the isolation process is performed using the trench 80 smaller than the laser beam size, as shown in FIG. 3A. Then, a device passivation layer 50, a reflection layer 60 including a current blocking region, and a conductive wafer bonding layer 70b are formed on the upper surface or side surface of the light emitting structure for the light emitting diode device. Then, as shown in FIG. 3B, Si or the like, which is an electrically conductive substrate, is bonded to the wafer as a support base 140 by using the conductive wafer bonding layer 70b. Thereafter, as shown in FIG. 3C, the planarization process for removing the growth substrate 10 and the laser lift-off process debris is performed using the laser lift off method. Then, as shown in FIG. 3D, a surface texture 110, an ohmic contact electrode, and a pad 120 are formed in a part of the n-type nitride-based clad layer 20 exposed to the atmosphere. Then, as shown in FIG. 3E, the final step is to complete the unit chip through mechanical or laser processing.

As described above, the conventional vertical-type light-emitting diode device fabrication using the electroplating and wafer bonding process technique of the vertical structure light emitting diode device is commonly used to manufacture a light emitting diode device with a scale smaller than the laser beam size before the growth substrate 10 is removed. And an isolation process for unitizing the light-emitting structure. Fabrication of vertically structured light emitting diode devices using such a scaling process makes it difficult to manufacture light emitting devices having a larger light emitting area than the laser beam size.

In addition, in the conventional vertical-type light-emitting diode device fabrication using the process of forming a support through electroplating and wafer bonding, post-annealing can be performed at a temperature of 300 ° C or higher after removing the growth substrate 10 in common It is difficult to fabricate a single, highly reliable, thermally stable chip. Even if a single chip manufactured without a heat treatment process at 300 ° C or higher is used as a light source for illumination, there will be many limitations. For this reason, an electroplating thick film of Ni, Cu, etc. formed by electroplating is not composed of dense structure but composed of amorphous or polycrystal having many porosities At the same time, a large amount of sulfur (S) and phosphorus (P) components are added to the thick film, which causes diffusion of these materials along with the use time, resulting in problems in device reliability. In addition, since the support formed by the wafer bonding has a bond at a temperature of less than 300 캜 in order to minimize the stress caused by the difference in thermal expansion coefficient, a post-process of 300 캜 or more can not be performed.

Therefore, in order to fabricate a large-area vertical-structured light-emitting diode device as a light source for a next generation illumination, a growth substrate removal process technique by forming a thermally stable and dense electroconductive support should be preferentially developed.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a method of manufacturing a Group III nitride-based semiconductor light-emitting device in which, when using a laser lift-off, mechanical polishing, It is an object of the present invention to provide a vertical-structured light-emitting diode device and a method of manufacturing the same that minimize damage to a light-emitting structure for a III-nitride-based semiconductor light-emitting diode device and improve electrical and optical characteristics. In order to achieve the above object successfully, a heat sink support of a laminated structure must be formed through a technical process capable of wafer bonding under a constant pressure and a temperature condition of at least 300 캜.

Another object of the present invention is to provide a manufacturing method of maximizing the characteristics of a unit chip that minimizes leakage current by preventing damage to the light emitting structure due to wafer bending (bending) occurring in the conventional single vertical structure light emitting diode device.

One embodiment of the vertical structure light emitting diode device of the present invention includes an n-type ohmic contact electrode structure, an n-type nitride-based cladding layer, a nitride-based active layer, and a p-type nitride-based cladding layer formed on the underside of the n- A p-type ohmic contact electrode layer and a first device passivation layer including a current blocking region formed on a lower surface of the light emitting structure and a reflective ohmic contact layer formed on a bottom surface of the p-type ohmic contact electrode layer and the first device passivation layer, And a p-type ohmic contact electrode structure formed on a bottom surface of the heat sink support of the laminated structure, wherein the p-type Ohmic contact electrode structure is formed on the bottom surface of the heat sink support of the laminated structure. And a die bonding layer. The group III nitride- In the light emitting diode device;

The p-type ohmic contact electrode layer may be a transparent material optically having a transmittance of 75% or more, or a reflector material having a high reflectance of 80% or more,

The current blocking region in the p-type ohmic contact electrode layer may be an air state or an electrically insulating material or a material forming a schottky contact interface with the p-type nitride-based cladding layer,

On the other hand, the second device passivation layer protects the light emitting structure, the p-type ohmic contact electrode layer, the first device passivation layer, the reflective ohmic contact electrode layer, and the first conductive wafer bonding layer,

Also, the reflective ohmic contact electrode layer is formed wider than the p-type ohmic contact electrode layer having a predetermined area,

The heat sink support of the laminated structure has two electrical conductors coupled to a conductive wafer bonding layer,

The n-type ohmic contact electrode structure is arranged on the top surface of the n-type nitride-based clad layer so as to be opposed to the current blocking region in the p-type ohmic contact electrode layer at the same position in the vertical direction,

Also, a surface texture is formed on the surface of the n-type nitride-based clad layer on which the n-type ohmic contact electrode structure is not formed, to form a structural shape.

Accordingly, the first embodiment of the method of manufacturing a vertical structure light emitting diode device according to the present invention is characterized in that, in manufacturing the vertical structure light emitting diode device by separating the growth substrate using the laser lift off, mechanical polishing, or etching process technique,

Performing isolation processing on the light emitting structure for a light emitting diode element grown on the upper surface of the growth substrate to a predetermined area (for example, a chip size); Forming a p-type ohmic contact electrode layer and a first device passivation layer on the light emitting structure for a light emitting diode device that has undergone the smoothing process; Forming a reflective ohmic contact electrode layer on the p-type ohmic contact electrode layer and the first passivation layer; Forming a first conductive wafer bonding layer on the reflective ohmic contact electrode layer; Forming first and second conductive wafer bonding layers on the top and bottom surfaces of the first electrical conductor, respectively; Sequentially forming a first sacrificial separation layer and a second conductive wafer bonding layer on an upper surface of the first wafer plate; Bonding the growth substrate and the wafer plate to an upper surface of the first and second conductive wafer bonding layers on the first and second electrical conductors, respectively, to form a first sandwich composite; Separating the first wafer plate from the first sandwich composite using a laser lift-off, mechanical polishing, or etching process technique; Removing the second conductive wafer bonding layer from the first sandwich composite and forming a third conductive wafer bonding layer; Forming third and fourth conductive wafer bonding layers on the top and bottom surfaces of the second electrical conductor, respectively; Sequentially forming a second sacrificial separation layer and a fourth conductive wafer bonding layer on the upper surface of the second wafer plate; Bonding the first sandwich composite and the second wafer plate to the upper surface of the third and fourth conductive wafer bonding layers on the upper and lower surfaces of the second electrical conductor to form a second sandwich composite; Separating the growth substrate in the second sandwich composite using a laser lift-off, mechanical polishing, or etching process technique; Etching the n-type nitride-based clad layer in the second sandwich composite in which the growth substrate is separated so as to be exposed to the atmosphere; Forming a second device passivation layer on the top and side surfaces of the scaled light emitting structure; Forming surface irregularities on the surface of the n-type nitride-based clad layer exposed to the atmosphere; Forming an n-type ohmic contact electrode structure on the surface of the n-type nitride-based clad layer on which the surface irregularities are formed; Performing an etching and cutting process in a vertical direction to the upper surface of the second wafer plate for the unit LED chip; Separating the second wafer plate using a laser lift-off, a mechanical polishing, or an etching process; And forming a p-type ohmic contact electrode structure and a die bonding layer on the second electric conductor exposed to the atmosphere.

Accordingly, the second embodiment of the method for fabricating a vertically-structured light-emitting diode device according to the present invention is characterized in that, in manufacturing a vertically structured light-emitting diode device by separating a growth substrate using the laser lift-off, mechanical polishing,

Performing isolation processing on the light emitting structure for a light emitting diode element grown on the upper surface of the growth substrate to a predetermined area (for example, a chip size); Forming a p-type ohmic contact electrode layer and a first device passivation layer on the light emitting structure for a light emitting diode device that has undergone the smoothing process; Forming a reflective ohmic contact electrode layer on the p-type ohmic contact electrode layer and the first passivation layer; Forming a second device passivation layer on an upper surface or a side surface of the p-type ohmic contact electrode layer, the first device passivation layer, and the reflective ohmic contact electrode layer; Forming a first conductive wafer bonding layer on the reflective ohmic contact electrode layer; Forming first and second conductive wafer bonding layers on the upper and lower surfaces of the first electrical conductor, respectively; Sequentially forming a first sacrificial separation layer and a second conductive wafer bonding layer on an upper surface of the first wafer plate; Bonding the growth substrate and the first wafer plate to the upper surface of the first and second conductive wafer bonding layers on the upper and lower surfaces of the first electrical conductor to form a first sandwich composite; Separating the first wafer plate from the first sandwich composite using a laser lift-off, mechanical polishing, or etching process technique; Removing the second conductive wafer bonding layer from the first sandwich composite and forming a third conductive wafer bonding layer; Forming third and fourth conductive wafer bonding layers on the top and bottom surfaces of the second electrical conductor, respectively; Sequentially forming a second sacrificial separation layer and a fourth conductive wafer bonding layer on the upper surface of the second wafer plate; Bonding the first sandwich composite and the second wafer plate to the upper surface of the third and fourth conductive wafer bonding layers on the upper and lower surfaces of the second electrical conductor to form a second sandwich composite; Separating the growth substrate in the second sandwich composite using a laser lift-off, mechanical polishing, or etching process technique; Etching the n-type nitride-based clad layer to expose the atmosphere in the second sandwich composite in which the growth substrate is separated; Forming surface irregularities on an upper surface of the n-type nitride-based clad layer exposed to the atmosphere; Forming an n-type ohmic contact electrode structure on the surface of the n-type nitride-based clad layer on which the surface irregularities are formed; Performing an etching and cutting process in a vertical direction to the upper surface of the second wafer plate for the unit LED chip; Separating the second wafer plate using a laser lift-off, a mechanical polishing, or an etching process; And forming a p-type ohmic contact electrode structure and a die bonding layer on the lower surface of the second electrical conductor exposed to the atmosphere.

As described above, by using the electric conductor densely bonded under the constant pressure and the temperature condition of 300 ° C or more as proposed in the present invention, the light emitting diode structure for a light emitting diode device can be separated from the growth substrate without lifting off ), It is possible to realize a highly efficient light emitting device even when a large current is injected by manufacturing a vertically structured light emitting diode device which is a light source for next generation illumination.

Compared with conventional heat sink support by electroplating or wafer bonding at a low temperature, the technique of forming a heat sink support of a laminated structure according to the present invention is simple and time consuming and costly to fabricate a light emitting diode device and a light emitting device It is greatly reduced.

Hereinafter, with reference to FIGS. 4 to 32, a vertically structured light emitting diode device having a heat sink support of a laminated structure and a manufacturing method thereof will be described in detail with reference to FIGS. Explain.

FIG. 4 is a schematic cross-sectional view illustrating a process for manufacturing a vertical structure light emitting device using a group III nitride-based semiconductor through a wafer bonding process proposed by the present invention.

The manufacturing process of a light emitting device (i.e., a light related solid state semiconductor device) is manufactured using a predetermined wafer substrate in a plurality of processes. For convenience of explanation in FIG. 4, two vertically structured group III nitride- Process.

As shown in Fig. 4A, a growth substrate 401 on which a light emitting structure 402 is grown, a machined electro-conductive heat sink support 403. A wafer plate 404 on which a sacrificial separation layer 405 is formed is prepared. Although not shown, the reflective ohmic contact electrode layer or the conductive wafer bonding layer may be formed as a single layer or a multilayer structure of two or more layers on the upper surface of the light emitting structure 402, the upper surface of the heat sink support 403, and the sacrificial separation layer 405 .

The machined electro-conductive heat sink supporter 403 is not limited to any material as long as it has excellent heat and electrical conductivity, but it is preferable to use a machined Si, SiGe, ZnO, GaN, AlSiC, A GaAs substrate and a metal, alloy, or solid solution of at least one of Cu, Ni, Ag, Al, Nb, Ta, Ti, Au, Pd, Pd and W components.

The material of the wafer plate 404, which is a temporary substrate, is preferentially used for the same material as the light emitting structure growth substrate, but any material may be used as long as the difference in thermal expansion coefficient from the growth substrate 401 is 2 ppm / .

The sacrificial separation layer 405 formed on the upper surface of the wafer plate 404 as a temporary substrate may be formed of a Group 2-6 compound including ZnO, a Group 3-5 compound including GaN, Al, Au, Ag, Cr, Ti, ITO, PZT, SU-8, and the like.

4B, the growth substrate 401 on which the light emitting structure 402 is grown and the wafer plate 404 on which the sacrificial separation layer 405 is formed under a predetermined pressure and at a temperature of 300 ° C or higher, The two substrates 401 and 404 are simultaneously bonded to the upper and lower surfaces of the mechanically processed electro-conductive heat sink supporter 403 using a conductive wafer bonding layer (not shown) facing each other to form a sandwich composite. Here, the conductive wafer bonding layer (not shown) has a single-layer structure or a multi-layer structure of a double-layer structure or more.

Next, as shown in FIG. 4C, the growth substrate 401 is securely removed from the light emitting structure 402 using a laser lift-off, mechanical polishing, or etching process technique Or all over. Here, the laser lift-off technique is preferentially used in the case of an optically transparent growth substrate 401 such as sapphire. The laser beam used in the laser lift-off technique preferably has energy (or a short wavelength) greater than the energy bandgap of the material forming the interface with the growth substrate 401. The laser beam is incident on the back surface of the growth substrate 401 side surface of the growth substrate 401. Since the laser beam has a constant area, the growth substrate 401 having a large area is irradiated at regular intervals. When the growth substrate 401 is irradiated with laser beams at regular intervals, the growth substrate 401 is sequentially separated from the portion irradiated with the laser beam. At this time, the heat sink support 403 should be bonded through the conductive wafer bonding layer (not shown) so as not to damage the light emitting structure 402. Particularly, when the growth substrate 401 is irradiated with the laser beam at a constant interval, fine cracks are generated in the light emitting structure 402 due to thermal and mechanical shocks at the interface between the portion irradiated with the laser beam and the portion irradiated with the laser beam And is also widely propagated, thereby lowering the overall product yield. In order to prevent this, the prior art has performed a flouring process, or the inventor's prior domestic patent (Application No. 10-2008-0030106) The functional composite film layer was inserted directly onto the upper surface of the light emitting structure 402 at the time of wafer bonding instead of the smoothing process.

In addition, diamond and SiC powder are preferably used for the mechanical polishing.

In addition, the wet etching may be carried out by using a wet etching process using sulfuric acid, phosphoric acid, hydrochloric acid, trivalent chromic acid, hexavalent chromic acid, gallium (Ga), indium (In), aluminum (Al), magnesium (Mg), aluhex (4H3PO4 + 4CH3COOH + HNO3 + H2O), and it is preferable to increase the concentration of phosphoric acid and the temperature of the etching solution in order to improve the etching rate. The temperature of the etchant is preferably 200 ° C to 500 ° C in order to shorten the process time.

Next, as shown in FIG. 4D, after the growth substrate 401 is separated, the light emitting structure 402 is etched on a unit chip basis by using the etching or cutting process technique, and the upper surface of the light emitting structure 402 exposed to the atmosphere Thereby forming a first ohmic contact electrode structure 406. Here, it is preferable that the first ohmic contact electrode structure 406 material is deposited and then heat-treated at a temperature and a gas atmosphere capable of forming an ohmic contact interface.

Next, as shown in FIG. 4E, the heat sink support 403 for manufacturing a unit chip is subjected to an etching or cutting process. In particular, mechanical cutting or laser machining is used until the surface of the wafer plate 404 is exposed to air.

Finally, as shown in FIG. 4F, the sacrificial separation layer 405 formed on the upper surface of the wafer plate 404 is subjected to solution or thermal-chemical decomposition to completely separate the wafer plate 404. Also, although not shown, after the wafer plate 404 is completely separated, a second ohmic contact electrode structure is formed on the rear surface of the heat sink support 403. After the second ohmic contact electrode structure material is deposited, it is preferable to perform the heat treatment in a temperature and a gas atmosphere capable of forming an ohmic contact interface. Here, the separation of the wafer plate 404 is performed using a laser lift-off, mechanical polishing, or etching process technique, as shown in FIG. 4C.

5 to 18 are cross-sectional views illustrating a vertical structure light emitting diode device manufacturing process according to a first embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a growth plate prepared before forming the first sandwich composite as a first step of manufacturing a vertical structure light emitting diode device. FIG.

An n-type nitride-based clad layer 502, a nitride-based active layer 503, and a p-type nitride-based clad layer 504 including a buffer layer are successively grown on the upper surface of the growth substrate 501, A p-type ohmic contact electrode layer 510 and a first device passivation layer 509 are stacked on the upper surface of the n-type cladding layer 504. Next, a reflective ohmic contact electrode layer 511 is laminated on the p-type ohmic contact electrode layer 510 and the first passivation layer 509, and then, on the upper surface of the reflective ohmic contact electrode layer 511, Bonding layer 508 is formed.

The growth substrate 501 may be formed of a material such as sapphire (Al 2 O 3), silicon carbide (SiC), silicon (Si), gallium arsenide (GaAs), aluminum nitride (AlN), gallium nitride (GaN) ), Glass, or the like is used. Especially, a sapphire substrate is typically used. This is a substrate having the same crystal structure as the group III nitride-based semiconductor material grown on the upper surface of the growth substrate 501, Because it does not exist.

The n-type nitride-based cladding layer 502 grown on the upper surface of the growth substrate 501 is an Al x In y Ga (1-xy) N composition formula (0? X? 1, 0? Y? 1, 0? X + Type dopant doped with Group-III nitride-based semiconductor material, and particularly GaN is widely used. In addition, prior to growing the n-type nitride-based clad layer 502, a material layer (referred to as " buffer layer ") that mitigates stress caused by mismatching lattice matching and difference in thermal expansion coefficient may be inserted. , InGaN, AlGaN, SiC, and SiCN are widely used.

The nitride-based active layer 503 formed on the top surface of the n-type nitride-based clad layer 502 has a quantum well structure, and has a composition formula of AlxInyGa (1-xy) N (where 0? X? y? 1, 0? x + y? 1).

The p-type nitride-based clad layer 504 formed on the nitride-based active layer 503 has a composition formula of AlxInyGa (1-xy) N (where 0? X? 1 , 0? Y? 1, 0? X + y? 1), and a p-type dopant is added.

The p-type nitride-based cladding layer 504 may further include an interface modification layer. The surface modification layer may be formed of a superlattice structure, a n-type conductive InGaN, GaN, AlInN, AlN, InN, AlGaN, p-type conductive InGaN, AlInN, InN, AlGaN, polar surface of the group III nitride system. In particular, the surface modification layer of the superlattice structure is composed of nitride or carbon nitride containing Group 2, Group 3, or Group 4 element components.

The n-type nitride-based cladding layer 502, the nitride-based active layer 503, and the p-type nitride-based cladding layer 504 may be formed by deposition such as MOCVD (Metal Organic Chemical Vapor Deposition) or MBE (Molecular Beam Epitaxy) It is preferable to grow them by MOCVD.

The p-type ohmic contact electrode layer 510 forms an ohmic contact interface on the upper surface of the p-type nitride-based cladding layer 504 and includes a current brazing region. Here, the current blocking region is composed of an air state or an electrically insulating material, or a material forming a schottky contact interface with the p-type nitride-based cladding layer.

The first passivation layer 509 is formed on the upper surface of the p-type nitride-based cladding layer 402 and the mesa-etched side surface. The first passivation layer 509 may be formed of a silicon oxide thin film (SiO2), a silicon nitride thin film (SiNx), an aluminum oxide thin film (Al2O3) As shown in Fig.

The reflective ohmic contact electrode layer 511 is formed on the p-type ohmic contact electrode layer 510 and the upper surface of the first passivation layer 509. The material of the ohmic contact electrode layer 511 is Ni, Ni-related alloy and solid solution, (Al), Al-related alloys and solid solutions, Rh, Rh-related alloys and solid solutions, Pt, Pt-related alloys and solid solutions, palladium (Pd), Pd related alloys And various kinds of silicides such as solid solution, gold (Au), Au related alloys and solid solutions, Ag-Si, Al-Si, Rh-Si, Pd-Si, Ni-Si, Cr-Si and Pt-Si.

In addition, the reflective ohmic contact electrode layer 511 is formed wider than the p-type ohmic contact electrode layer 510 having a predetermined area.

The first conductive wafer bonding layer 508 may be formed of Au, Ni, Cu, Ti, Ag, Al, or the like, which forms a dense adhesive force under a predetermined pressure and a temperature condition of at least 300 캜, At least one of Si, Ge, Pt, Pd, Rh, W, Mo, V, Sc, Hf, Ir, Re, Co, Zr, Ru, Ta, Nb, Mn, A metal, an alloy, a solid solution, and a compound are used, and in particular, a single layer or a multilayer structure of two or more layers is used.

FIG. 6 is a cross-sectional view showing a first electric conductor portion prepared before forming the first sandwich composite body, in the step of manufacturing a vertically-structured light-emitting diode element.

Conductive wafer bonding layers 602 and 603 are formed on the upper and lower surfaces of the first electrical conductor 601. Here, the A plane on the upper surface of the first electrical conductor 601 is a plane on which the growth substrate portion on which the light emitting structure is grown is coupled, and the B plane on the opposite plane is a plane on which the first wafer plate as a temporary substrate is coupled.

The first electrical conductor 601 has a thickness of 50 μm or less and has a sheet, disk, or foil shape machined on both sides.

Further, the first electric conductor 601 is not limited to any material as long as it has excellent thermal and electrical conductivity. Particularly, the upper and lower surfaces are made of at least one of Si, SiGe, ZnO, GaN, AlSiC, GaAs substrate and Cu, Ni, Ag, Al, Nb, Ta, Ti, Au, Pd, It is preferable to use a metal, an alloy, or a solid solution.

The first conductive wafer bonding layer 602 and the second conductive wafer bonding layer 603 may be formed of Au, Ni, Cu, Ti, Ag, Al, Si, A metal containing at least one of Ge, Pt, Pd, Rh, W, Mo, V, Sc, Hf, Ir, Re, Co, Zr, Ru, Ta, Nb, Mn, Mn, Cr, Alloy, solid solution or compound is used, and in particular, it is composed of a single layer or a multilayer structure of more than two layers.

7 is a cross-sectional view showing a first wafer plate portion prepared before forming the first sandwich composite, which is a step of manufacturing a vertically-structured light-emitting diode device.

A first sacrificial separation layer 702 and a second conductive wafer bonding layer 703 are sequentially formed on the upper surface of the first wafer plate 701 as a temporary substrate. If the difference in thermal expansion coefficient between the first wafer plate 701 and the growth substrate 501 is 2 ppm / ° C or less, the same material as the growth substrate 501 of the light emitting structure is preferentially used. Materials are not limited to use.

The first sacrificial separation layer 702 formed on the upper surface of the first wafer plate 701 may be formed of a Group 2-6 compound including ZnO, a Group 3-5 compound including GaN, a compound of Al, Au, Ag, Cr, Ti , ITO, PZT, SU-8, and the like.

The second conductive wafer bonding layer 703 may be formed of Au, Ni, Cu, Ti, Ag, Al, Si, Ge, Pt, Pd, Rh, W, Mo Metal, alloy, solid solution or compound containing at least one or more of V, Sc, Hf, Ir, Re, Co, Zr, Ru, Ta, Nb, Mn, Mn, Cr and rare earth metals. Or a multi-layered structure of two or more layers.

FIG. 8 is a cross-sectional view of a first sandwich composite fabricating a vertically structured light emitting diode device, wherein the growth plate, the first electrical conductor, and the first wafer plate are simultaneously wafer bonded.

The growth substrate portion A includes an n-type nitride-based clad layer 502, a nitride-based active layer 503, a p-type nitride-based clad layer 504, a p-type ohmic contact electrode layer 510, A first device passivation layer 509, a reflective ohmic contact electrode layer 511, and a first conductive wafer bonding layer 508 are stacked.

The first electrical conductor portion B is formed by stacking first and second conductive wafer bonding layers 602 and 603 on the upper and lower surfaces of the first electrical conductor 601, respectively.

The first wafer plate portion C is formed by sequentially stacking a second separation layer 702 and a second conductive wafer bonding layer 703 on the upper surface of the wafer plate 701 as a temporary substrate.

The bonding of the growth plate portion A, the first electric conductor portion B and the first wafer plate portion C is performed between the first conductive wafer bonding layer 508/602 and the second conductive wafer bonding layer 603/703) at a constant pressure and a temperature of 300 ° C or higher.

Here, the atmosphere of the process gas for wafer bonding is preferably vacuum, nitrogen (N 2), or argon (Ar) gas, but oxygen (O 2) gas may be added in some cases.

9 is a perspective view of a vertical structure light emitting diode device fabricated by separating a first wafer plate and a second conductive wafer bonding layer from a wafer bonded first sandwich composite and then forming a third conductive A wafer bonding layer is formed.

The process of separating the first wafer plate 701, which is a temporary substrate, from the first sandwich composite can be performed by a thermal-chemical decomposition using a laser beam with a strong energy, a wet etching, or a chemical-mechanical polishing (CMP) ).

The removal of the second conductive wafer bonding layers 603 and 703 of the first electrical conductor 601 may be performed by wet etching or chemical-mechanical polishing (CMP), mechanical polishing, or the like.

Ni, Cu, Ti, Ag, Al, Si, Ge, Pt, Pd, or the like, which forms a dense adhesive force at a predetermined pressure and a temperature condition of 300 캜 or more, is formed on the rear surface of the first electric conductor 601 exposed to the atmosphere. A metal, an alloy, a solid solution or a compound containing at least one of Rh, W, Mo, V, Sc, Hf, Ir, Re, Co, Zr, Ru, Ta, Nb, Mn, And in particular a third conductive wafer bonding layer 604 of a multi-layer structure of a single layer or a double layer or more is formed.

10 is a cross-sectional view showing a second electric conductor portion prepared before forming the second sandwich composite, which is a step of manufacturing a vertical structure light emitting diode element.

Third and fourth conductive wafer bonding layers 606 and 607 are formed on the top and bottom surfaces of the second electrical conductor 605. Here, the A surface, which is the upper surface of the second electrical conductor 605, is the surface to which the first sandwich composite portion formed with the light emitting structure is coupled, and the B surface that is the opposite bottom surface is the surface to which the second wafer plate as the temporary substrate is bonded.

The second electrical conductor 605 has a thickness of 10 μm to 1 mm or less and has a sheet, disk, or foil shape machined on both sides.

Also, the second electrical conductor 605 is not limited to any material as long as it has excellent heat and electrical conductivity. Particularly, the upper and lower surfaces are made of at least one of Si, SiGe, ZnO, GaN, AlSiC, GaAs substrate and Cu, Ni, Ag, Al, Nb, Ta, Ti, Au, Pd, It is preferable to use a metal, an alloy, or a solid solution.

The third conductive wafer bonding layer 606 and the fourth conductive wafer bonding layer 607 may be formed of Au, Ni, Cu, Ti, Ag, Al, Si, or the like, which forms a dense adhesive force under a predetermined pressure, A metal containing at least one of Ge, Pt, Pd, Rh, W, Mo, V, Sc, Hf, Ir, Re, Co, Zr, Ru, Ta, Nb, Mn, Mn, Cr, Alloy, solid solution or compound is used, and in particular, it is composed of a single layer or a multilayer structure of more than two layers.

11 is a cross-sectional view showing a second wafer plate portion prepared before forming the second sandwich composite, which is a step of manufacturing a vertical structure light emitting diode device.

A second sacrificial separation layer 705 and a fourth conductive wafer bonding layer 706 are sequentially formed on the upper surface of the second wafer plate 704 as a temporary substrate. The second wafer plate 704 may be formed of a material having a thermal expansion coefficient different from that of the growth substrate 501 by 2 ppm / Materials are not limited to use.

The second sacrificial separation layer 705 formed on the upper surface of the second wafer plate 704 may be formed of a Group II-VI compound including ZnO, a Group III-V compound including GaN, Al, Au, Ag, Cr, Ti , ITO, PZT, SU-8, and the like.

The fourth conductive wafer bonding layer 706 may be formed of Au, Ni, Cu, Ti, Ag, Al, Si, Ge, Pt, Pd, Rh, W, Mo Metal, alloy, solid solution or compound containing at least one or more of V, Sc, Hf, Ir, Re, Co, Zr, Ru, Ta, Nb, Mn, Mn, Cr and rare earth metals. Or a multi-layered structure of two or more layers.

12 is a cross-sectional view of a second sandwich composite in which a first sandwich composite, a second electric conductor, and a second wafer plate are simultaneously wafer bonded to produce a vertically structured light emitting diode device.

The first sandwich composite D includes an n-type nitride-based clad layer 502, a nitride-based active layer 503, a p-type nitride-based clad layer 504, a p-type ohmic contact electrode layer 510, A first conductive passivation layer 509, a reflective ohmic contact electrode layer 511, a first conductive wafer bonding layer 508, a first conductive wafer bonding layer 602, a first electrical conductor 601, And a bonding layer 604 are sequentially stacked.

The second electrical conductor portion E is formed by stacking third and fourth conductive wafer bonding layers 606 and 607 on the upper and lower surfaces of the second electrical conductor 605, respectively.

The second wafer plate portion F includes a second sacrificial separation layer 705 and a fourth conductive wafer bonding layer 706 sequentially stacked on the upper surface of a second wafer plate 704 as a temporary substrate.

The combination of the first sandwich composite D, the second electrical conductor portion E and the second wafer plate portion F is formed by the third conductive wafer bonding layer 604/606 and the fourth conductive wafer bonding layer Is performed at a constant pressure and a temperature of 300 DEG C or higher through the junction of the lid 607/706.

13 is a cross-sectional view showing a process of manufacturing a vertically structured light emitting diode device and separating a growth substrate from a wafer bonded second sandwich composite.

The process of separating the growth substrate 501 from the second sandwich composite G may be performed by a laser lift-off method using an excimer laser or the like, Or by etching. Particularly, when the growth substrate 501 is made of sapphire and SiC, it is preferable to perform the laser lift-off method. That is, when an excimer laser beam having a wavelength in a certain region is focused on the growth substrate 501 to irradiate the growth substrate 501 and the n-type nitride-based clad layer 502 including the buffer layer Thermal energy is concentrated on the interface so that the interface of the n-type nitride semiconductor 502 including the buffer layer thermally-chemically decomposes into gallium (Ga) and nitrogen (N) molecules, Separation of the growth substrate 501 occurs.

14 is a cross-sectional view showing a step of forming a second device passivation layer after the growth substrate is separated, which is a step of manufacturing a vertically-structured light-emitting diode device.

The second passivation layer 800 includes a first passivation layer 509, a p-type ohmic contact electrode layer 510, a reflective ohmic contact electrode layer 511, And the first conductive wafer bonding layer 508, as shown in FIG.

The second passivation layer 512 may be formed of a silicon oxide thin film (SiO2), a silicon nitride thin film (SiNx), an aluminum oxide thin film (Al2O3) It is preferable to form it to a thickness of 1000 nm.

15 is a cross-sectional view showing a step of forming surface irregularities on the top surface of the n-type nitride-based clad layer exposed to the atmosphere after removing a part of the second device passivation layer, in the step of producing a vertical structure light emitting diode device.

A part of the device passivation layer 800 existing on the top surface of the n-type nitride-based clad layer 502 is removed and a surface irregularity 900 is formed on the top surface of the n-type nitride- . The introduction of the surface irregularities 900 greatly helps emitting light generated in the nitride-based active layer 503 to the outside, thereby significantly improving the external luminous efficiency of the vertical structure light-emitting diode device.

Here, the introduction of the surface irregularities 900 is a method of forming a pattern having no regular regularity by using a wet solution, forming a pattern by various lithography processes, and then forming a curvature on the surface of the chip through an etching process I am using it.

16 is a cross-sectional view showing a step of forming an n-type ohmic contact electrode structure on the upper surface of an n-type nitride-based clad layer on which surface irregularities are formed, in the step of producing a vertical structure light emitting diode device.

The n-type ohmic contact electrode structure 1000 is formed on the n-type nitride-based clad layer 502 into which the surface irregularities 900 are introduced. Here, the formation of the n-type ohmic contact electrode structure 1000 is formed in a partial region or an entire region by using a mask. In particular, the position of the n-type ohmic contact electrode structure 1000 formed on the n-type nitride-based clad layer 502 faces the current blocking region in the p-type ohmic contact electrode layer 510.

FIG. 17 is a cross-sectional view showing a step of vertically cutting a step of manufacturing a vertically-structured light-emitting diode device.

A first conductive wafer bonding layer 602, a first electrical conductor 601, a third conductive wafer bonding layer 604, 606, a second electrical conductor 605, The fourth conductive wafer bonding layers 607 and 706, and the second sacrificial separation layer 705 are all vertically cut (1100). Here, the second wafer plate 704, which is the temporary substrate, is performed until it is exposed to the atmosphere.

18 is a final step of manufacturing a vertically structured light emitting diode device. After separating the vertically structured light emitting diode device from the second wafer plate as the temporary substrate, a p-type Ohmic contact electrode is formed on the back surface of the second electric conductor, Fig.

Type ohmic contact electrode spheres 1200 are formed on the rear surface of the second electric conductor 605 after lifting off a plurality of vertically structured light emitting diode elements unified from the second wafer plate 704 as the temporary substrate, And a die bonding layer 1300 are formed. The process of separating the second wafer plate 704 as the temporary substrate uses heat-chemical decomposition using a laser beam having a strong energy, wet etching, or chemical-mechanical polishing (CMP), mechanical polishing, or the like.

19 to 31 are cross-sectional views illustrating a vertical-type LED device manufacturing process according to a second embodiment of the present invention.

19 is a cross-sectional view showing a growth plate portion prepared before forming the sandwich composite, as a first step in manufacturing a vertical structure light emitting diode device.

An n-type nitride-based clad layer 502, a nitride-based active layer 503, and a p-type nitride-based clad layer 504 including a buffer layer are successively grown on the upper surface of the growth substrate 501, A p-type ohmic contact electrode layer 510 and a first device passivation layer 509 are stacked on the upper surface of the n-type cladding layer 504. Next, a reflective ohmic contact electrode layer 511 is laminated on the p-type ohmic contact electrode layer 510 and the first passivation layer 509, and then the first device passivation layer 509 and the reflective ohmic contact electrode layer 511 are sequentially formed. The second device passivation layer 800 is formed on the upper surface or the side surface of the second passivation layer 511. Thereafter, a first conductive wafer bonding layer 508 is formed on the upper surface of the reflective ohmic contact electrode layer 511 after removing a portion of the second device passivation layer 800.

The first passivation layer 509 is formed on the upper surface of the p-type nitride-based cladding layer 402 and the mesa-etched side surface.

The first passivation layer 509 may be a silicon oxide thin film (SiO2), a silicon nitride thin film (SiNx), or an aluminum oxide thin film (Al2O3) It is preferable to form it to a thickness of 100 nm.

The second passivation layer 800 is formed on the upper surface or side surface of the first passivation layer 509 and the reflective ohmic contact electrode layer 511.

The second passivation layer 800 may be formed of a material selected from the group consisting of silicon nitride (SiNx), silicon nitride (SiNx), aluminum oxide (Al2O3) To 1000 nm.

20 is a cross-sectional view showing a first electric conductor portion prepared before forming a sandwich composite, which is a step of manufacturing a vertical structure light emitting diode element.

21 is a cross-sectional view showing a wafer plate portion prepared before forming the sandwich composite, which is a step of manufacturing a vertically-structured light-emitting diode device.

The second conductive wafer bonding layer 703 may be formed of Au, Ni, Cu, Ti, Ag, Al, Si, Ge, Pt, Pd, Rh, W, Mo Alloys, solid solutions and compounds containing at least one or more selected from the group consisting of Cu, V, Sc, Hf, Ir, Re, Co, Zr, Ru, Ta, Nb, Mn, Mn, Cr and rare earth metals. Layer structure or a multi-layer structure of a double layer or more.

FIG. 22 is a cross-sectional view of a first sandwich composite in which the growth plate portion, the first electric conductor portion, and the first wafer plate portion are simultaneously wafer bonded to produce a vertical structure light emitting diode device. FIG.

The growth substrate plate G includes an n-type nitride-based clad layer 502, a nitride-based active layer 503, a p-type nitride-based clad layer 504, a p-type ohmic contact electrode layer 510, A first device passivation layer 509, a reflective ohmic contact electrode layer 511, and a first conductive wafer bonding layer 508 are stacked.

The first electric conductor portion H is formed by stacking first and second conductive wafer bonding layers 602 and 603 on the upper and lower surfaces of the first electric conductor 601, respectively.

The sacrificial separation layer 702 and the second conductive wafer bonding layer 703 are sequentially stacked on the upper surface of the wafer plate 701 as a temporary substrate.

The bonding of the growth plate portion G, the first electric conductor portion H and the first wafer plate portion I is performed between the first conductive wafer bonding layer 508/602 and the second conductive wafer bonding layer 603/703) at a constant pressure and a temperature of 300 ° C or higher.

23 is a view illustrating a step of manufacturing a vertically structured light emitting diode device in which a first wafer plate and a second conductive wafer bonding layer are separated from a wafer bonded first sandwich composite and then a third conductive A wafer bonding layer is formed.

24 is a cross-sectional view showing a second electric conductor portion prepared before forming the second sandwich composite, which is a step of manufacturing a vertical structure light emitting diode element.

Third and fourth conductive wafer bonding layers 606 and 607 are formed on the upper and lower surfaces of the second electrical conductor 605, respectively. Here, the A surface, which is the upper surface of the second electrical conductor 605, is the surface to which the first sandwich composite with the light emitting structure grown thereon is coupled, and the B surface that is the opposite bottom surface is the surface to which the second wafer plate,

25 is a cross-sectional view showing a second wafer plate portion prepared before forming the second sandwich composite, which is a step of manufacturing a vertical structure light emitting diode device.

26 is a cross-sectional view of a second sandwich composite fabricating a vertically structured light emitting diode device, wherein the first sandwich composite, the second electrical conductor portion, and the second wafer plate portion are simultaneously wafer bonded.

The first sandwich composite K includes an n-type nitride-based clad layer 502, a nitride-based active layer 503, a p-type nitride-based clad layer 504, a p-type ohmic contact electrode layer 510, A first conductive passivation layer 509, a reflective ohmic contact electrode layer 511, a first conductive wafer bonding layer 508, a first conductive wafer bonding layer 602, a first electrical conductor 601, And a bonding layer 604 are sequentially stacked.

The second electrical conductor portion L is formed by stacking third and fourth conductive wafer bonding layers 606 and 607 on the upper and lower surfaces of the second electrical conductor 605, respectively.

The second wafer plate portion M includes a second sacrificial separation layer 705 and a fourth conductive wafer bonding layer 706 sequentially stacked on the upper surface of a second wafer plate 704 as a temporary substrate.

The coupling of the first sandwich composite K, the second electrical conductor portion L and the second wafer plate portion M is carried out by the third conductive wafer bonding layer 604/606 and the fourth conductive wafer bonding layer Is performed at a constant pressure and a temperature of 300 DEG C or higher through the junction of the lid 607/706.

27 is a cross-sectional view showing a process of manufacturing a vertically-structured light-emitting diode device and separating a growth substrate from a wafer bonded second sandwich composite.

The process of separating the growth substrate 501 from the second sandwich composite N may be performed by a laser lift-off method using an excimer laser or the like, Or by etching. Particularly, when the growth substrate 501 is made of sapphire and SiC, it is preferable to perform the laser lift-off method. That is, when an excimer laser beam having a wavelength in a certain region is focused on the growth substrate 501 to irradiate the growth substrate 501 and the n-type nitride-based clad layer 502 including the buffer layer Thermal energy is concentrated on the interface so that the interface of the n-type nitride semiconductor 502 including the buffer layer thermally-chemically decomposes into gallium (Ga) and nitrogen (N) molecules, Separation of the growth substrate 501 occurs.

28 is a cross-sectional view showing a step of forming surface irregularities on the upper surface of the n-type nitride-based clad layer exposed to the atmosphere, in the step of producing a vertically-structured light-emitting diode device.

The surface irregularities 900 are introduced into the upper surface of the n-type nitride-based clad layer 502 exposed to the atmosphere to make a structural shape. The introduction of the surface irregularities 900 greatly helps emitting light generated in the nitride-based active layer 503 to the outside, thereby significantly improving the external luminous efficiency of the vertical structure light-emitting diode device.

29 is a cross-sectional view showing a step of forming an n-type ohmic contact electrode structure on the top surface of an n-type nitride-based clad layer on which surface irregularities are formed, in the step of producing a vertical structure light emitting diode device.

30 is a cross-sectional view showing a step of vertically cutting a step of manufacturing a vertically-structured light-emitting diode device.

31 is a final step of manufacturing a vertical structure light emitting diode device. After separating the vertical structure light emitting diode device from the second wafer plate as the temporary substrate, a p-type ohmic contact electrode is formed on the back surface of the second electric conductor, Fig.

32 is a cross-sectional view showing a vertical structure light emitting diode device using a single crystal group III nitride based semiconductor manufactured according to the present invention.

Referring to FIG. 32A, a light emitting structure for a light emitting diode device structured and electrically connected by two layers of conductive wafer bonding layers 508 and 602 is formed on an upper surface of a heat sink support O having a laminate structure. A p-type ohmic contact electrode layer 510 and a reflective ohmic contact electrode layer 511 are formed between the p-type nitride-based clad layer 504 of the light emitting structure and the conductive wafer bonding layers 508 and 602 of two layers, It is possible to manufacture a vertically structured light emitting diode element that is electrically and optically excellent. The p-type ohmic contact electrode layer 410 includes a current blocking region and includes an n-type ohmic contact electrode structure 1000 and a p-type ohmic contact electrode structure 1200 connected to the die bonding layer 1300. [ The current concentration phenomenon can be avoided around the n-type ohmic contact electrode structure 1000 when an external current is injected through the n-type ohmic contact electrode structure 1000.

In addition, since the light emitting structure is completely protected from the external conductive material and moisture by the two device passivation layers 509 and 800, high device reliability can be ensured. In particular, the second device passivation layer 800 is in contact with the first conductive wafer bonding layer 602 on the upper surface of the heat sink support O of the laminated structure.

32B, a vertically structured light emitting diode device manufactured by the present invention is structured and electrically connected to the upper surface of a heat sink support O of a laminated structure by two layers of conductive wafer bonding layers 508 and 602 A light emitting structure for a light emitting diode element is formed. A p-type ohmic contact electrode layer 510 and a reflective ohmic contact electrode layer 511 are formed between the p-type nitride-based clad layer 504 of the light emitting structure and the conductive wafer bonding layers 508 and 602 of two layers, It is possible to manufacture a vertically structured light emitting diode element that is electrically and optically excellent. The p-type ohmic contact electrode layer 410 includes a current blocking region and includes an n-type ohmic contact electrode structure 1000 and a p-type ohmic contact electrode structure 1200 connected to the die bonding layer 1300. [ The current concentration phenomenon can be avoided around the n-type ohmic contact electrode structure 1000 when an external current is injected through the n-type ohmic contact electrode structure 1000.

In addition, since the light emitting structure is completely protected from the external conductive material and moisture by the two device passivation layers 509 and 800, high device reliability can be ensured. Particularly, the second device passivation layer 800 is separated from the first conductive wafer bonding layer 602 on the upper surface of the heat sink support O of the laminated structure.

While the present invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention, It will be readily apparent to those skilled in the art.

FIG. 1 is a cross-sectional view of a group III nitride-based horizontal structure light emitting diode device in a unit chip form unified according to the prior art,

FIG. 2 is a view showing a process for manufacturing a group III nitride-based vertical-structured light-emitting diode device in the unit chip form unified according to the related art,

FIG. 3 is a view showing a process for manufacturing a group III nitride-based vertical-structured light-emitting diode device in the form of a single unit chip according to the related art,

FIG. 4 is a schematic cross-sectional view showing a process for manufacturing a vertical structure light-emitting device using a group III nitride-based semiconductor through a wafer bonding process proposed by the present invention,

5 to 18 are cross-sectional views illustrating a process of manufacturing a vertically-structured light-emitting diode device according to a first embodiment of the present invention,

19 to 31 are cross-sectional views illustrating a vertical-type LED device manufacturing process according to a second embodiment of the present invention,

Claims

an n-type ohmic contact electrode structure;

A n-type nitride-based clad layer, a nitride-based active layer, and a p-type nitride-based clad layer formed on a bottom surface of the n-type ohmic contact electrode structure;

A p-type ohmic contact electrode layer and a first device passivation layer including a current blocking region formed on a bottom surface of the light emitting structure;

A reflective ohmic contact electrode layer formed on a bottom surface of the p-type ohmic contact electrode layer and the first passivation layer;

A conductive wafer bonding layer formed on a bottom surface of the reflective ohmic contact electrode layer;

A second device passivation layer surrounding the light emitting structure, the p-type ohmic contact electrode layer, the first device passivation layer, the reflective ohmic contact electrode layer, and the conductive wafer bonding layer;

A heat sink support having a laminated structure formed on a bottom surface of the conductive wafer bonding layer;

A p-type ohmic contact electrode structure formed on a bottom surface of the heat sink support having the laminate structure; and a die bonding layer.

The method according to claim 1,

The p-type nitride-based cladding layer may have a superlattice structure, n-type conductivity of InGaN, GaN, AlInN, AlN, InN, AlGaN, p-type conductivity of InGaN, AlInN, InN, AlGaN, group III nitride-based semiconductor vertical-structured light-emitting diode device further comprising an interface modification layer that is a group III nitride having a nitrogen-polar surface.

3. The method of claim 2,

Wherein the superlattice structure comprises a nitride or carbon nitride group containing Group 2, Group 3, or Group 4 element components, and the group III nitride-based semiconductor vertical structure light emitting diode device.

The method according to claim 1,

Wherein the p-type ohmic contact electrode layer is a transparent electrode having a transmittance of 75% or more optically, or a reflector having a reflectance of 80% or more.

The method according to claim 1,

Wherein the current blocking region included in the p-type ohmic contact electrode layer comprises an air state, an electrically insulating material, or a material that forms a Schottky contact interface with the p-type nitride-based semiconductor. Semiconductor vertical structure light emitting diode device.

The method according to claim 1,

Wherein the reflective ohmic contact electrode layer is formed wider than a p-type ohmic contact electrode layer having a predetermined area.

The method according to claim 1,

wherein a side surface of the light emitting structure composed of the n-type nitride-based clad layer, the nitride-based active layer and the p-type nitride-based clad layer is protected by two device passivation layers which are insulator films. .

The method according to claim 1,

The heat sink support of the laminate structure is a structure in which two machined electrical conductors are bonded by a conductive wafer bonding layer.

9. The method of claim 8,

The electrical conductors constituting the heat sink support of the laminated structure are made of Si, SiGe, ZnO, GaN, AlSiC, GaAs substrate and Cu, Ni, Ag, Al, Nb, Ta, Ti, Au, Pd, Wherein the metal-based group III nitride-based semiconductor vertical-structured light-emitting diode device is a metal, an alloy, or a solid solution.

9. The method of claim 8,

An electrical conductor comprising a laminate structure heat sink support has a sheet, disk, or foil shape with a thickness of less than 1 mm. Group III nitride-based semiconductor vertical structure light emission Diode element.

The method according to claim 1,

Wherein the conductive wafer bonding layer is composed of a single layer or a multilayer structure of a double layer or more, which forms a tight bonding force under a temperature condition of at least 300 DEG C and a constant pressure.

The method according to claim 1,

The conductive wafer bonding layer may comprise at least one of Au, Ni, Cu, Ti, Ag, Al, Si, Ge, Pt, Pd, Rh, W, Mo, V, Sc, Hf, Ir, Re, Co, Zr, Nb, Mn, Mn, Cr, and a rare-earth metal, wherein the metal, alloy, or solid-solution material contains at least one of Nb, Mn, Mn, Cr and rare earth metals.

Performing isolation processing on a light-emitting diode structure for a light-emitting diode element grown on an upper surface of a growth substrate to a predetermined area;

Forming a p-type ohmic contact electrode layer and a first device passivation layer on the light emitting structure for a light emitting diode device that has undergone the smoothing process;

Forming a reflective ohmic contact electrode layer on the p-type ohmic contact electrode layer and the first passivation layer;

Forming a first conductive wafer bonding layer on the reflective ohmic contact electrode layer;

Forming first and second conductive wafer bonding layers on the top and bottom surfaces of the first electrical conductor, respectively;

Sequentially forming a first sacrificial separation layer and a second conductive wafer bonding layer on an upper surface of the first wafer plate;

Bonding the growth substrate and the wafer plate to an upper surface of the first and second conductive wafer bonding layers on the first and second electrical conductors, respectively, to form a first sandwich composite;

Separating the first wafer plate from the first sandwich composite using a laser lift-off, mechanical polishing, or etching process technique;

Removing the second conductive wafer bonding layer from the first sandwich composite and forming a third conductive wafer bonding layer;

Forming third and fourth conductive wafer bonding layers on the top and bottom surfaces of the second electrical conductor, respectively;

Sequentially forming a second sacrificial separation layer and a fourth conductive wafer bonding layer on the upper surface of the second wafer plate;

Bonding the first sandwich composite and the second wafer plate to the upper surface of the third and fourth conductive wafer bonding layers on the upper and lower surfaces of the second electrical conductor to form a second sandwich composite;

Separating the growth substrate in the second sandwich composite using a laser lift-off, mechanical polishing, or etching process technique;

Etching the n-type nitride-based clad layer in the second sandwich composite in which the growth substrate is separated so as to be exposed to the atmosphere;

Forming a second device passivation layer on the top and side surfaces of the scaled light emitting structure;

Forming surface irregularities on the surface of the n-type nitride-based clad layer exposed to the atmosphere;

Forming an n-type ohmic contact electrode structure on the surface of the n-type nitride-based clad layer on which the surface irregularities are formed;

Performing an etching and cutting process in a vertical direction to a top surface of the second wafer plate for the unified LED chip;

Separating the second wafer plate using a laser lift-off, a mechanical polishing, or an etching process; And

And forming a p-type ohmic contact electrode structure and a die bonding layer on the second electric conductor exposed to the atmosphere.

14. The method of claim 13,

Wherein the first and second wafer plates, which are temporary substrates, are made of the same material as the light-emitting structure growth substrate for a light-emitting diode device.

14. The method of claim 13,

The first and second sacrificial separation layers formed on the upper surfaces of the first and second wafer plates, which are temporary substrates, may be formed of a Group 2-6 compound including ZnO, a Group 3-5 compound including GaN, a compound of Al, Au, Ag, Cr, Ti , ITO, PZT, and SU-8. The method for manufacturing a group III nitride-based semiconductor vertical-structured light-emitting diode device according to claim 1,

14. The method of claim 13,

The first and second sandwich composites are formed in a vacuum, nitrogen (N2), and argon (Ar) atmosphere tightly bonded at a constant pressure and a temperature condition of at least 300 DEG C and oxygen (O2) Group III nitride-based semiconductor vertical structure light-emitting diode device.

14. The method of claim 13,

wherein the heat treatment is performed after the n-type ohmic contact electrode structure, the p-type ohmic contact electrode structure, the p-type ohmic contact electrode layer, the reflective ohmic contact electrode layer, or the conductive wafer bonding layer is deposited. Lt; / RTI >

14. The method of claim 13,

Wherein the thickness of each of the first passivation layer and the second passivation layer is 10 to 100 nm and 100 to 1000 nm, respectively.

14. The method of claim 13,

The method of manufacturing a vertical structure light emitting diode device according to claim 1, further comprising the steps of: providing an optoelectronics and an electronic device composed of group III nitride-based semiconductors other than the light-emitting diode device composed of group III nitride-based semiconductors on the top surface of a heat- ). &Lt; / RTI >

Forming a p-type ohmic contact electrode layer and a first device passivation layer on the light emitting structure for the light emitting diode device through the smoothing step;

Forming a second device passivation layer on an upper surface or a side surface of the p-type ohmic contact electrode layer, the first device passivation layer, and the reflective ohmic contact electrode layer;

Forming first and second conductive wafer bonding layers on the upper and lower surfaces of the first electrical conductor, respectively;

Bonding the growth substrate and the first wafer plate to the upper surface of the first and second conductive wafer bonding layers on the upper and lower surfaces of the first electrical conductor to form a first sandwich composite;

Forming surface irregularities on an upper surface of the n-type nitride-based clad layer exposed to the atmosphere;

And forming a p-type ohmic contact electrode structure and a die bonding layer on the lower surface of the second electrical conductor exposed to the atmosphere.

21. The method of claim 20,

Wherein the first and second wafer plates, which are temporary substrates, are made of the same material as the light-emitting structure growth substrate for a light-emitting diode device, and the group III nitride-based semiconductor vertical structure light-emitting diode device is manufactured.

21. The method of claim 20,