BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings, in which: FIG. However, the embodiments of the present invention can be modified in various ways, and the scope of the present invention should not be construed as being limited by the embodiments described below. The embodiments according to the technical concept of the present invention are provided for a more complete explanation of the present invention to those skilled in the art. Unless otherwise indicated, the same reference numbers in the drawings indicate like elements and the various elements and regions are schematically drawn. Accordingly, the invention is not limited by the relative size or spacing depicted in the accompanying drawings.
USB (Universal Serial Bus) is one of the input and output standards used to connect computers and peripherals. It is an interface developed to solve the inconvenience caused by the slow speed and limited device connection of existing serial or parallel connection. A USB memory device is a device that is connected to the same host as the computer and can be accessed by the host. When a USB memory device is connected to a USB port provided on the host, the user can access the files stored in the USB memory device through the host. With this USB interface, it is possible to connect peripherals such as a keyboard, a monitor, a mouse, a printer, or a modem, which are connected to each other by a different connection method at a time, and to connect up to 127 peripherals. And automatic recognition without performing the reboot process, and it is easy to install because the plug and play (PnP) is fully supported.
FIG. 1 is a block diagram schematically illustrating components of a USB memory device and a method of operating the same according to an embodiment of the present invention. Referring to FIG.
Referring to FIG. 1, a USB memory device 100 that can be connected to a host 200 is shown. The USB memory device 100 may include a control unit 20, a power supply unit 30, a wired communication interface 40, an optical communication interface 50, and a memory unit 60.
The memory unit 60 may store data and may include a storage device in which data is not lost even in the absence of power. The storage device may comprise a non-volatile memory, for example a flash memory. The memory unit 60 may store or delete data according to a request of the control unit 20 or provide the stored data to the control unit 20. [ In one example, the memory section 60 may consist of one or more semiconductor chips. In another example, the memory section 60 may be formed of a laminated semiconductor package in which a plurality of semiconductor dies are stacked.
The control unit 20 can control access to data stored in the memory unit 60. [ That is, the control unit 20 can control a recording / reading operation of a storage device included in the memory unit 60, for example, a flash memory, in accordance with a control command of the host 200. [ The control unit 20 may be a separate control semiconductor chip such as an application specific integrated circuit (ASIC), or may be a control program stored in the system area of the memory unit 60. The control unit 20 can be designed to be automatically executed by the operating system of the host 200 when the USB memory device 100 is connected to the host 200, for example. In this case, the control unit 20 may include a script for automatic execution and an application program that can be executed in the host 200. [
The power supply unit 30 can receive power from the host 200 and can also generate electric power using a power generation device such as a solar cell that can be mounted in the USB memory device 100. [ The produced power may be stored in a storage, for example, a battery. The power supply unit 30 can supply power to the control unit 20, the optical communication interface 50, and the memory unit 60. The power source provided from the power supply unit 30 may be a voltage of, for example, 3V to 5V.
The wired communication interface 40 may be a USB interface. The USB memory device 100 can transmit and receive data to / from the host 200 via the wired communication interface 40 by wire. The wired communication interface 40 may be a USB 1.1 interface having a transmission speed of up to 12 Mbps, a USB 2.0 interface having a transmission speed of up to 480 Mbps, or a USB 3.0 interface having a transmission speed of up to 4.8 Gbps. The USB memory device 100 can receive not only data signals but also driving power from the host 200 via the USB interface. Therefore, the wired communication interface 40 does not need to be supplied with power from the power supply unit 30, and can be driven through a power source from the host 200 provided by the wired communication interface 40.
The optical communication interface 50 can transmit and receive data to / from the host 200 using a wireless optical signal. The optical communication interface 50 can be driven by receiving power from the power source unit 30. [ The optical communication interface 50 can be activated or deactivated by the control unit 20, and the entire operation can be controlled by the control unit 20. When the USB memory device 100 is connected to the host 200 through the optical communication interface 50, the USB memory device 100 can perform UPnP (Universal Plug and Play) based wireless networking procedures.
The status of the USB memory device 100 may be displayed through the optical communication interface 50. [ For example, when the optical communication interface 50 uses light having a wavelength in the visible light region, it can display a communication waiting state, a communication connection state, and the like. For example, when the power is off, the optical communication interface 50 can display the status by not emitting any light. In the communication standby state, the optical communication interface 50 periodically blinks the light, In the communication connection state, the optical communication interface 50 may emit light to indicate the current state. The status display function of the optical communication interface 50 can be performed by the control unit 20.
In this specification, a USB flash drive is described as an example for explaining the USB memory device 100 according to the embodiments of the present invention. However, the present invention is not limited thereto It is not. For example, the USB memory device 100 may be one of various types of memory cards. For example, the USB memory device 100 may be a PC card (PCMCIA), a CompactFlash (CF), a SmartMedia (SM / SMC), a Memory Stick (MS), a Memory Stick Duo (MSD), a Multimedia Card SD), a miniSD card, a microSD card, an xD-Picture Card, and the like.
The host 200 may include any type of device including an operation unit, a storage unit, a control unit, and an input / output unit, and may be a computer, a personal computer (PC), a server, a portable computer, a personal digital assistant To and from peripheral devices such as mobile phones, MP3 players, navigation, portable multimedia players (PMPs) or repeaters, access points (APs), portable electronic devices, In the case of a storage device having a storage device,
In FIG. 1, it is shown that data communication with one host 200 is performed simultaneously via the wired communication interface 40 and the optical communication interface 50, but this is exemplary. And may communicate with the second host through the optical communication interface 50 while communicating with the first host through the wired communication interface 40. [ In addition, it is also possible to perform communication with the host 200 by selectively using any one of the wired communication interface 40 and the optical communication interface 50. For example, even when the USB memory device 100 is inserted into the USB slot of the host 200 and is connected to the wired communication interface 40, even if the wired communication interface 40 is communicating with the host 200 through the optical communication interface 50, The communication path may be switched. These operations can be performed by the control unit 20, and the operation rules can be determined according to a rule or setting preset by the user. These rules or settings may be recorded in the control unit 20 and stored in a part of the memory unit 60. [
2 is a block diagram illustrating an optical communication function of a USB memory device according to an embodiment of the present invention.
2, the optical communication interface 50 of the USB memory device 100 may include a light receiving unit 52 and a light emitting unit 54. The control unit 20 includes a memory control unit 24 and a communication unit 22, . ≪ / RTI > The host 200 may also include a light emitting portion 210 and a light receiving portion 220 corresponding to the light receiving portion 52 and the light emitting portion 54 of the USB memory device 100. Although not shown, the host 200 may include an optical communication control unit (not shown) for controlling the operations of the light emitting unit 210 and the light receiving unit 220 in addition to the light emitting unit 210 and the light receiving unit 220. ) And an optical communication control unit are collectively referred to as an optical communication module. The host 200 can perform optical communication with the USB memory device 100 through the optical communication module and the optical communication interface 50.
The optical communication module may be a separate device that can be attached to the host 200 and may be implemented by separately connecting an apparatus having an optical communication function to a host that does not have an optical communication function. In addition, the optical communication module may be an apparatus integrally formed with the host 200, and in this case, the optical communication function may be embodied in the host 200.
The light emitting portion 54 of the USB memory device 100 may include a light emitting diode (LED) or a laser diode (LD) capable of emitting light having a wavelength in the infrared ray or visible ray region. The light receiving unit 220 of the host 200 may include an element such as a photodiode capable of converting an optical signal into an electric signal at a wavelength of light emitted from the light emitting unit 54. That is, the light receiving unit 220 may include a photodiode that is responsive to light having a wavelength in the infrared or visible light region.
The light emitting portion 210 of the host 200 may include a light emitting diode (LED) or a laser diode (LD), and may emit light having a wavelength in the infrared ray or visible ray region. The light receiving unit 52 of the USB memory device 100 may include a photodiode that outputs an electrical signal in response to a wavelength of light emitted from the light emitting unit 210.
The light emitting portions 54 and 210 may include light emitting elements having a plurality of distinguishable wavelengths. For example, the light emitting units 54 and 210 may output a plurality of optical signals by including an infrared LED, a red LED, a green LED, and a blue LED. In this case, the light receiving portions 52 and 220 may be formed of the same number of light receiving elements to receive the light of the corresponding wavelength. Further, an optical filter for passing only light of a specific wavelength may be disposed at the front end of the light receiving portions 52 and 220. However, the types of the light emitting units 54 and 210 and the light receiving units 52 and 220 are exemplary, and the present invention is not limited thereto.
The light emitting unit 54 may include a light emitting driving unit (not shown) for driving the light emitting device. The light emitting driving unit amplifies a signal provided from the communication unit 22 to generate a driving signal, So that the light emitting element can output an optical signal. The light-receiving unit 52 may include a detector (not shown), for example, an analog-to-digital converter, for converting an electrical signal output from the light-receiving element into a digital signal. Whether the optical signal received by the light receiving element is 0 or 1 can be read by the detection unit.
The control unit 20 may include a communication unit 22 and a memory control unit 24.
The communication unit 22 can be communicably connected to the optical communication interface 50 and the wired communication interface 40. The communication unit 22 can decode the optical communication digital signal provided by the light receiving unit 52 of the optical communication interface 50 into an internal digital signal. The communication unit 22 may encode an internal digital signal provided from the memory control unit 24 into an optical communication digital signal and provide it to the light emitting unit 54.
The communication unit 22 may also be connected to the wired communication interface 40 and may perform encoding and decoding in a manner suitable for communication via the wired communication interface 40. The communication unit 22 encodes the internal digital signal into a communication digital signal and then transmits the communication digital signal to the wired communication interface 40 or the optical communication interface 50. In the case where the wired communication interface 40 and the optical communication interface 50 have the same encoding / To the host 200 via the light emitting unit 54 of the host computer 200. [ The communication unit 22 decodes the communication digital signal provided through the wired communication interface 40 or the light receiving unit 52 of the optical communication interface 50 into an internal digital signal and outputs the decoded communication digital signal to the memory control unit 24 .
The memory control unit 24 may analyze the internal digital signals decoded by the communication unit 22 and extract control signals, address signals, and / or data signals for controlling the memory unit 60. [ The memory control unit 24 analyzes the decoded internal digital signals to discriminate the control command and stores arbitrary data in a specific address of the memory unit 60 according to the control command, Any data can be read or deleted. Although the memory control unit 24 and the communication unit 22 are shown as separate functional blocks in the drawing, this is merely an example, and both of the functions may be processed in one block, or both functional units May be implemented.
The process of the USB memory device 100 receiving data from the host 200 will be described in detail. The process by which the USB memory device 100 receives data from the host 200 is shown by the solid arrow. The light emitting unit 210 of the host 200 transmits data to the light receiving unit 52 as an optical signal. The optical signal received by the light receiving section 52 is converted into an electric signal by the light receiving element. The optical signal may be passed through a filter which passes only a specific wavelength suitable for the light receiving section 52 before the optical signal reaches the light receiving section 52. The electrical signal may be filtered to remove noise and may be amplified to an arbitrary magnitude. The detecting unit of the light-receiving unit 52 can convert the electrical signal into an optical communication digital signal by comparing it with an arbitrary value or performing analog-digital conversion. The optical communication digital signal is transmitted to the communication unit 22. The communication unit 22 can decode the optical communication digital signal and convert it into an internal digital signal. The internal digital signal is provided to the memory control unit 24, and the memory control unit 24 can control the memory unit 60 by analyzing the internal digital signal. As described above, for example, according to control signals included in the internal digital signal, an arbitrary operation, for example, storing arbitrary data at an arbitrary address, deleting data at an arbitrary address, or reading data at an arbitrary address Can be performed. The communication unit 22 may have information on a predetermined optical wavelength band and protocol for data that can be transmitted and received between the host 200 and the USB memory device 100. Communication between the memory control unit 24 and the memory unit 60 can be realized by wire communication using a bonding wire, a solder ball, a bump, a penetrating electrode (TSV), wireless communication using RF, or optical communication using infrared rays or visible light have.
The process of receiving data from the host 200 through the wired communication interface 40 is as follows. Signals provided from the host 200 may be selectively filtered and / or amplified by the wired communication interface 40 and converted into wired communication digital signals. The wired communication digital signal may be provided to the communication unit 22. The communication unit 22 may decode the wired communication digital signal into an internal digital signal. The subsequent steps are substantially the same as those in the case of receiving the optical signal through the light receiving section 52 of the optical communication interface 50. [ Therefore, repeated explanation is omitted.
The process of transmitting data to the host 200 by the USB memory device 100 will be described in detail. The process of transmitting data from the USB memory device 100 to the host 200 is shown by the dotted arrow. The data to be transmitted among the data stored in the memory unit 60 by the memory control unit 24 may be provided to the communication unit 22 in the form of an internal digital signal. As described above, data transmission / reception between the memory unit 60 and the memory control unit 24 can be performed by wire communication, wireless communication, or optical communication. The communication unit 22 can encode the internal digital signal into a form suitable for the optical communication interface 50, that is, an optical communication digital signal. The optical communication digital signal is transmitted to the light emitting unit 54 and the light emission driving unit of the light emitting unit 54 may generate the driving signal according to the optical communication digital signal. The light emitting element of the light emitting portion 54 generates an optical signal in accordance with the driving signal. For example, when the driving signal is 1, the light emitting unit 54 emits light, and when the driving signal is 0, the light emitting unit 54 does not emit light, and vice versa. Also, the light emitting unit 54 may have a plurality of analog light outputs capable of expressing a plurality of bits. The emitted optical signal can be received by the light receiving unit 220 of the host 200 and transmitted to the host 200.
The modulation scheme of the optical communication between the host 200 and the USB memory device 100 is not limited. For example, the modulation method may be an On-Off Keying (OOK) method in which "1" is expressed as optical signal emission and "0" is expressed as optical signal cancellation. Also, a pulse position modulation method (PPM) in which n binary signal groups are represented by 2n optical pulse position times, a pulse interval modulation method (n + 1) in which n binary signal groups are represented by 2n optical pulse position time intervals (PSK), amplitude modulation (ASK), and so on, and then modulates the analog signal by using a conventional digital communication method such as pulse width modulation (PIM), Pulse Interval Modulation (PIM) Sub-carrier modulation (SCM) or the like that is re-modulated to the intensity of the light source.
The process of transmitting the data to the host 200 via the wired communication interface 40 is that the wired communication digital signal provided by the communication unit 22 is transmitted to the host 200 via the wired communication interface 50 And is substantially similar to the case where the optical communication interface 50 is used. Therefore, if the encoding / decoding schemes of the signals transmitted and received through the wired communication interface 40 and the optical communication interface 50 are the same, the communication unit 22 can perform both wired communication and optical communication by only one encoding and decoding Therefore, the time required for the arithmetic processing can be reduced, and the design complexity can be reduced.
As described above, through the optical communication between the host 200 and the USB memory device 100, highly reliable communication that is not affected by external noise can be achieved. Also, by using optical communication, data can be transmitted and received at high speed. It can also be connected to devices that do not have a USB port.
3 is a block diagram schematically showing the operation of the power supply unit 30 of the USB memory device 100 in relation to the host 200 according to an embodiment of the present invention.
Referring to FIG. 3, a power supply unit 30 for supplying power to the control unit 20, the optical communication interface 50, and the memory unit 60 is illustrated. The power supply unit 30 may include a power supply control unit 32, a solar cell 34, and a storage unit 36.
The solar cell 34 can convert solar energy into electrical energy. For example, the solar cell 34 may include a p-type semiconductor and an n-type semiconductor bonded to each other. When sunlight is projected on the p-type semiconductor and the n-type semiconductor, holes and electrons may be generated in the solar cell 34 due to the energy of the sunlight. The generated holes move toward the p-type semiconductor, and the generated electrons move toward the n-type semiconductor, and the electric current flows while the potential difference is generated. Therefore, current flows through the solar cell 34 by the sunlight, and the generated electricity is charged into the storage unit 36 through the power supply control unit 32.
The power control unit 32 can charge the storage unit 36 with electricity generated by the solar cell 34. [ The power supply control unit 32 may receive power from the host through the power supply terminal of the wired communication interface 40 and charge the storage unit 36. [ In addition, the power supply control unit 32 can operate the USB memory device 100 by supplying stable power from the charged storage unit 36 to the optical communication interface 50, the control unit 20, and the memory unit 60 . The power control unit 32 may include a high voltage prevention circuit so that the power provided from the host 200 and the electric energy provided from the solar cell 34 can be separated from each other. The power supply control unit 32 may include a constant voltage circuit so that a fixed voltage can be output.
The power control unit 32 can sense whether the USB memory device 100 is connected to the host 200 through the wired communication interface 40. [ When the USB memory device 100 detects that the USB memory device 100 is connected to the host 200 through the wired communication interface 40 during optical communication, the communication unit 22 can switch the communication mode from optical communication to wired communication. As described above, this switching can be set by the user.
The power supply control unit 32 can supply electricity provided from the solar cell 34 to the host 200 through the wired communication interface 40. [ For example, when the host 200 is a portable device such as a PDA or a mobile phone and the battery of the portable device is discharged and can not be used, the electric energy generated by the solar cell 34 is transmitted to the wired communication interface 40 The battery of the portable device can be charged.
The storage unit 36 may store the power supplied from the host 200 and the electric energy provided from the solar cell 34. [ The storage unit 36 may be a rechargeable rechargeable battery. For example, the storage unit 36 may include a nickel-cadmium battery, a nickel-hydrogen battery, a lithium ion battery, a lithium ion polymer battery, or a lead acid battery.
The USB memory device 100 capable of optical communication according to the present invention is portable and can communicate with an external device wirelessly. This will require a separate power supply. The USB memory device 100 according to the present invention can produce electricity by itself by providing the solar cell 34. [ Accordingly, the USB memory device 100 can have more driving time, and even if the rechargeable battery is discharged, the solar cell 34 can be used for continuous driving.
4 is a cross-sectional view schematically showing a USB memory device 100 according to an embodiment of the present invention.
4, a USB memory device 100 includes a substrate 10, at least one control semiconductor chip 20, at least one passive device 28, and at least one memory semiconductor chip 60 . In addition, the USB memory device 100 may include an optical communication interface 50 and a wired communication interface 40. In addition, the USB memory device 100 may include a power control semiconductor chip 32, a solar cell 34, and a battery 36. In one example, the USB memory device 100 includes an encapsulating material for encapsulating the control semiconductor chip 20, the passive element 28, the memory semiconductor chip 60, the optical communication interface 50, and the power source control semiconductor chip 32 (98). In addition, the USB memory device 100 may further include a case 90 surrounding the outside of the sealing material 98. The USB memory device 100 may also include a transparent window 92 that exposes a portion of the optical communication interface 50 and a transparent protective film 94 that exposes a surface of the solar cell 34. [
The substrate 10 includes a first side 12 and a second side 14 opposite the first side 12. An optical communication interface 50 may be located in a portion of the first side 12. Also, the control semiconductor chip 20, the passive elements 28, and the memory semiconductor chip 60 may be located in a part of the first surface 12. In addition, a suitable number of USB terminals 44 may be located in a part of the first surface 12. For example, according to the USB 1.1 or USB 2.0 standard, the number of the USB terminals 44 can be four, which can correspond to + power supply, + data, - data, and - power supply, respectively. A part of the board 10 and the USB terminal 44 can constitute a wired communication interface 40. [ For this, the thickness of the substrate 10 can be determined according to the USB standard. However, a portion of the substrate 10 does not necessarily have to be inserted into the USB port, and the embodiment shown in Fig. 4 is exemplary.
The control semiconductor chip 20, the passive element 28, the USB terminal 44, the power source control semiconductor chip 32, the solar cell 34, the battery 36, the optical communication interface 50, and the memory semiconductor chips 60 May be electrically connected by a first wiring 16 on the first surface 12 and a second wiring 18 on the second surface 14. [ Therefore, the control semiconductor chip 20, the passive element 28, the power source control semiconductor chip 32, the optical communication interface 50, and the memory semiconductor chip 60 are connected to the USB terminal 44, the solar cell 34, Power can be supplied from the power supply control semiconductor chip 36 and / or the power supply control semiconductor chip 32 through the first wiring 16 and the second wiring 18. The first wiring 16 and the second wiring 18 may be electrically connected to each other via a via electrode passing through the substrate 10, for example.
The substrate 10 may comprise an epoxy resin, a polyimide resin, a bismaleimide triazine (BT) resin, FR-4 (Flame Retardant 4), FR-5, ceramic, silicon, or glass, And the present invention is not limited thereto. The substrate 10 may be a single layer, or it may include a multi-layer structure including wiring patterns therein. For example, the substrate 10 may be a rigid flat plate, a plurality of rigid flat plates adhered to each other, or a rigid flat plate adhered to a thin flexible printed circuit board. The plurality of rigid flat plates, or the printed circuit boards, which are adhered to each other, may each include a wiring pattern. In addition, the substrate 10 may be a low temperature co-fired ceramic (LTCC) substrate. The LTCC substrate may include a plurality of ceramic layers stacked, and may include a wiring pattern therein.
The control semiconductor chip 20 may be electrically connected to the first wiring 16 through the first connection member 26. [ The control semiconductor chip 20 may correspond to the control unit 20 of Fig. It may also include a circuit portion of the wire communication interface 40 of FIG. 1 and a circuit portion of the optical communication interface 50. The control semiconductor chip 20 can control communication between the USB memory device 100 and the host 200. [ In addition, the control semiconductor chip 20 can control the operation of storing, reading, and deleting data in the memory semiconductor chip 60. Further, the control semiconductor chip 120 may be a semiconductor die or a semiconductor package. The first connecting member 26 may be a bonding wire. In addition, although the first connecting member 26 is shown as being a bonding wire, this is merely an example, and the present invention is not limited thereto. For example, the first connecting member 26 may be a conductive vias such as solder balls, flip-chip bonding members, bumps, though silicon via, or combinations thereof. Although the control semiconductor chip 20 is shown as being disposed on the first side 12, it is illustrative and may be formed in the recessed area in the substrate 10, May be disposed on the control semiconductor chip 20 in the recess region.
The passive element 28 may be located on a partial area of the first side 12 and may be electrically connected to the wiring 16 via solder or solder. The passive element 28 may be a resistance element, an inductor element, a capacitor element, or a switch element, but the present invention is not limited thereto. Although the passive elements 28 are shown as being disposed on the first side 12, this is exemplary and may be formed in recessed regions within the substrate 10, in which case the memory semiconductor chip 60 Or may be disposed on the passive element 28 in the recess region.
The power source control semiconductor chip 32, the battery 36 and the solar cell 34 may correspond to the power source control unit 32, the storage unit 36 and the solar cell 34, respectively, of FIG. 4, the power supply control semiconductor chip 32 may be connected to the second wiring 18 on the second side 18 of the substrate 10 via the second connecting member 33. In the embodiment shown in Fig. The power supply control semiconductor chip 32 may include a charging circuit for charging the battery 36 with power supplied from the host 200 through the USB terminals 17. [ In addition, the power source control semiconductor chip 32 may include a charging circuit for charging the battery 36 with the power generated through the solar cell 34. The power source control semiconductor chip 32 can supply power to the memory semiconductor chip 60, the control semiconductor chip 20 and the optical communication interface 50 through the second wiring 18 and the first wiring 16 have. Further, the power source control semiconductor chip 32 may include an overvoltage protection circuit, a constant voltage holding circuit, and / or a dc-dc conversion circuit. Therefore, the USB memory device 100 according to an embodiment of the present invention can generate power and perform stable operation even when power is not supplied from the outside, so that it is not necessary to be electrically connected to the host 200. [ Although the power control semiconductor chip 32, the solar cell 34 and the battery 36 are shown as being disposed on the second side 14 of the substrate 10, this is illustrative, 60). Although the power control semiconductor chip 32 is shown as being a separate component from the control semiconductor chip 22, this is merely exemplary, and the function of the power control semiconductor chip 32 may be controlled by the control semiconductor chip 22 .
The optical communication interface 50 may include a light emitting portion 54 and a light receiving portion 52. Here, the optical communication interface 50 may correspond to the optical communication interface 50 of Fig. The light emitting portion 54 and the light receiving portion 52 may correspond to the light emitting portion 54 and the light receiving portion 52 described with reference to FIG. The light emitting unit 54 and the light receiving unit 52 can transmit optical signals to the host 200 (see FIG. 2) and receive optical signals from the host 200. Therefore, the light emitting unit 54 and the light receiving unit 52 may be positioned corresponding to the light receiving unit 220 and the light emitting unit 210 of the host 200, respectively, and may be arranged to face each other. The communication unit 22 may encode an internal digital signal into an optical communication digital signal to generate an optical signal to be transmitted and provide the optical signal to the light emitting unit 54. The light emitting unit 54 outputs the optical signal according to the optical communication digital signal . The light receiving unit 52 can convert the received optical signal into an electrical signal, convert it into an optical communication digital signal, and provide it to the communication unit 22. The communication unit can convert the optical communication digital signal into an internal digital signal and transmit it to the control semiconductor chip 20. The remaining circuit parts, for example, the detecting part, other than the light receiving element in the light receiving part 210 excluding the light emitting element, for example, the light emitting driving part and the light receiving part 210 may be included in the control semiconductor chip 20.
The control semiconductor chip 20 can control the overall operation of the light emitting unit 210 and the light receiving unit 210. [ The control semiconductor chip 20 may provide an optical communication digital signal encoding an internal digital signal to the light emitting unit 210 and may decode the optical communication digital signal provided from the light receiving unit 210 into an internal digital signal. The memory semiconductor chip 60 can be accessed according to the decoded internal digital signal.
The memory semiconductor chip 60 may be electrically connected to the first wiring 16 through the third connection member 62. [ The memory semiconductor chip 60 may correspond to the memory section 60 of Fig. The memory semiconductor chip 60 is a storage device capable of storing data and is a storage device such as a NAND flash memory, a PRAM (Phase-change random access memory), an RRAM (Resistive RAM), a FeRAM (Ferroelectric RAM) Volatile memory. In addition, the memory semiconductor chips 60 may be the same or different in size. In addition, the memory semiconductor chip 60 may be a semiconductor die or a semiconductor package. The type, number, size, stacking method, lamination shape, etc. of the memory semiconductor chip 60 shown in the figure are illustrative and the present invention is not limited thereto. The third connecting member 62 may be a bonding wire. Although the third connecting member 62 is shown as a bonding wire in the drawing, this is merely an example, and the present invention is not limited thereto. For example, the third connecting member 62 may be a conductive vias, such as solder balls, flip chip bonding members, bumps, though silicon via, or combinations thereof.
The encapsulant 98 may be an encapsulant material, for example, an epoxy resin or a silicone resin, which is exemplary and the present invention is not limited thereto. The encapsulant 98 protects the substrate 10, the control semiconductor chip 20, the passive element 28, the memory semiconductor chip 60, the optical communication interface 50, and the power supply control semiconductor chip 32 from the outside . In addition, the case 90 may include a metal or a polymer, and may protect the USB memory device 100 from the outside, and at least a part of the case 90 may be omitted in some cases. In addition, the sealing material 98 can replace the function of the case 90. [ Note that the case 90 exposes the light emitting portion 54 and the light receiving portion 52 through the transparent window 92. [ This is because the light is not blocked but emitted to the outside or received from the outside. In addition, a transparent protective film 94 may be disposed on one side of the solar cell 34 so that the sunlight can reach the solar cell 34 and protect the solar cell 34.
FIG. 5 is a block diagram schematically illustrating components of a USB memory device and a method of operating the same according to another embodiment of the present invention. Referring to FIG.
The USB memory device 300 shown in FIG. 5 is substantially similar to the USB memory device 100 shown in FIG. 1 and includes only a second optical communication interface 70, And a function for optical communication with the optical fiber. The description of substantially the same components will not be repeated.
Referring to FIG. 5, the USB memory device 300 further includes a second optical communication interface 70. The second optical communication interface 70 is for optical communication between the control unit 20 and the memory unit 80. The second optical communication interface 70 is substantially similar to the first optical communication interface 50 substantially identical to the optical communication interface 50 of FIG. This is described in more detail below.
The USB memory device 300 may include a memory unit 80 and the memory unit 80 may include an optical communication interface corresponding to the second optical communication interface 70. [
6 is a block diagram illustrating internal and external optical communication functions of a USB memory device according to another embodiment of the present invention.
The USB memory device 300 shown in Fig. 6 includes a second optical communication interface 70 and a memory unit 80 including a light receiving unit 82, a light emitting unit 84 and a light communication unit 86 And is substantially similar to the USB memory device 100 shown in Fig. The description of substantially the same components will not be repeated. 6, some components are omitted, but this does not mean that they are not shown in the drawings but should be omitted for the sake of clear understanding.
Referring to FIG. 6, the USB memory device 300 may further include a second optical communication interface 70 and a memory unit 80. The second optical communication interface 70 may further include a light emitting portion 72 and a light receiving portion 74. The memory unit 80 may include a wireless communication unit 86, a light receiving unit 82, and a light emitting unit 84 for optical communication with the control unit 20.
The light emitting portion 72 of the second optical communication interface 70 and the light emitting portion 84 of the memory portion 80 are light emitting elements capable of emitting light having a wavelength in the infrared ray or visible light region, Or a laser diode (LD). The light receiving section 74 of the second optical communication interface 70 and the light receiving section 82 of the memory section 80 can convert the optical signal into an electrical signal at the wavelength of the light emitted from the light emitting section 84 and the light emitting section 72 For example, a photodiode. That is, the light receiving portion 74 and the light receiving portion 82 may include a photodiode responsive to light having a wavelength in the infrared ray or visible light region. The light emitting unit 72 may transmit an optical signal to the light receiving unit 82 and the light emitting unit 84 may transmit the optical signal to the light receiving unit 74. The control unit 20 and the memory unit 80 can transmit and receive data by optical communication through the light emitting units 72 and 84 and the light receiving units 74 and 82.
The memory unit 80 may store data. The memory unit 80 may include an optical communication unit 86. The memory unit 80 may store or delete data according to the control command input through the optical communication unit 86 or may provide the stored data to the control unit 20 through the optical communication unit 86. [ The memory unit 80 may be formed of one or more semiconductor chips, and the optical communication unit 86 may be formed in a peripheral circuit area. The light emitting portion 84 and the light receiving portion 82 may be formed in the semiconductor chip. The light emitting portion 84 and the light receiving portion 82 may be attached to the semiconductor chip as separate elements. The memory unit 60 may be a laminated semiconductor package in which a plurality of semiconductor dies are stacked.
The process by which the USB memory device 300 receives data from the host 200 will be described in detail. The process of the USB memory device 300 receiving data from the host 200 is shown by the solid arrow. The light emitting unit 210 of the host 300 transmits data to the light receiving unit 52 as an optical signal. The optical signal received by the light receiving section 52 is converted into an electric signal by the light receiving element. The detection unit of the light receiving unit 52 can read the electrical signal and convert it into an optical communication digital signal. The optical communication digital signal is transmitted to the communication unit 23. The optical communication digital signal transmitted to the communication unit 23 is analyzed by the communication control unit 24, and the memory unit 80 to execute the command included in the optical communication digital signal is determined. The communication unit 23 transmits at least a part of the optical communication digital signal to the light emitting unit 72 of the second optical communication interface unit 70 corresponding to the memory unit 80 without converting the optical communication digital signal into the internal digital signal . The light emitting unit 72 converts the at least a part of the data into an optical signal. The optical signal is received by the light receiving unit 82 of the memory unit 80, converted into an electric signal, and then converted into an optical communication digital signal. The optical communication digital signal is converted into an in-chip digital signal suitable for use in the memory unit 80 by the optical communication unit 86, and the data of the memory unit 80 is stored / deleted / read in accordance with the digital signal in the chip .
The process of transmitting data to the host 200 by the USB memory device 100 will be described in detail. The process of transmitting data from the USB memory device 100 to the host 200 is shown by the dotted arrow. Data to be transmitted among the data stored in the memory unit 80 may be provided to the optical communication unit 86 in the form of a digital signal in the chip. The optical communication unit 86 encodes the in-chip digital signal into an optical communication digital signal and transmits it to the light emitting unit 84. The light emitting unit 84 outputs an optical signal according to the optical communication digital signal. The light receiving unit 74 receives the optical signal, converts it into an electrical signal, and converts it into an optical communication digital signal. The communication unit 23 converts the optical communication digital signal into a form suitable for a protocol with the host and provides the optical communication digital signal to the light emitting unit 54. The light emitting unit 54 converts the converted optical communication digital signal into an optical signal and provides the optical signal to the light receiving unit 220. The modulation method of optical communication between the control unit 20 and the memory unit 80 is not limited.
As described above, highly reliable communication that is not affected by external noise can be achieved through optical communication between the control unit 20 and the memory unit 80. [ Also, by using optical communication, data can be transmitted and received at high speed. Further, by making the optical communication between the host 200 and the control unit 20 and the system the same, the amount of calculation of the communication unit 23 can be reduced. The communication unit 23 can transmit the data without conversion according to the final destination memory unit 80 of the data transmitted from the host 200. [
7 is a cross-sectional view schematically showing a USB memory device 300 according to another embodiment of the present invention.
The USB memory device 300 of FIG. 7 is similar to the USB memory device 100 of FIG. Substantially the same components are not described.
7, the first to third light emitting portions 72a, 72b, 72c and the first to third light receiving portions 74a, 74b, 74c are formed on at least a part of the first surface 12 of the substrate 10, . Also, the first to third memory semiconductor chips 80a, 80b, 80c are disposed on at least a part of the region of the first surface 12 of the substrate 10. The first to third light emitting portions 72a to 72c and the first to third light receiving portions 74a to 74c are connected to the first wiring 16 and electrically connected to the power control semiconductor chip 32, And the solar cell 34, as shown in Fig. An intermediate member 83 (not shown) is provided between the first surface 12 of the substrate 10 and the first memory semiconductor chip 80a to allow them to be spaced therebetween and to attach the first memory semiconductor chip 80a onto the substrate 10 ) Can be interposed. The intermediate member 83 may include openings so that the first to third light emitting portions 72a, 72b, 72c and the first to third light receiving portions 74a, 74b, 74c are disposed and exposed.
The first memory semiconductor chip 80a may be disposed on the intermediate member 83. [ The first memory semiconductor chip 80a may include a first light emitting portion 84a and a first light receiving portion 82a. Although not shown, an optical communication portion may be formed. The first light emitting portion 84a and the first light receiving portion 82a may be arranged to correspond to the first light receiving portion 74a and the first light emitting portion 72a, respectively. That is, they can be arranged to face each other. The first memory semiconductor chip 80a has a light path between the second light emitting portion 84b and the second light receiving portion 82b and between the second light receiving portion 74b and the second light emitting portion 72b and the third light emitting portion 84c, And the third light receiving portion 82c, the third light receiving portion 74c, and the third light emitting portion 72c.
The intermediate film 85 may be disposed on the first memory semiconductor chip 80a and the intermediate film 85 may be thinner than the intermediate member 83. [ The first memory semiconductor chip 80a has no protruding elements such as the first to third light emitting portions 72a, 72b and 72c and the first to third light receiving portions 74a, 74b and 74c. The intermediate film 85 also has a light path between the second light emitting portion 84b and the second light receiving portion 82b and between the second light receiving portion 74b and the second light emitting portion 72b and the light path between the third light emitting portion 84c and the third light receiving portion 82b, The light receiving portion 82c, the third light receiving portion 74c, and the third light emitting portion 72c. The intermediate film 85 can fix the second memory semiconductor chip 80b on the first memory semiconductor chip 80a.
The second memory semiconductor chip 80b may be arranged such that the second light emitting portion 84b and the second light receiving portion 82b correspond to the second light receiving portion 74b and the second light emitting portion 72b on the intermediate film 85 have. That is, they can be arranged to face each other. The second memory semiconductor chip 80b is formed with through holes so that the light path between the third light emitting portion 84c and the third light receiving portion 82c and between the third light receiving portion 74c and the third light emitting portion 72c can be secured .
The intermediate film 85 may be disposed on the second memory semiconductor chip 80b. The interlayer 85 may have openings formed therein to ensure the optical path between the third light emitting portion 84c and the third light receiving portion 82c and between the third light receiving portion 74c and the third light emitting portion 72c. The intermediate film 85 can fix the third memory semiconductor chip 80c on the second memory semiconductor chip 80b.
The third memory semiconductor chip 80c may be arranged such that the third light emitting portion 84c and the third light receiving portion 82c correspond to the third light receiving portion 74c and the third light emitting portion 72c on the intermediate film 85 have. That is, they can be arranged to face each other.
The first to third light emitting portions 72a to 72c and the first to third light receiving portions 74a to 74c and the first to third light receiving portions 82a to 82c, The first and second semiconductor memory chips 84a, 84b and 84c are stable through the optical paths secured by the through holes of the first and second memory semiconductor chips 80a and 80b and the openings of the intermediate member 83 and the intermediate film 85, Optical communication can be performed.
Since the light emitting portions 72 and 84 and the light receiving portions 74 and 82 are located at a relatively short distance from each other and located at a fixed distance from each other, the intensity of the optical signal may be weaker than that of the light emitting portion 54 and the light receiving portion 52 , And accordingly the size thereof may be small.
Although three memory semiconductor chips are stacked in Fig. 7, this is exemplary and it should be noted that fewer or more memory semiconductor chips may be stacked. Although the first through third light emitting portions 72a 72b and 72c and the first through third light receiving portions 74a 74b and 74c are shown protruding on the substrate 10, And may be recessed and arranged in the substrate 10.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Will be clear to those who have knowledge of.
