KR101388350B1 - Source driver integrated circuit and liquid crystal display using the same - Google Patents

Abstract

The present invention relates to a source driver integrated circuit and a liquid crystal display device having the same, wherein the source driver integrated circuit includes the digital signal when a gray level of an input N-bit digital signal belongs to a linear gray level section of a gamma curve. A linear converter including a first converter converting the upper M bits of the signal into an analog signal and a second converter converting the lower (NM) bits of the digital signal into an analog signal; And a nonlinear converter for converting the digital signal into an analog signal when the gray level of the N bit digital signal belongs to a nonlinear gray level section of the gamma curve. The first converter decodes the upper M bits and outputs two voltages among the gamma reference voltages of the linear grayscale interval. The second converter decodes the lower (N-M) bit to select one of the voltages between the two voltages.

Liquid Crystal Display, Source Driver, Digital-to-Analog Converter

Description

Source driver integrated circuit and liquid crystal display having the same {Source driver integrated circuit and liquid crystal display using the same}

1 is a configuration diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a detailed block diagram illustrating a source driver integrated circuit constituting the source driver of FIG. 1.

3 is a graph illustrating gamma characteristics of the source driver integrated circuit of FIG. 2.

FIG. 4 is a detailed configuration diagram of a digital-analog converter constituting the source driver integrated circuit of FIG. 2.

DESCRIPTION OF THE REFERENCE NUMERALS (S)

100: liquid crystal panel 110: gate driver

120: source driver 130: timing controller

140: gamma voltage generator 150: backlight assembly

160: inverter 220: source driver integrated circuit

221: shift register 222: data register

223 data latch 224 digital-to-analog converter

225: output buffer

The present invention relates to a display device, and more particularly, to a source driver integrated circuit and a liquid crystal display device having the same.

The liquid crystal display device has a liquid crystal layer having an anisotropic permittivity between an upper and a lower substrate, which is a transparent insulating substrate, and then adjusts the intensity of an electric field formed on the liquid crystal layer to change the molecular arrangement of the liquid crystal material. And displays a desired image by adjusting the amount of light transmitted through the upper substrate.

Such a liquid crystal display device includes a liquid crystal panel in which an image is displayed and a driving unit for driving the liquid crystal panel.

The liquid crystal panel includes a plurality of gate lines that form a row and data lines that form a column and intersect the gate lines, and a plurality of regions in which regions are divided by gate lines and data lines that cross each other. The pixels are arranged in a matrix type to form a frame. When the scan signal is sequentially applied to the gate lines, an analog signal is applied to each data line in synchronization with the scan signal, and one frame is displayed on the liquid crystal panel.

The driving unit of the liquid crystal display includes a plurality of source driver integrated circuits for applying an analog signal to data lines of the liquid crystal panel.

Each source driver integrated circuit receives the image data, and selects a gamma voltage corresponding to the image data from a plurality of levels of gamma voltages and outputs the same to the liquid crystal panel.

In general, a plurality of levels of gamma voltages are generated by a plurality of resistor-strings serially formed, and the generated plurality of levels of gamma voltages are included in a source driver integrated circuit to perform digital-to-analog conversion. It is used as the reference voltage of the digital-to-analog converter.

As a conventional digital-to-analog converter, a resistive string type digital-to-analog converter in which an N bit decoder is formed using a plurality of switches is generally used.

In the resistance string type digital-to-analog converter, 2 ^N switch strings having ^N switches are arranged. Here, the number of switch strings is increased by twice each time the number of bits is increased by one bit, and the area occupied by the switch strings is also increased by two times.

When the N-bit resistive string digital-to-analog converter having such a structure is used in a high-resolution source driver integrated circuit, an area must be greatly increased when the number of bits is increased, which makes it difficult to miniaturize and to increase the manufacturing cost.

Accordingly, an aspect of the present invention is to provide a source driver integrated circuit having a low area increase ratio according to an increase in the number of bits and a liquid crystal display having the same.

Another object of the present invention is to provide a source driver integrated circuit and a liquid crystal display device having the same, which can reduce manufacturing cost through area reduction.

Another object of the present invention is to provide a source driver integrated circuit suitable for a high resolution model and a liquid crystal display device having the same.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not intended to limit the invention to the precise forms disclosed. Other objects, which will be apparent to those skilled in the art, It will be possible.

The source driver integrated circuit of the present invention includes a first converter which converts the upper M bits of the digital signal into an analog signal when the gray level of the input N-bit digital signal belongs to the linear gray level section of the gamma curve; And a linear converter including a second converter converting the lower (NM) bits of the digital signal into an analog signal; And a nonlinear converter for converting the digital signal into an analog signal when the gray level of the N bit digital signal belongs to a nonlinear gray level section of the gamma curve.
The first converter decodes the upper M bits and outputs two voltages among the gamma reference voltages of the linear grayscale interval.
The second converter decodes the lower (NM) bit to select one of the voltages between the two voltages.

The liquid crystal display device of the present invention comprises: a liquid crystal panel in which pixels of are arranged in a matrix form; A gate driver supplying a scan signal to the liquid crystal panel; A source driver converting an input N-bit digital signal into an analog signal and outputting the analog signal to the liquid crystal panel; And a timing controller to control driving timing of the gate driver and the source driver.
The source driver may include: a first converter configured to convert upper M bits of the digital signal into an analog signal when the gray level of the N bit digital signal belongs to a linear gray level section of a gamma curve; A linear converter including a second converter for converting the lower (NM) bits into an analog signal; And a nonlinear converter for converting the digital signal into an analog signal when the gray level of the N bit digital signal belongs to a nonlinear gray level section of the gamma curve.

The details of other embodiments are included in the detailed description and drawings. Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. Like reference numerals refer to like elements throughout the specification.

Hereinafter, a source driver integrated circuit and a liquid crystal display having the same according to embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a configuration diagram of a liquid crystal display device according to an embodiment of the present invention.

Referring to FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel 100, a gate driver 110, a source driver 120, a timing controller 130, and a gamma voltage generator 140. , Backlight assembly 150, inverter device 160, and the like.

On the liquid crystal panel 100, a plurality of pixels are formed in a matrix form, and the data lines DL1, which form a column with the gate lines GL1, GL2,... GLn, which form a row. DL2, ..., DLm) are arranged to cross each other.

Each pixel is divided into regions by gate lines GL1, GL2, ..., GLn and data lines DL1, DL2, ..., DLm that cross each other. Thin film transistors having a gate electrode, an active layer, a source electrode, and a drain electrode are disposed at the intersections of the gate lines GL1, GL2, ..., GLn and the data lines DL1, DL2, ..., DLm. Is placed.

In each pixel, a liquid crystal material equivalent to the liquid crystal cell Clc is formed, and a storage capacitor Cst for maintaining a constant voltage applied to the liquid crystal cell Clc is formed.

The liquid crystal panel 100 may be configured according to scan signals supplied through the gate lines GL1, GL2,..., And GLn, and gamma voltages supplied through the data lines DL1, DL2,..., And DLm. An image is displayed on the pixel. Here, the scan signal is a pulse in which the gate high voltage supplied for one horizontal period and the gate low voltage supplied for the remaining period are alternated.

The thin film transistor TFT provided for each pixel is turned on when the gate high voltage from the gate lines GL1, GL2, ..., GLn is supplied, and the data lines DL1, DL2, ..., The gamma voltage provided from DLm is supplied to the liquid crystal cell Clc. The thin film transistor TFT is turned off when a gate low voltage is supplied from the gate lines GL1, GL2,..., GLn, so that the voltage charged in the liquid crystal cell Clc is maintained for a predetermined time. maintain.

The gate driver 110 includes a plurality of integrated gate drivers (not shown), and the gate lines GL1, GL2,..., GLn according to the gate control signal supplied from the timing controller 130. The scan signals are supplied sequentially.

The source driver 120 includes a plurality of integrated source driver integrated circuits 220 (see FIG. 2) and corresponds to red, green, and blue image data input from the timing controller 130 in response to a data control signal. The gamma voltage is selected and supplied to the data lines DL1, DL2, ..., DLm of the liquid crystal panel 100 every one horizontal period.

Here, the gamma voltage applied to the liquid crystal panel 100 is selected according to the image data of red, green, and blue input from the outside among the plurality of levels of gamma voltages supplied from the gamma voltage generator 140.

The timing controller 130 reprocesses the red, green, and blue image data received from the outside, changes the data format to match the liquid crystal panel 100, and outputs the data to the source driver 120. The gate control signal for controlling the driving timing of the gate driver 110 and the driving timing of the source driver 120 are controlled using the vertical and horizontal synchronization signals Vsync and Hsync and the clock CLK. Generates a data control signal.

The gate control signal includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable signal (GOE), and the like.

The data control signal includes a source start pulse (SSP), a source shift clock (SSC), a source output enable (SOE), a polarity signal (POL) .

The gamma voltage generator 140 generates gamma voltages required for digital / analog conversion of the source driver 120 for each gray level within the gray scale range and supplies the gamma voltages to the source driver 120.

The backlight assembly 150 includes a plurality of lamps such as a cold cathode fluorescent lamp or an external electrode fluorescent lamp to supply light to the liquid crystal panel 100.

The inverter 160 converts the DC power input from the outside into an AC power having a predetermined frequency and voltage level suitable for the lamp of the backlight assembly 150 to drive the lamp.

FIG. 2 is a detailed block diagram illustrating a source driver integrated circuit constituting the source driver of FIG. 1.

The source driver 120 includes a plurality of source driver integrated circuits 220. Each source driver integrated circuit 220 latches the red, green, and blue image data sequentially received in accordance with the main clock signal supplied from the timing controller unit 130, selects a gamma voltage suitable for the image data, and sequentially points The timing system of the scheme is changed to a line sequential scheme to output the selected gamma voltage to the data lines DL1, DL2,..., DLm of the liquid crystal panel 100.

Referring to FIG. 2, the source driver integrated circuit 220 may include a shift register 221, a data register 222, a data latch 223, and a digital-analog converter. -Analog Converter 224, Output Buffer 225.

The shift register 221 receives the start pulse signal SPin and the clock signal CLK from the timing controller 130, and shifts the new start pulse signal SPout to the next stage in accordance with the input clock signal CLK. Output to register. At this time, the start pulse signal SPin is a signal synchronized with the image data RGB data.

The data register 222 receives the temporarily stored image data and samples and stores the image data transmitted in time division by the output signal of each stage of the shift register 221. At this time, the temporarily stored image data is a digital signal of 8 bits each of R, G, and B.

The image data sampled by the data register 222 is stored in the data latch 223, and when image data of one horizontal period is input to the data latch 223, the latch signal LS input from the timing controller unit 130. The latch is lowered by. At this time, the data latch 223 holds the image data of one horizontal period already input until new image data is input from the data register 222, and the shift register 221 during the time that the data holding is performed. ) And the data register 222 are inputted with image data of a new one horizontal period.

Image data output from the data latch 223 is input to the digital-analog converter 224. The digital-to-analog converter 224 converts image data, which is a digital signal, into an analog signal using the plurality of levels of gamma voltages VGMAs generated by the gamma voltage generator 140, and outputs the analog data to the liquid crystal panel 100. do.

The output buffer 225 stores analog signals output from the digital-to-analog converter 224 and, when the load signal LD is applied, data lines electrically connected to the source driver integrated circuit 220 when the load signal LD is applied. (DL1, DL2, ..., DLm).

The output buffer 225 is configured using an operational amplifier (OPAMP), and improves the current driving force of the analog signal output from the digital-to-analog converter 224, and at the same time pixel by frame or by the polarity control signal (POL) Inverts the data polarity of each line and outputs it. In this case, the inversion of the data polarity by the polarity control signal POL may be performed by the digital-analog converter 224.

The source driver integrated circuit 220 outputs a gamma voltage corresponding to image data to the data lines DL1, DL2,..., DLm of the liquid crystal panel 100 through this configuration, and outputs the input N-bit. An N-bit digital-analog converter 224 is provided to obtain a gamma voltage (analog signal) to be applied to each pixel from the image data (digital signal).

3 is a graph illustrating gamma characteristics of the source driver integrated circuit of FIG. 2, illustrating a gamma curve indicating a relationship between the image data on the input side and the gamma voltage on the output side.

In the liquid crystal display device, the entire gradation range that can be represented by the red, green, and blue image data as digital signals is set, and each gradation step within the entire gradation range is determined by the gamma voltage. The gamma voltage is set in consideration of the algebraic feeling of the stimulus value according to the visual perception characteristic when a person sees an image.

When the brightness corresponding to each gray level, that is, the light transmittance is T and the gray level is G, the relationship between each gray level and its brightness is expressed as in Equation (1).

T = kG ^γ

Here, k is a proportional constant, and gamma (Gamma) is a constant greater than 1, and is determined within a certain range so that the real and the screen feel fit. γ (for example, about 2.2) is determined so that an optimum viewing angle and luminance can be obtained in the liquid crystal display device in consideration of liquid crystal characteristics and visual perception characteristics of a person.

The liquid crystal display includes a gamma voltage generator configured to set a plurality of gray scale steps by dividing the entire gray scale range between the gamma high voltage V _UH and the gamma low voltage V _LH into a predetermined number (eg, 1024) steps. 140.

The gamma voltage generator 140 generates gamma voltages VGMAs corresponding to the plurality of grayscale levels and supplies them to the source driver integrated circuit 220. The gamma voltage generator 140 connects a plurality of gamma resistors in series between the gamma high voltage V _UH and the gamma low voltage V _LH , and uses the gamma resistors to supply two voltages V _UH and V _LH . By dividing the voltage in between, it produces several intermediate levels of gamma voltages (VGMAs), including the black and white levels.

The source driver IC 220 selects a gamma voltage corresponding to the input image data among the gamma voltages VGMAs according to the gamma curve, and supplies the gamma voltage to the data lines DL1, DL2,..., DLm.

When there are two gamma voltages (eg, V _MIDU , V _MIDL ) applied to the liquid crystal panel 100, the difference between the two gamma voltages (eg, V _MIDU , V _MIDL ) and the common voltage V _COM is If they are the same, the same color appears. For example, when the common voltage V _COM is 5V, the color of the liquid crystal that appears when the gamma voltage is 7V and when 3V is the same.

Gamma curves appear symmetrically with respect to the common voltage (V _COM ).

The Y-axis on the output side represents gamma voltages within the entire gradation range generated by the gamma voltage generator 140. Gamma voltages higher than the common voltage V _COM belong to V _UL to V _UH , and gamma voltages lower than the common voltage V _COM belong to V _LL to V _LH .

The X-axis on the input side represents red, green, and blue codes of the image data and is displayed in hexadecimal. 000 means that light is not transmitted and shows black, and 3FF means all light is transmitted and shows white.

delete

FIG. 4 is a detailed configuration diagram of a digital-analog converter constituting the source driver integrated circuit of FIG. 2.

The digital-analog converter 224 in the source driver integrated circuit 220 includes image data D [10-1] output from the data latch 223 and gamma voltages of a plurality of levels generated by the gamma voltage generator 140. (VGMAs, Gamma 0 to Gamma 1024) is received, and image data, which is a digital signal, is converted into a gamma voltage, which is an analog signal, according to a gamma curve.

Referring to FIG. 4, the digital-analog converter 224 in the source driver integrated circuit 220 may include a linear converter 224_2 and a nonlinear converter 224_1.

The digital-to-analog converter 224 receives N bits (10 bits in FIG. 4) of the digital signal D [10-1], and a linear and gamma voltage corresponding to the received digital signal forms a full gray scale range. Which of the non-linear gradation ranges is included or not, and in each case, digital-to-analog conversion is performed through the linear converter 224_2 and the nonlinear converter 224_1.

Taking the gamma curve of FIG. 3 as an example, gamma voltages in the lower gray scale range from image data 000 to 0FF show a nonlinear curve, and gamma voltages in the middle gray scale range from image data 0FF to 2FF are relatively linear straight lines. Shows the form of. Gamma voltages in the upper gradation range from the image data 2FF to 3FF again show a nonlinear curve shape.

In this case, the linear gradation range is an intermediate gradation range expressed in a linear form among the entire gradation ranges of the Gamma Curve. The non-linear gradation ranges are upper and lower gradation ranges expressed in the form of non-linear curves among the entire gradation ranges of the gamma curve.

When N is 10 and the digital signal input to the source driver integrated circuit 220 is 10 bits, the gamma voltage generator 140 is connected in series between the gamma high voltage V _UH and the gamma low voltage V _LH . 2 ^N gamma voltages (VGMAs, Gamma 0 to Gamma 1023) are generated and applied to the source driver integrated circuit 220 through the plurality of connected gamma resistors.

The nonlinear converter 224_1 converts the digital signal into an analog signal when the gamma voltage corresponding to the input digital signal D [10-1] is within the nonlinear gray scale range.

That is, the nonlinear converter 224_1 receives the gamma voltages (eg, Gamma 1023 to Gamma 1021 and Gamma 2 to Gamma 0) within the upper and lower gray scale ranges on the gamma curve, and inputs 10-bit image data. Outputs one gamma voltage.

The image data is input to the digital-analog converter 224 by dividing the non-inverted value and the inverted value through the inverter 226.

As the nonlinear converter 224_1, a resistor-string digital-analog converter may be used. A resistive string digital analog converter is an N-bit decoder and includes 2 ^N switch arrays having ^N switches.

The nonlinear converter 224_1 receives all 2 ^N gamma voltages and selects one gamma voltage (analog signal) to process N bits of image data (digital signal).

Therefore, accurate gamma voltage output is possible, but when the non-linear converter 224_1 is used for the entire gradation range when processing image data of 10 bits or more, the area of the source driver integrated circuit 220 becomes too large and power consumption is consumed. Will increase.

That is, in the digital-to-analog conversion operation, when the nonlinear converter 224_1 is used for the entire gradation range, the number of processed bits is increased because the number of resistance strings constituting the nonlinear converter 224_1 increases significantly with the number of bits. As it increases, the area becomes larger and power consumption increases.

To solve this problem, the linear converter 224_2 is applied in the linear gray scale range.

The linear transform unit 224_2 includes a second transform unit 224_4 as the first transform unit 224_3.

The first converter 224_3 converts the upper M bits of the digital signal into an analog signal when the gamma voltage corresponding to the input N-bit digital signal D [10-1] falls within the linear gray scale range.

A resistor-string digital-analog converter may be used as the first converter 224_3.

The second converter 224_4 converts the lower (N-M) bit of the digital signal into an analog signal when the gamma voltage corresponding to the input digital signal D [10-1] falls within a linear gray scale range. Here, N and M are natural numbers and satisfy N> M.

For example, when N is 10 and the image data is 10 bits, the first converter 224_3 performs decoding on the upper 8 bits of the 10-bit image data D [10-1], The second converter decodes the lower two bits of the image data D [10-1].

The first converter 224_3 selects one of the intermediate gray scale ranges (for example, Gamma 500 to Gamma 516) (for example, Gamma 504) to generate two gamma voltages RV1 and RV2 corresponding thereto. Suppose

Then, the second converter 224_4 receives the two gamma voltages RV1 and RV2 from the first converter 224_3 and according to the lower two bits of the image data, a gamma voltage of four gray levels between RV1 and RV2 (eg, For example, one of Gamma 504 to Gamma 507 is selected.

As the second converter 224_4, a hybrid digital-analog converter may be used, and the hybrid digital analog converter may be configured by a combination of a resistor string decoder and a capacitor decoder.

The hybrid digital-to-analog converter receives one gamma voltage in each of the four gray levels on the gamma curve and applies a single gamma voltage RV1 and the gamma voltage higher than the gamma voltage according to the input 10-bit image data. Four levels of gamma voltage are output using RV2.

Hybrid type digital-to-analog converters use fewer switches compared to resistive thermal structures, reducing area and power consumption.

The gamma voltage output from the linear converter 224_2 or the nonlinear converter 224_1 is applied to a data line connected to the output channel Output through an operational amplifier OP AMP constituting the output buffer 225.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, You will understand.

Therefore, it should be understood that the above-described embodiments are provided so that those skilled in the art can fully understand the scope of the present invention. Therefore, it should be understood that the embodiments are to be considered in all respects as illustrative and not restrictive, The invention is only defined by the scope of the claims.

The source driver integrated circuit according to the present invention and the liquid crystal display having the same according to the present invention have the effect of reducing the area increase rate according to the increase in the number of bits, and thus can be efficiently applied to a high resolution model.

In addition, the source driver integrated circuit and the liquid crystal display having the same according to the present invention can reduce the manufacturing cost by reducing the area.

Claims (13)

When the gray level of the input N-bit digital signal belongs to the linear gray level section of the gamma curve, a first converter converting the upper M bits of the digital signal into an analog signal, and the lower (NM) of the digital signal. A linear converter including a second converter for converting a bit into an analog signal; And A non-linear converter converting the digital signal into an analog signal when the gray level of the N-bit digital signal belongs to a nonlinear gray level section of the gamma curve, The first converter decodes the upper M bits and outputs two voltages among the gamma reference voltages of the linear grayscale interval. And the second converting unit decodes the lower (N-M) bit to select one of the voltages between the two voltages. The method according to claim 1, The first converter, A source driver integrated circuit for a liquid crystal display, characterized in that it is a resistor-string digital-analog converter. The method according to claim 1, Wherein the second conversion unit comprises: A source driver integrated circuit for a liquid crystal display, characterized in that it is a hybrid digital-analog converter. The method according to claim 1, The nonlinear conversion unit, A source driver integrated circuit for a liquid crystal display, characterized in that it is a resistor-string digital-analog converter. The method according to claim 1, The linear gradation section is, And a gray scale range of the gamma curve. The method according to claim 1, The non-linear gradation section, And an upper and lower gray scale range of the gamma curve. A liquid crystal panel in which a plurality of pixels are arranged in a matrix form; A gate driver supplying a scan signal to the liquid crystal panel; A source driver converting an input N-bit digital signal into an analog signal and outputting the analog signal to the liquid crystal panel; And A timing controller configured to control driving timing of the gate driver and the source driver; The source driver, A first converter converting the upper M bits of the digital signal into an analog signal when the gray level of the N-bit digital signal belongs to a linear gray level section of a gamma curve, and a lower (NM) of the digital signal A linear converter including a second converter for converting a bit into an analog signal; And A non-linear converter converting the digital signal into an analog signal when the gray level of the N-bit digital signal belongs to a nonlinear gray level section of the gamma curve, The first converter decodes the upper M bits and outputs two voltages among the gamma reference voltages of the linear grayscale interval. And the second converter decodes the lower (N-M) bit to select one of the voltages between the two voltages. delete 8. The method of claim 7, The first converter, A liquid crystal display device, characterized in that it is a resistor-string digital-analog converter. 8. The method of claim 7, Wherein the second conversion unit comprises: A liquid crystal display device characterized in that it is a hybrid digital-analog converter. 8. The method of claim 7, The nonlinear conversion unit, A liquid crystal display device, characterized in that it is a resistor-string digital-analog converter. 8. The method of claim 7, The linear gradation section is, And a gray scale range of the gamma curve. 8. The method of claim 7, The non-linear gradation section, And an upper and lower gray scale range of the gamma curve.

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