KR101364718B1 - Light emitting device and method for manufacturing thereof - Google Patents

Abstract

The present invention relates to a light emitting device, in particular, a nitride semiconductor light emitting device and a method of manufacturing the same. The light emitting device according to the present invention includes a substrate on which at least one via hole is formed, a buffer layer formed by selectively growing a buffer material corresponding to the via hole on a first surface of the substrate, a first semiconductor layer formed on the buffer layer, and a first layer An active layer formed on the semiconductor layer, a second semiconductor layer formed on the active layer, a first electrode filled in the via hole, and formed on the second surface of the substrate, and a second electrode formed on the second semiconductor layer It includes.

Sapphire, Light, Via Hole, Nitride, Vertical Structure

Description

Light emitting device and method for manufacturing the same

1A is a cross-sectional view schematically showing the structure of a conventional light emitting diode.

1B is a top view of the light emitting diode shown in FIG. 1A.

2A to 2C are views for schematically illustrating a process of growing GaN crystals on a sapphire substrate by a conventional ELO.

3 is a view schematically illustrating a process of forming a via hole in a substrate used in a semiconductor light emitting device according to a preferred embodiment of the present invention.

Figure 4a is a schematic view showing a state chamfered the upper portion of the via hole formed in the sapphire substrate according to a preferred embodiment of the present invention.

4B is a top view of portion B of FIG. 4A.

5A to 5C are cross-sectional views schematically illustrating a process of growing a low potential density buffer layer that is an initial buffer layer according to a preferred embodiment of the present invention.

6A to 6B are schematic cross-sectional views of a low potential nitride layer and a light emitting diode layer based thereon according to a preferred embodiment of the present invention.

7 is a cross-sectional view schematically showing a state in which a low dislocation density buffer layer is removed according to a preferred embodiment of the present invention.

8 is a cross-sectional view schematically showing a state in which a p-type electrode and a pad are further formed according to a preferred embodiment of the present invention.

9 is a cross-sectional view schematically showing a state in which a metal is deposited on an exposed n-type semiconductor layer according to a preferred embodiment of the present invention.

10 is a schematic cross-sectional view showing a state in which a metal is filled in a via hole according to an exemplary embodiment of the present invention.

11 is a schematic cross-sectional view of a light emitting device in which a conventional light emitting device is packaged.

12 is a schematic cross-sectional view of a light emitting device packaged with a light emitting device according to the present invention;

The present invention relates to a light emitting device, in particular, a nitride semiconductor light emitting device and a method of manufacturing the same.

2. Description of the Related Art Semiconductor light emitting devices such as light emitting diodes (LEDs) have a long lifespan and low power consumption, and are widely used not only in the fields of electricity and electronics, but also in advertising. Attempts have recently been made to use LEDs as, for example, backlight units of liquid crystal displays. In addition, LED is expected to be widely used in everyday life as indoor lighting in the future.

As shown in FIG. 1A, a conventional LED basically grows an n-type semiconductor layer 103, an active layer 107, and a p-type semiconductor layer 109 on a sapphire substrate 101 in turn, while a p-type semiconductor layer ( The n-type electrode 105 is formed on the p-type electrode 111, the p-type pad 113, and the n-type semiconductor layer 103 on the 109, and the active layer 107 is formed by recombination of holes and electrons injected from the semiconductor layer. When light is generated, the light is emitted from the transparent electrode 111 made of Ni / Au or ITO mainly on the p-type semiconductor layer 109 and the LED chip side / bottom.

FIG. 1B is a diagram schematically illustrating a top surface of the LED illustrated in FIG. 1A. As shown in FIG. 1B, an upper surface of the LED includes a p-type electrode region including a p-type electrode 111 and a bonding pad 113, and an n including an n-type semiconductor layer 103 and an n-type electrode 105. It is divided into a type | mold electrode area | region (part A comprised by the area of axa '). In generating light in the active layer 107 by recombination of holes and electrons injected from the p-type semiconductor layer and the n-type semiconductor layer, the n-type electrode formation region (part A) on the substrate is removed from the active layer. Therefore, light cannot be generated in this region. That is, due to the n-type electrode formation region (part A) existing on the substrate of the LED, the effective light emitting area by a × a 'described in FIG. 1B is reduced. Accordingly, in the conventional light emitting device as shown in FIGS. 1A and 1B, the luminous efficiency is inevitably lowered than in the case where only the p-type electrode region is present on the substrate.

In addition, in the case of a light emitting diode having a structure as schematically shown in FIGS. 1A and 1B, the difference in current conductivity between the n-type semiconductor layer 103 and the p-type semiconductor 109 including the p-type electrode 111 is determined. This causes local current crowding, which causes poor light emitting performance of the light emitting diode due to uneven light emitting region, and shortens the lifetime of the light emitting diode.

In addition, in the case of a light emitting diode having a structure as schematically shown in FIGS. 1A and 1B, particularly in the case of using sapphire as the substrate 101, a problem of heat dissipation arises. That is, the sapphire substrate, which is an insulating layer, does not effectively dissipate heat generated in the semiconductor layer due to the injection of current, thereby shortening the lifespan of the light emitting diode or reducing the performance.

In the semiconductor stack of light emitting diodes as schematically shown in FIGS. 1A and 1B, the substrate is determined according to the type of semiconductor layer to be grown. The reason is that when the lattice constant of the substrate and the lattice constant of the semiconductor layer are greatly different, crystal defects are generated due to the difference in the lattice constant, and the crystal defects provide a non-luminous recombination level that dissipates the generated light, thereby providing high efficiency light. It will limit the output. Therefore, AlGaP, GaP / AIP heterojunction structures on GaP substrates, and GaAs, GaAlAs, InGaP are mainly epitaxially grown on InP, InGaAs, and GaAs substrates.

In the case of GaN, it is common to use sapphire similar to the lattice constant of GaN as the substrate. However, since the lattice constants of the two are not the same, there is a limit that crystal defects inevitably occur. In order to overcome this limitation, a method of stacking GaN or AlN on a sapphire substrate to form a buffer layer, and then growing the GaN layer is mainly used. However, when using this method, lattice mismatch exists between the substrate and the upper crystal growth layer, so that a large amount of dislocation is included in the crystal grown film.

Epitaxial Lateral Overgrowth (ELO) is used to overcome these problems. ELO reduces the stress caused by the lattice constant difference and thermal expansion coefficient difference between the sapphire substrate and the GaN crystal by using the SiO ₂ mask in the form of stripe, so that a good quality crystal can be obtained, but the process is complicated. Have A process of growing GaN crystals on a sapphire substrate by a conventional ELO will be described with reference to FIGS. 2A to 2C.

Referring to FIG. 2a to FIG. 2c, the sapphire substrate 101 on the SiO ₂ thin film was deposited to a predetermined thickness on the GaN buffer layer 200 is grown through a separate process, a stripe shape by etching of SiO ₂ A pattern 201 is formed (see, in particular, FIG. 2A in perspective view and FIG. 2B in front view). After this, SiO ₂ GaN is grown on the pattern 201 in a single crystal. In this case, initially SiO ₂ GaN single crystal 203 growth proceeds only between stripes and SiO ₂ Selective growth is performed in which the GaN single crystal is not grown on the stripe. SiO ₂ If the growth conditions are adjusted so that the crystals grown between the stripes grow in the horizontal direction, the GaN single crystal 203 grows laterally to form SiO _2. You will meet each other in the middle of the stripe. SiO ₂ Since the GaN single crystal 203 grown on the stripe hardly reacts with SiO ₂ , crystal growth occurs in a stress-free state, whereby a high quality GaN single crystal 203 having very low defect density is grown. SiO ₂ There is a gap or crack in the determination of the portion encountered in the middle portion of the upper stripe. In this state, when single crystal growth proceeds, the crystal growth proceeds in the vertical direction to form a thick crystal. When the thickness of the crystal becomes several micrometers to several hundred micrometers or more, the gap or crack disappears and dislocations form a loop with each other. Since dislocations do not propagate in the vertical direction, the dislocation density decreases as the thickness increases, thereby improving the quality of the crystal.

The conventional ELO method is to grow a buffer layer, SiO ₂ Forming a thin film, SiO ₂ Since the step of forming the pattern and the step of growing the GaN layer is implemented, the crystal growth process is not only very complicated, but also requires a huge cost or time.

An object of the present invention is to provide a light emitting device capable of maximizing a light emitting effective area and a method of manufacturing the same.

Another object of the present invention is to provide a light emitting device that does not generate local current crowding and a method of manufacturing the same.

Still another object of the present invention is to provide a light emitting device and a method of manufacturing the same, which can effectively emit heat accompanying light generation.

It is still another object of the present invention to provide a light emitting device capable of reducing the dislocation density as in the conventional ELO method while the process is simple, and a method of manufacturing the same.

Still another object of the present invention is to provide a light emitting device capable of reducing contact resistance in an n-type electrode and a method of manufacturing the same.

Still another object of the present invention is to provide a light emitting device, a method of manufacturing the same, and a packaging method, which can omit some of the wire bonding processes in the packaging process.

In order to achieve the above object, according to an aspect of the present invention, a substrate having at least one via hole, a buffer layer formed by selectively growing a buffer material corresponding to the via hole on the first surface of the substrate, A first semiconductor layer formed on the buffer layer, an active layer formed on the first semiconductor layer, a second semiconductor layer formed on the active layer, and a first metal filled in the via hole are formed on the second surface of the substrate. A light emitting device including a first electrode to be formed and a second electrode formed on the second semiconductor layer may be provided.

In a preferred embodiment, after the buffer layer exposed by the via hole is removed, the first metal is filled while being in contact with the first semiconductor layer. In addition, the substrate is sapphire, the buffer material is any one of undoped-GaN (hereinafter referred to as un-GaN) and AlN, the first semiconductor layer is an n-type GaN-based semiconductor, the second semiconductor layer is a p-type A GaN-based semiconductor, wherein the first electrode is an n-type electrode, and the second electrode is a p-type electrode. In addition, the chamfer is formed in the inlet of the via hole corresponding to the first surface of the substrate. In addition, the first metal is characterized in that the one selected from Ti, Al, Ag, Ta, W, Cu, Cr, Pt, Ir, TiN, TaN material and a combination thereof. In addition, a second metal is deposited on a bottom surface of the first semiconductor layer exposed by the via hole, and the first metal is filled after the second metal is deposited. In addition, the second metal is characterized in that the Ti, Al and combinations thereof. In addition, the second metal is characterized in that the heat treatment after deposition. In order to smoothly perform device-to-device scrambling, the first metal and the second metal are not filled but have an unfilled region in the inter-element boundary region.

According to another aspect of the invention, providing a substrate, forming at least one via hole in the substrate, selectively growing a buffer material corresponding to the via hole on the first surface of the substrate to form a buffer layer Forming a first semiconductor layer on the buffer layer, forming an active layer on the first semiconductor layer, forming a second semiconductor layer on the active layer, and forming a second semiconductor layer on the second surface of the substrate. A method of manufacturing a light emitting device may be provided by filling a via hole with a first metal to form a first electrode on a second surface of the substrate, and forming a second electrode on the second semiconductor layer. .

In a preferred embodiment, the method further comprises exposing the first semiconductor layer by removing the buffer layer exposed by the via hole on the second side of the substrate before filling the first metal. can do. In addition, the substrate is sapphire, the buffer material is any one of un-GaN and AlN, the first semiconductor layer is an n-type GaN-based semiconductor, the second semiconductor layer is a p-type GaN-based semiconductor, the first The electrode is an n-type electrode, and the second electrode is a p-type electrode. The method may further include forming a chamfer at an inlet of the via hole corresponding to the first surface of the substrate after forming at least one via hole in the substrate. In addition, the first metal is characterized in that the one selected from Ti, Al, Ag, Ta, W, Cu, Cr, Pt, Ir, TiN, TaN material and a combination thereof. The method may further include depositing a second metal on a bottom surface of the second semiconductor layer exposed by the via hole after exposing the first semiconductor layer, wherein the first metal is the second metal. The metal is deposited and then filled. The second metal is characterized in that the Ti, Al and combinations thereof. In addition, the second metal may be subjected to a heat treatment after deposition. In order to smoothly perform inter-device separation, the first metal and the second metal may not be filled and have an unfilled region at the boundary region between the devices. It is done.

According to still another aspect of the present invention, in a light emitting device for packaging a light emitting element, the light emitting element, a first electrode lead frame having one end of a cup-shaped member, a second electrode lead frame, and a bottom surface of the light emitting element may be formed in the cup shape. Conductive paste adhering to the member, wherein the first electrode of the light emitting element is electrically connected to the first electrode lead frame, wherein the second electrode of the light emitting element is electrically connected to the second electrode lead frame A light emitting device including a wire and a molding member for protecting at least the light emitting device can be provided.

According to another aspect of the invention, in the method of packaging a light emitting device, the step of adhering the bottom surface of the light emitting device with a conductive paste to a cup-shaped member formed on one end of the first electrode lead frame-wherein, The first electrode is electrically connected to the first electrode lead frame, wire bonding such that the second electrode of the light emitting device is electrically connected to a second electrode lead frame and molding at least to protect the light emitting device It is possible to provide a light emitting device packaging method comprising molding the member.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings.

3 is a view schematically illustrating a process of forming a via hole in a substrate used in a semiconductor light emitting device according to a preferred embodiment of the present invention. The substrate of the present invention is assumed to be a sapphire substrate.

Referring to FIG. 3, after the sapphire substrate 301 is prepared, the vias may pass through the top and bottom surfaces of the sapphire substrate 301 by wet etching, dry etching, ion milling, or the like. The hole 303 may be formed. The via hole 303 may be one, but preferably a plurality of via holes 303. Since the wet etching method or the dry etching method for the sapphire substrate 301 itself is well known, a detailed description thereof will be omitted. The via hole 303 formed in the sapphire substrate 301 is then filled with metal, and the filled metal is directly connected to the n-type semiconductor layer to become an n-type electrode. Therefore, since only the p-type electrode region exists without the n-type electrode region on the sapphire substrate 301, the light emitting effective area can be maximized.

In addition, only a p-type electrode region exists on the sapphire substrate 301, and an n-type electrode region connected to the n-type semiconductor layer through a metal filled in the via hole 303 under the sapphire substrate 301 is p. Since there is a large number in the lower portion of the type electrode, the current concentration problem does not occur, and heat accompanying the light generated in the active layer may be effectively emitted to the outside through the metal filled in the via hole 303. As a result, not only the light emitting performance of the light emitting device is improved, but also the service life is greatly increased.

In addition, in the upper surface of the sapphire substrate separated by the via hole 303 formed in the sapphire substrate 301, the initial buffer layer un-GaN or AlN is laterally oriented in a similar manner to the conventional epitaxial lateral overgrowth (ELO). It is possible to grow dislocation density can be reduced, thereby growing a good quality GaN crystals. This will be described in detail with reference to FIGS. 5A to 5B.

In another preferred embodiment of the present invention, after the sapphire substrate 301 is provided, the upper and lower surfaces do not penetrate from the upper surface of the sapphire substrate 301 by wet etching, dry etching, or ion milling, and have a predetermined height (d = about). 100m) may be etched to form the recess 303 '. The second surface of the sapphire substrate 301 is ground in order to separate the manufactured light emitting device. At this time, a part of the lower surface of the sapphire substrate 301 is removed by grinding, resulting in the same sapphire substrate 301 as in the previous embodiment. Via holes penetrating the upper and lower surfaces are formed. By etching only the predetermined height of the sapphire substrate 301 as in the present embodiment, an effect of shortening the etching process time is expected.

FIG. 4A is a view schematically illustrating a chamfered top of a via hole formed in a sapphire substrate according to a preferred embodiment of the present invention, and FIG. 4B is a top view of part B of FIG. 4A.

4A and 4B, as described with reference to FIG. 3, the via hole 303 is formed in the entire sapphire substrate 309, and the remaining part corresponds to the sapphire portion 301 in which the via hole is not formed. In the state where the via hole 303 is formed, the chamfer 305 is formed by chamfering 305 the top of the via hole 303, that is, the inlet of the via hole 303 on which the GaN layer is grown. The chamfer B may be filled with metal in the future to increase the area in contact with the n-type semiconductor layer, thereby reducing contact resistance. The chamfering process described with reference to FIGS. 4A and 4B is optional, and for convenience of description, chamfering is not described below.

5A through 5C are cross-sectional views schematically illustrating a process of growing a low potential density buffer layer that is an initial buffer layer according to an exemplary embodiment of the present invention.

5A through 5C, the light emitting device manufacturing method according to the present invention grows un-GaN or AlN similarly to the conventional selective growth method (Epitaxial Lateral Overgrowth (ELO)). Conventional ELO reduces the stress caused by the lattice constant difference and the coefficient of thermal expansion between the sapphire substrate and the GaN crystal using a stripe SiO ₂ mask, but the light emitting device manufacturing method according to the present invention is a stripe type SiO Instead of the _two masks, un-GaN or AlN is grown on the sapphire substrate itself having at least one via hole 303 formed in the sapphire substrate 301 as shown in FIG. 3. In the method of manufacturing a light emitting device according to the present invention, a buffer layer 307 is formed by growing un-GaN or AlN laterally on a sapphire substrate 301 having at least one via hole 303.

Referring to the process of forming the buffer layer 307 in more detail, first, an un-GaN or AlN layer is grown on the sapphire substrate 301 on which at least one via hole 303 is formed. In this case, initially, the growth of the un-GaN or AlN layer proceeds in the portion where the via hole 303 is not formed in the sapphire substrate 301. Thereafter, the grown un-GaN or AlN layer is grown not only in the vertical direction but also in the horizontal direction, and adjacent un-GaN or AlN layers meet each other in the middle portion on the via hole 303. A gap or crack exists in the determination of the portion encountered in the middle portion above the via hole 303. The initial buffer layer formed at this time has a dislocation (threading dislocation) in the horizontal direction, and the nitride layer further grown on the basis of this becomes a high quality thin film having a low dislocation density.

In the light emitting device manufacturing method according to the present invention, unlike the conventional ELO method, which has a very complicated process, a low potential is obtained by growing un-GaN or AlN without the need for a separate process added to the sapphire substrate 301 on which the via hole 303 is formed. Since the density buffer layer 307 can be formed, not only the crystal growth process is greatly reduced, but also the cost and time required for this can be drastically reduced.

6 is a schematic cross-sectional view of a low potential nitride layer and a nitride light emitting diode layer based thereon according to a preferred embodiment of the present invention. As described above, the low dislocation density buffer layer 307 can be formed by growing un-GaN or AlN laterally on the sapphire substrate 301 having at least one via hole 303, and the conventional method described in FIG. Compared with the nitride layer grown by the ELO method, the via hole 303 of the present embodiment had SiO ₂ in the ELO method. Lateral growth of the un-GaN or AlN layer as on the pattern 201 results in a high quality thin film with low dislocation density. An n-type semiconductor layer 309, an active layer 311 serving as a light emitting region, and a p-type semiconductor layer 313 are grown on the laterally grown low potential nitride layer 307. Since the method for growing each layer is known, a detailed description thereof will be omitted.

7 is a cross-sectional view schematically illustrating a state in which a low dislocation density buffer layer is removed through a via hole according to a preferred embodiment of the present invention, and FIG. 8 illustrates a state in which a p-type electrode and a pad electrode are further formed according to a preferred embodiment of the present invention. A schematic cross-sectional view.

Referring to FIGS. 7 and 8, the epitaxially grown upper part is protected by a photoresist or an insulating film (SiN or SiO ₂ film), and wet etching is performed by dry etching without wet etching or a separate protective film. The n-type semiconductor layer 309 is opened by removing the low dislocation density buffer layer 307 exposed by the via hole 303. Thereafter, after removing the photoresist or the insulating film for protecting the epi layer, the p-type electrode 317 and the bonding pad 319 are formed on the p-type semiconductor layer 313. In another embodiment of the present invention, the low dislocation density buffer layer may not be removed, and subsequent processes may be performed.

9 is a cross-sectional view schematically showing a state in which a metal is deposited on an exposed n-type semiconductor layer according to a preferred embodiment of the present invention, and FIG. 10 is a schematic view showing a metal-filled via hole according to a preferred embodiment of the present invention. It is sectional drawing shown.

9 and 10, as described above, the second metal 316, in particular the Ti / Al layer, is formed on the n-type semiconductor layer 309 exposed through the via hole 303 by removing the low dislocation density buffer layer. Vapor deposition and heat treatment. In another embodiment of the present invention, a metal, in particular, a Ti / Al layer may be deposited and heat-treated through the via hole 303 in a state where the low dislocation density buffer layer is not removed. A second metal (especially Ti / Al layer) deposition process is performed to more surely reduce the contact resistance with the n-type semiconductor layer 309. The deposition of the second metal (particularly the Ti / Al layer) is performed before the first metal filling process, and is performed using a thin film forming apparatus such as E-BEAM, sputter, or CVD. Heat treatment is performed to effectively reduce the contact resistance. The deposition process of the second metal 316 according to the present invention is optional. Thereafter, at least one via hole 303 formed in the sapphire substrate 301 is formed of Ti, Al, Ag, Ta, W, Cu, Cr, Pt, Ir, TiN, TaN material, and a combination thereof. One of the selected ones is filled, and the first metal layers filled in the via holes are connected to each other on the bottom surface of the sapphire substrate to complete the n-type electrode 315. E-BEAM, sputtering, CVD, or plating may be used for the connection between the filled first metals on the lower surface of the sapphire substrate. In addition, in order to smoothly perform device-to-device scrambling, an area where metal is not filled may be provided in an inter-device boundary region.

 Since the metal 315 filled in the via hole 303 becomes an n-type electrode, only a p-type electrode region exists on the sapphire substrate 301, thereby maximizing the light emitting effective area. In addition, there is a localized current concentration problem because there is an n-type electrode region connected to the n-type semiconductor layer through the metal 315 filled in the plurality of via holes 303 under the p-layer semiconductor layer on which the p-type electrode is formed. Is not generated, and heat generated by the injected current can be effectively released to the outside through the metal 315 filled in the via hole 303.

According to the present invention, the metal filled in the via hole 303 is preferably filled to almost cover the lower front surface of the sapphire substrate 301. In order to smoothly perform device-to-device scrambling, it is preferable to provide an area in which the metal is not filled in the device-to-device boundary region. Before the metal filling process according to the present invention, a process of removing a portion by grinding the sapphire substrate 301 for efficient separation of the light emitting device may be added. Since the metal deposition process and the metal filling process itself employed in the present invention are well known, further description thereof will be omitted.

Hereinafter, a packaging process of a conventional light emitting device and a packaging process for the light emitting device according to the present invention will be described with reference to FIGS. 11 and 12.

11 is a schematic cross-sectional view of a light emitting device in which a conventional light emitting device is packaged. Referring to FIG. 11, a conventional light emitting device includes a cathode lead frame 407, a cathode lead frame 405, a conventional light emitting device 401, and a molding member 409 for protecting a conventional light emitting device 401. Include. Also, the cathode lead frame 405 is cup-shaped so that the light emitting element 401 can be accommodated, and the bottom of the light emitting element 401 is a cup of the cathode lead frame 405 by silver paste 411. -It is adhered to the top of the shape surface. In addition, the n-type electrode of the light emitting device 401 is electrically connected by the cathode lead frame 405 and the first wire 403, and the p-type pad is connected to the anode lead frame 407 and the second wire 403 ′. Are electrically connected.

12 is a schematic cross-sectional view of a light emitting device in which a light emitting device is packaged according to the present invention. Referring to FIG. 12, a light emitting device according to the present invention includes a cathode lead frame 507, a cathode lead frame 505, a light emitting device 501 according to the present invention, and a light emitting device 501 according to the present invention. And a molding member 509. Since the light emitting device 501 according to the present invention is as described above, a detailed description thereof will be omitted in this paragraph. The cathode lead frame 505 is cup-shaped so that the light emitting element 501 can be accommodated, and the bottom of the light emitting element 501 is a cup of the cathode lead frame 505 by silver paste 511. It is glued to the shape upper surface. In addition, the p-type pad of the light emitting device 501 is electrically connected by the anode lead frame 507 and the wire 503 '. As described above, since the metal filled in the at least one via hole formed in the sapphire substrate becomes the n-type electrode of the light emitting device 501 according to the present invention, the light emitting device 401 in the conventional light emitting device as shown in FIG. The first wire 403 for electrically connecting the n-type electrode of) to the negative lead frame 405 may be removed. That is, in the packaging process for the light emitting device according to the present invention, an effect that the wire bonding process can be shortened is expected.

It is needless to say that the present invention is not limited to the above-described embodiment, and many modifications may be made by those skilled in the art within the scope of the present invention.

According to the present invention, it is possible to provide a light emitting device capable of maximizing a light emitting effective area and a method of manufacturing the same.

Further, according to the present invention, it is possible to provide a light emitting device and a method of manufacturing the same, which do not cause a localized current concentration problem.

In addition, according to the present invention, it is possible to provide a light emitting device capable of effectively emitting heat accompanying light generation and a method of manufacturing the same.

According to the present invention, it is possible to provide a light emitting device capable of reducing the dislocation density as in the conventional ELO method while having a simple process, and a method of manufacturing the same.

Further, according to the present invention, it is possible to provide a light emitting device capable of reducing contact resistance in an n-type electrode and a method of manufacturing the same.

According to the present invention, it is possible to provide a light emitting device, a manufacturing method thereof, and a packaging method, which can omit a part of the wire bonding step in the packaging step.

Claims (17)

A substrate on which at least one via hole is formed; A buffer layer formed on the first surface of the substrate by selectively growing a buffer material corresponding to the via hole; A first semiconductor layer formed on the buffer layer; An active layer formed on the first semiconductor layer; A second semiconductor layer formed on the active layer; A first electrode filled with the first metal in the via hole and formed on the second surface of the substrate; And A second electrode formed on the second semiconductor layer; And a chamfer formed at an entrance of the via hole on the first surface. The method of claim 1, And after the buffer layer exposed by the via hole is removed, the first metal is filled. The method of claim 1, The substrate is sapphire, the buffer layer is any one of un-GaN and AlN, the first semiconductor layer is an n-type GaN-based semiconductor, the second semiconductor layer is a p-type GaN-based semiconductor, the first electrode is An n-type electrode, and the second electrode is a p-type electrode, characterized in that the light emitting element. delete The method of claim 1, The first metal is a light emitting device, characterized in that one selected from Ti, Al, Ag, Ta, W, Cu, Cr, Pt, Ir, TiN, TaN material and combinations thereof. The method of claim 1, And a second metal is deposited on a bottom surface of the first semiconductor layer exposed by the via hole, and the first metal is filled after the second metal is deposited. The method according to claim 6, The second metal is a light emitting device, characterized in that the Ti / Al layer. Providing a substrate; Forming at least one via hole in the substrate; Selectively growing a buffer material on the first surface of the substrate corresponding to the via hole to form a buffer layer; Forming a first semiconductor layer on the buffer layer; Forming an active layer on the first semiconductor layer; Forming a second semiconductor layer on the active layer; Filling a first metal in the via hole on the second side of the substrate to form a first electrode on the second side of the substrate; And Forming a second electrode on the second semiconductor layer; 9. The method of claim 8, Before filling the first metal, And removing the buffer layer exposed by the via hole on the second surface of the substrate to expose the first semiconductor layer. 9. The method of claim 8, The substrate is sapphire, the buffer layer is any one of un-GaN and AlN, the first semiconductor layer is an n-type GaN-based semiconductor, the second semiconductor layer is a p-type GaN-based semiconductor, the first electrode is A n-type electrode and a 2nd electrode are p-type electrodes, The manufacturing method of the light emitting element characterized by the above-mentioned. 9. The method of claim 8, After forming at least one via hole in the substrate, forming a chamfer at an inlet of the via hole corresponding to the first surface of the substrate. 9. The method of claim 8, The first metal is Ti, Al, Ag, Ta, W, Cu, Cr, Pt, Ir, TiN, TaN material, and a combination film of the light emitting device manufacturing method characterized in that it is formed of one of them. 9. The method of claim 8, After exposing the first semiconductor layer, further comprising depositing a second metal on a bottom surface of the first semiconductor layer exposed by the via hole, Wherein the first metal is filled after the second metal is deposited. 14. The method of claim 13, The second metal is a light emitting device manufacturing method, characterized in that formed of a Ti / Al layer. The method according to claim 13 or 14, The method of manufacturing a light emitting device, characterized in that it further comprises a post-deposition heat treatment step of the second metal. A light emitting device for packaging the light emitting element of claim 6, The light emitting device; A first electrode lead frame whose one end is a cup-shaped member; A second electrode lead frame; A conductive paste for adhering a bottom surface of the light emitting element to the cup-shaped member, wherein the first electrode of the light emitting element is electrically connected to the first electrode lead frame; A wire electrically connecting the second electrode of the light emitting element to the second electrode lead frame; And And a molding member for protecting at least the light emitting element. In the method for packaging the light emitting device of claim 6, Bonding a bottom surface of the light emitting element with a conductive paste to a cup-shaped member formed at one end of a first electrode lead frame, wherein the first electrode of the light emitting element is electrically connected to the first electrode lead frame; Wire bonding the second electrode of the light emitting device to be electrically connected to a second electrode lead frame; And Molding with a molding member to protect at least the light emitting device.

Images