KR101289789B1 - Apparatus and method for repeatedly fabricating thin film semiconductor substrates using a template - Google Patents

Abstract

A mechanism is disclosed in which semiconductor wafers, in some embodiments silicon, are repeatedly used to serve as substrates and carriers for processing high efficiency thin semiconductor solar cell substrates. Mechanisms are disclosed that enable repetitive use of such substrates with consistent quality and high yield.

Description

Apparatus and method for repetitive processing of thin-film semiconductor substrates using substrates {APPARATUS AND METHOD FOR REPEATEDLY FABRICATING THIN FILM SEMICONDUCTOR SUBSTRATES USING A TEMPLATE}

The present invention relates generally to the field of solar cells, and more particularly to the field of repetitive processing of thin film solar cell substrates from semiconductor substrates.

In the field of optoelectronic devices, the present invention enables low cost processing of thin film substrates, and thus is used in the manufacture of solar cells with substrates that can be used repeatedly, thereby processing the thin film substrates. The technical field of the present invention includes several apparatus and methods for treating the substrates used to produce thin film substrates and to produce the thin film substrates for the purpose of regenerating the substrates to increase the number of reuse.

Crystalline silicon (including polycrystalline and monocrystalline silicon) is the most dominant absorber for commercial optoelectronic devices. Relatively high efficiency, associated with mass-produced crystalline silicon solar cells and combined with multiple materials, information, requires continuous use and advancement. However, the relatively high cost of the crystalline silicon material itself limits the expansion of the use of such solar cell modules. Currently, "wafering", or silicon crystallization and wafer cutting costs account for about 40% to 60% of the final solar cell manufacturing cost. If a more direct method of manufacturing wafers is available, great advances can be made in lowering solar cell costs.

There are different known methods of growing monocrystalline silicon and peeling or transferring the grown wafers. Regardless of these methods, low cost epitaxial silicon deposition processes involving mass production, production value, and low cost methods of forming release layers are a prerequisite for the expanding use of silicon solar cells.

Another prerequisite is the availability of a reusable substrate to repeatedly perform the sequence of release layer formation, thin film deposition, on-template processing, thin film layer peeling, recovery / regeneration of the substrate.

The microelectronics industry has achieved economies of scale by gaining more output by increasing die (or chip) count per wafer, scaling wafer size, and enhancing chip functionality, with each subsequent production of new products. Achieved. In the solar cell industry, cost savings are achieved through the industrialization of solar cell and module manufacturing processes by low cost, high productivity devices. In addition, cost savings are achieved by reducing raw material prices through the reduction of materials used per 1 watt output of solar cells.

In order to achieve the cost savings needed for the solar cell industry, process cost modeling is studied to identify and optimize device performance. Some types of costs: fixed costs (FC), recurring costs (RC), and output costs (YC) make up the overall cost picture. Fixed costs (FC) consist of items such as device purchase costs, installation costs, and robotic or automation costs. Recurring costs (RC) largely consist of electricity, gas, chemicals, operator wages and maintenance technician support costs. Output cost (YC) can be interpreted as the total value of the parts lost between production.

In order to achieve the number of Cost of Ownership (CoO) required by the solar cells, all aspects of the cost practice must be optimized. The characteristics of low cost processes are: 1) high productivity, 2) high yield, 3) low repetition cost, and 4) low fixed cost (in order of preference).

Designing high-productivity and economical methods and process equipment requires understanding the requirements of the process and incorporating such requirements into the device structure. Higher yields require more robust processes and more reliable devices, as the device productivity increases as the cost of production increases. Low recurring costs are also a prerequisite for low cost of ownership as a whole. Recurring costs may affect plant location selection based on, for example, local electricity costs or the availability of large quantities of chemicals. Fixed costs are masked by device productivity, but are important.

In summary, as described above, high production, reliable and efficient manufacturing processes and apparatus are prerequisites for low cost solar cells.

The use of reusable semiconductor substrates for the production of thin film semiconductor substrates (TFSSs) results in significant cost savings in the solar cell field. A sacrificial release layer is created on the substrate and then TFSS is deposited on the sacrificial layer. However, when the TFSS is peeled off from the substrate, a residual film may remain. The present invention mainly deals with the process of removing the residue and treating the substrate for reuse.

The features, properties, and advantages of the present invention will become more apparent from the following detailed description, taken in conjunction with the accompanying drawings, in which:
1A-1C illustrate one embodiment in which a surface appearance is formed on a reusable semiconductor substrate.
FIG. 2A illustrates a patterned semiconductor substrate, a porous semiconductor multilayer, and a TFSS.
2B is an electron micrograph of a planar substrate and a sacrificial layer having two different porosities.
3 is an electron micrograph of the interface between the substrate and the TFSS.
4 shows the TFSS ready to be peeled off the substrate.
5A shows two substrates with different amounts of TFSS overdeposition.
5B shows the TFSS peeling off from the substrate.
5C shows that the overdeposited TFSS is removed from the substrate.
5D illustrates the removal of residual TFSS material from the substrate using a grinding tape.
5E illustrates removal of residual TFSS material from the substrate using an edge grinder.
FIG. 5F illustrates the removal of residual TFSS material from the substrate using a laser having varying angles of incidence.
5G illustrates removal of excess front side TFSS material by grinding.

This application entails a priority claim for US Provisional Application No. 61 / 373,793, filed August 13, 2010, the entire contents of which are incorporated herein by reference. This application is also a continuation-in-part application of US patent application Ser. No. 11 / 868,493, filed Oct. 6, 2007, published as US Patent Publication No. 2008/0289684, which is incorporated by reference in its entirety. Incorporated herein.

Although the present disclosure has been described with reference to specific embodiments, those skilled in the art may apply the principles disclosed herein to other technical fields and / or embodiments without undue experimentation.

The present invention includes process flows, unit processes, and apparatus, and variations thereof that allow for the repeated use of substrates used in the manufacture of thin film layers that are subsequently processed to produce solar cells.

The present invention includes a starting semiconductor wafer (referred to as a substrate) having a suitable resistance to enable anodization to form a porous semiconductor material on one or both sides. The semiconductor used may comprise silicon, and in particular monocrystalline silicon. The contour of the substrate may be any suitable shape, including rounded (with or without notches or flats), square, or pseudo-square with rounded or chamfered edges. Can be. The porous semiconductor material may be composed of several layers having discrete or differential porosity. One or more portions of the porous semiconductor layer system serve as a designated weakened layer that facilitates separation of the TFSS from the substrate.

The present invention includes the use of a substrate for repeatedly processing a thin crystalline solar cell substrate from the substrate; The solar cell substrate may be processed on one surface or both surfaces of the substrate. Although the drawings herein specifically illustrate single sided machining, it is possible for all embodiments of the present invention to be applied essentially in the case of single sided and double sided substrate processing.

With respect to the starting wafer, there are several structural options, as described below. In the simplest embodiment, the substrate is essentially flat, ie the surface is cut, lapped or ground, etched or even mirror polished with any selected surface features, such as cutting damage removed. It may be mirror polished. In another embodiment, the wafer may be textured by, for example, alkali random texturing prior to formation of the porous semiconductor layer system described above. Thus, the textured surface is then transferred onto the thin film solar cell substrate. As a third alternative, the substrate can accommodate a patterned three-dimensional structure. Such three-dimensional structures may be formed through patterning techniques, such as, but not limited to, photolithography.

Exemplary processes are disclosed in FIGS. 1A-1C. In FIG. 1A, a starting wafer 100 is provided. In order to form a three-dimensional structure, a hard mask is generally used as a material, for example, but not limited to, a layer such as thermal oxide or other deposited etch resistive layer or deposited silicon nitride or silicon oxide. Not used). The hard mask layer 102 is formed on the surface of the wafer 100. The required pattern of photoresist 104 is then lithographically patterned on hard mask layer 102. In FIG. 1B, the wafer is placed in a holder and sealed with an O-ring to protect portions other than the front surface. After that, by removing all hard masks except the area under the remaining photoresist, the hard mask layer 102 is etched to generate a required pattern.

In FIG. 1C, a semiconductor etching process is involved, which includes dry etching, such as depth reactive ion etching (DRIE), or wet etching, such as potassium hydroxide, sodium hydroxide, tetramethyl ammonium hydroxide (TMAH) or other materials. By one of an optionally heated concentrated alkali wet etching comprising the same chemical. This creates the required pattern on the surface of the wafer in this experimental example, which includes a large inverted pyramidal structure 108 and a small pyramidal structure 110. Finally, the photoresist and hard mask are stripped from the wafer and the wafer is cleaned. Then, the porous semiconductor is ready to be formed on the textured surface. In addition, similar processes are readily derived from the drawings by those skilled in the art.

Since three-dimensional substrate patterning includes a broader range of embodiments, this is shown in most of the drawings herein. However, unless otherwise stated, the drawings, process flows, methods and apparatus of the present invention may equally be applied to flat or randomly textured substrates.

With one of the patterned or unpatterned substrates, the next process step is a rinsing and drying step, if necessary, after the porous semiconductor formation step. The porous semiconductor may be formed on one or more sides of the substrate. When the semiconductor is silicon, the process of forming porous silicon is described in the prior art, for example, published in US 2011/0030610, the entire contents of which are incorporated herein by reference. Basically, the porous semiconductor formation involves processing one or more lower porosity regions 112 on the surface and one or more higher porosity regions 114 closer to the substrate.

The substrate having the porous semiconductor layer formed is then transferred to an epitaxial deposition reactor, where the epitaxial layer is deposited on one or more sides of the substrate. FIG. 2A illustrates the deposition of epitaxial layer 116 on top of the porous semiconductor layer system. 2B illustrates a porous semiconductor bi-layer structure having a low porosity at the top and a high porosity at the bottom in a planar substrate embodiment.

Prior to the deposition, during one of the incremental steps or separation pre-deposition time, the substrate is maintained in a hydrogen ambient for some purpose: the top layer of the porous semiconductor is reflowed. The quasi-monocrystalline growth surface (QMS) of the semiconductor is re-formed. The hydrogen bake also reduces any oxidized surface semiconductor to its basic form. In addition, the high porosity semiconductor layer is agglomerated to form a weak layer that acts as a separation boundary between the growth layer and the substrate.

If the semiconductor is silicon, then in the initial deposition phase or between bakes, the reflow may be caused by a non-chlorine-containing species, such as trace amounts of silane, or other silicon at extremely low flow rates. It can be promoted using a containing gas such as trichlorosilane (TCS). This is one option of the process element that serves to safely prevent failure mechanisms that can occur between incomplete reflows.

There is a potential failure mechanism that can occur between reflows. Some mitigations for this failure mechanism are disclosed herein in part: while the substrate is heated in the semiconductor deposition reactor (which may be, for example, an epitaxial reactor), the substrate is generally standing at multiple locations. Contact with a susceptor. This contact point contributes to the non-ideality in the aforementioned reflow of the porous semiconductor layer. This contact point also contributes to local polishing of the porous semiconductor layer. In conclusion, the porous semiconductor layer may include an unsealed local region.

An example of a failure mechanism is shown in FIG. 3, which shows the substrate 118, the QMS layer 120 (which usually contains some trapped holes), and the deposited epitaxial layer 122. As the deposition begins after the reflow, two phenomena: a) deposition of material through the QMS layer 120 and direct deposition onto the substrate base can be observed. Fusion spot 124 is an example of this phenomenon. These areas lack the fragile sub-layers and thus inhibit the subsequent exfoliation process (described below). If the unsealed region is sealed after initiation of deposition, a deposition gas may be captured under the upper deposition layer. Such deposition gases may contain etching components such as chlorine-containing species as by-products of silicon deposition reactions from TCS molecules. Such byproducts may contribute to the subsequent etching of the substrate material. The etched and volatilized substrate material may redeposit the top layer, thus re-releasing the chlorine-containing species. In FIG. 3, some redeposited substrate material 126 may appear. Thus, the process can be continued in a semi-sealed local environment, and substrate etching can be observed very precisely up to several micrometers. One option to avoid this etching and redeposition mechanism is to initiate deposition using a reactant that does not include an etching component as a byproduct. An example of such a reactant is silane in the case of silicon deposition. Another option for preventing direct deposition onto the substrate and local etching of the substrate is to properly form a contact area that the substrate shares with the susceptor. In the contact area, a low contact area with a suitably large radius is preferred. This is necessary to enable uniform thermal ramp and profile within and between the substrates with proper heater placement.

In the epitaxial deposition process, the epitaxially deposited TFSS may include an in-situ emitter deposited in a semiconductor deposition chamber. The emitter may then be added as an ex-situ emitter outside of the epitaxy chamber. The structure on the substrate may consist of an emitter up or down. The epitaxial or non-epitaxial deposition may or may not contain a suitable dopant gradient designed to facilitate the required flow of the resulting carrier through the device.

The processed layer of semiconductor deposited on the weak layer on a high temperature capable substrate is very valuable. It allows the thin film to be transferred onto a solid substrate and has great flexibility in the on-template process described below.

In such a top-substrate process, the substrate may comprise: a thermal process, including but not limited to thermal oxidation, such as oxidation or film deposition; Nanoseconds (ns), picoseconds (ps) or other laser processes such as scribing, doping, or ablation; Chemical vapor deposition (CVD) and physical vapor deposition (PVD) processes; Lithography, screen printing, inkjet printing, spray coating or etching, immersion cleaning, etching or deposition (eg plating), lamination, die attach or bonding, exfoliation, wet chemical of the surface Texturing or dry texturing, rinsing, cleaning and drying the surface; It serves as a carrier for moving and supporting the thin and fragile TFSS over several top-substrate processing steps, including but not limited to. The peculiar nature here is that the substrate is clean and suitable for solar cells, is rigid and robust, high temperature resistant and reworkable.

After a suitable top-substrate process, the TFSS can be stripped from the substrate carrier. A conceptual diagram of peeling TFSS 116 from substrate 100 is shown in FIG. 4. The exfoliation can be performed with or without a temporary or permanent reinforcement plate, and the reinforcement plate is attached to an epi layer before the exfoliation. At this point or later, the reinforcement plate may contain a composition, such as a dielectric or conductive material. If the reinforcement plate is used, the reinforcement plate may comprise perforations or otherwise include a plurality of conductive portions that enable electrical contact through or around the reinforcement plate of the TFSS and The perforations may be present at the time of exfoliation of the TFSS or may be formed at later time points. Suitable reinforcing materials may include silicon, glass, silicon-aluminum alloys, plastics or polymers such as prepreg or other dielectric adhesives, metals such as aluminum, ceramics or combinations thereof. At a suitable point prior to exfoliation, the cutting of the defined region or boundary of the TFSS region to be exfoliated can be made, for example, using a laser. 4 shows the boundary cut 128 around the TFSS 116.

This boundary cleavage can be performed before or after exfoliation of the TFSS. Depending on the reinforcement process or the material, it may be advantageous to perform the cutting both before and after the exfoliation. The boundary cut also serves to weaken the thin TFSS to promote easier peeling. Another potential way to promote easier peeling is to use grinding or other polishing methods, preferably applied to the edges of the substrate. By doing so, the TFSS epitaxial layer region at the edge of the substrate can serve as a weak point from which peeling can be initiated. Such pre-release grinding may promote air ingress into the weakened region between the TFSS 116 and the substrate 100, thereby allowing pressure to equilibrate and pressure on the stripping process. Eliminate pressure-differential-induced resistance. The exfoliation itself may be performed by using the presence of a local weak area that serves as an initiation site for the exfoliation.

Optionally, a pulsed force can be applied, for example, by pulsating a vacuum on one side of the substrate and substrate sandwich. In this way, the exfoliation process can be extended over the location and time (not different from opening the zipper), rather than having to overcome the full area bonding force and the atmospheric holding force on the substrate. In addition, while the process keeps the substrate and the partially peeled TFSS essentially parallel, in order to prevent a small radius of curvature, which can cause excessive stress and potential cracking of the active TFSS layer, the peeling of the substrate It may proceed from that part after being initiated at the corner or corner.

After exfoliation of the active TFSS, there may be a residual deposited thin film remaining outside of the active region, especially if the substrate is somewhat excessive with respect to the active TFSS. 5A shows two possibilities. The substrate 200 has a porous semiconductor layer 202 extending beyond the edge of the TFSS 204. This is not a problem with peeling.

However, in the general CVD deposition process, the material may be deposited not only on the front surface, but also on the edge and the rear surface of the substrate depending on the structure. The range of the film is shown on the substrate 210. Thick deposition of the semiconductor layer in the slope region may be undesirable. Depending on the process, backside deposition may be disadvantageous for the following process, but if backside deposition in a double sided process produces a film similar to frontside deposition, backside deposition is required. Some alternatives may be taken to replace the substrate 210 with something similar to the substrate 200. A first approach for preventing or minimizing backside and slope deposition is to use neutral gas, such as hydrogen, as a purge gas near the edges and backside of the substrate between the deposition steps. A second way to prevent or minimize backside and slope deposition is to use a shadow mask to block areas where deposition is unnecessary from the deposition gas. The third approach for reducing backside and slope deposition utilizes a large surface area or other optimized shaped susceptor structure that can serve to preferentially deposit material from the gas phase, thereby eliminating deposition. Depletion of deposition gas in the region. The deposition process would have preferred locations and orientations where more or less material is deposited in undesirable areas. Over several reuses of the same substrate, it may be advantageous to symmetrically deposit the unnecessary material. For this purpose, the substrate orientation can be placed where it is needed, and variations in orientation or position can be programmed as part of the production process.

In the substrate 210, the porous silicon layer 212 partially surrounds the edge of the substrate, while the TFSS 214 surrounds further. If the TFSS extends beyond the edge of the porous semiconductor, other methods can be used to remove the portion of the TFSS that is in direct contact with the substrate.

5B illustrates TFSS delamination on substrate 200. The TFSS 204 is peeled off with little or no edge debris. After exfoliation, the TFSS 204 can be cut to size by the laser 206.

FIG. 5C shows the substrate 210 when the TFSS extends beyond the edge of the porous semiconductor layer or when the porous semiconductor is not formed with a porosity or thickness in the slope area suitable for easy peeling off of the TFSS. . The TFSS 214 is cut to size by the laser 216 and then peeled off the substrate 210. After exfoliation, the remaining film must be removed sequentially. Portion 218, coupled directly to the porous semiconductor layer, not directly to the substrate 210, is compressed air, high pressure water or other suitable fluid, the use of a taping-detaping process, sonic (ultrasound) energy Or by machining processes, such as by grinding or lapping the residual film from the substrate. For example, the grinding may be accomplished by using a grinding material that is abrasive and has a suitable hardness for the semiconductor or by a soft material that shears off excess thin film deposition. The latter method takes advantage of the fact that the binding force of the excess material is lower, which is controlled by the weakened layer between the thin film and the substrate. Removal of excess thin film may be accomplished by suitable chemical etching. By selecting a suitable chemical etch, good dopant concentrations or compositions based on the selectivity between the deposited film and the substrate can be obtained. It may also use direct and local etching.

Removal of the residual deposited thin film may be on a single wafer or batchwise. The removal process described above is designed to remove material from a flat portion of the substrate at least outside the active area and from the slope to the slope of the substrate. Other methods may be used to remove the remainder of the TFSS 220 that is directly coupled to the substrate 210 due to local defects or incomplete characteristics of the porous semiconductor layer.

Regardless of the alternative described above, it may be advantageous to remove excess deposition material in the slope or backside region. Removal of such excess deposition material may be performed after each reuse cycle or after several reuse cycles, and may be repeated over the life of the substrate. 5D illustrates removal of the remainder 220 and local defects 222 using the grinding tape 224, and FIG. 5E illustrates the use of grinding, polishing machine tools, or other polishing devices. It is. By such an apparatus, excess deposition material in the slope or backside region can be reduced or eliminated completely. In the case of a tape based grinding machine, the substrate can be spun in the presence of the tape, and the tape is generally filled with diamond or silicon carbide. In the case of a non-round substrate form, such as square or pseudo-square, the removal process may be another method, for example the substrate is not rotated but is side to side. side shifted, swiveled, or oscillated; Or the tape retention / injection mechanism may be moved, pivoted, or vibrated. The removal process can be adjusted to preferentially remove material in areas where more excess material is deposited. Removing the deposition material at other points around the slope or backside region can be accomplished by applying a tool, tape or sheet at different angles, pressures or locations relative to the substrate. Other removal embodiments for the deposition material will be apparent to those skilled in the art. Another process of this type of mechanically removing excess deposition from the substrate is to use a suitable chemical applied locally to remove the excess deposition from the substrate.

In FIG. 5E, a precision grinding wheel 226 (or abrasive wheel or slurry) is used to remove the film around the edge of the substrate 210. However, this will leave back residue 228, which may be removed later, for example by use of back grinder 230. It is also possible to combine the functions of the slope grinding wheel with the corner rear grinding wheel and 1 tool.

Another process for the tape, plate or precision slope grinding / polishing step is to remove excess deposition on the slope and the bottom of the substrate using a direct or water-jet-guided laser. And reshape the slope. The effect of the laser based slope material removal process is shown in FIG. 5F. This method can in particular have the advantage of enabling precise dimensional control. Combinations of the above methods are also possible. As shown, the substrate 210 was removed little or no by the laser edge ablation used in FIG. 5F.

In some cases, the processes described above in conjunction with FIGS. 5C-5E will still leave unnecessary additional TFSS material on the front and back of the substrate. In this case, as shown in FIG. 5G, a grinding machine 232 may be used to remove the material. If this is not done, the remaining front TFSS material causes subsequent TFSS to be fixed at that point making it more difficult to peel off on the substrate 210. By removing the excess material before reusing the substrate, the problem can be mitigated.

After removal of the unnecessary TFSS material by any method, a general process flow may include a reuse wash, which may include some purposes: first, moving the substrate to reusable conditions that can resist repeated reuse; Second, removing remnants of the sacrificial release layer; Next, removing metal contaminants that may be detrimental to the lifetime of sequential TFSSs deposited on the same substrate; Finally, removing adverse residues of any top-substrate process, such as organic or metal-containing residues; Satisfies In general, after the reuse cleaning, the substrate is introduced into the porous semiconductor forming process to form another sacrificial release layer. Thereafter, the thin film is peeled off. The following process is continued as described above.

Residual deposition that extends onto the backside of the substrate may be detrimental to further processing, as the substrate is repeatedly introduced into the sacrificial layer formation / deposition / addition process / peel / post-release treatment process. Can accumulate. Residual deposition on the backside can result in local stress points and unsmooth substrate surfaces that are unfavorable to process, which can increase the fracture propensity of the substrate. Thus, it may be advantageous to prevent (described above) or remove backside deposition material. This may be done after each reuse cycle or after some reuse cycles and may be repeated over the life of the substrate. These methods can be performed by removing material from the completed backside area or by mainly removing material deposited at the edge of the backside only locally from the wafer edge.

The substrate is a very useful commodity for the whole process. Thus, any process that serves to extend the potential number of deposition cycles in which the substrate can be maintained substantially increases the value proposition. Thus, in the case of defect processing or incomplete exfoliation on the substrate or removal of the TFSS film, the substrate may be subjected to a regeneration process. This regeneration process may consist of grinding and / or polishing the entire area of the substrate or problematic portions of the substrate. After successful regeneration, the substrate can be reentrant into the process loop and reuse can be resumed.

Grinding and / or polishing may be accomplished using single or double side grinding / grinding machines. The grinding / polishing process is selected according to the needs of the surface finish. Thereafter, the above-described TFSS forming the solar cell substrate does not require mirror polishing surface finish of the substrate. It is therefore important to note that the porous semiconductor sacrificial layer can be formed on the substrate surface without the need to start out to the mirror polished semiconductor surface. It is not known at which stage the incomplete process of the substrate takes place, and if the thickness is known the HVM compatible grinding / polishing process uses the least amount of material from the starting substrate, thus checking the substrate in one step following the exfoliation process. And sorting it into thickness ranges, multiple substrates can be processed simultaneously to the same target thickness in a grinding / polishing process. The classification according to the thickness and the local residue by deposition can be done simultaneously with a detection method based on suitable equipment, such as optics, capacitance, or gas back pressure.

TFSS, which may have been peeled from the substrate carrier and already undergone some processing on the substrate, may be further processed after the peeling. There are some additional possible embodiments of the TFSS and its processing method. For sufficient layer thickness, the TFSS may be self-supporting and processed through additional processes. When the substrate used to deposit the TFSS material on top is configured to form a three dimensional structure, such as an array of pyramids, prisms or other three dimensional figures, the TFSS is then used if the amount of TFSS material deposited is very small. May also be self-supporting. This structural feature is a potential advantage of the three-dimensional substrate and TFSS. If the layer thickness is not sufficient for self-support of the TFSS, the TFSS may be supported by a suitable support plate between additional processes.

Those skilled in the art will appreciate that embodiments of the present invention relate to the specific embodiments described above and to the broader technical scope.

The description of the above-described embodiments is provided to enable those skilled in the art to produce or use the technical details of the claims. Various operations on these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments without innovative consideration. Accordingly, the technical details of the claims are not limited to the above embodiments disclosed herein, but should be construed broadly consistent with the principles and novel features disclosed herein.

All additional systems, methods, features, and advantages included herein are included in the scope of the present invention.

Claims (19)

Providing a reusable semiconductor substrate;
Forming a sacrificial release layer on a front surface of the reusable semiconductor substrate;
Epitaxially depositing a thin film semiconductor substrate conformally to the sacrificial release layer;
Peeling the thin film semiconductor substrate from the reusable semiconductor substrate by separation in the sacrificial release layer; And
Regenerating the reusable semiconductor substrate to remove the overly epitaxially deposited thin film semiconductor substrate material to enable production of a second thin film semiconductor substrate. The method of claim 1, wherein the semiconductor comprises silicon. The method of claim 2, wherein the silicon comprises monocrystalline silicon. The method of claim 1, further comprising promoting the peeling by specifying a boundary of the thin film semiconductor substrate with a laser prior to the peeling. 2. The method of claim 1, wherein the step of peeling by specifying a boundary of the thin film semiconductor substrate using bevel grinding of the substrate including the epitaxially deposited thin film semiconductor substrate prior to the peeling step Further comprising the step of facilitating. The method of claim 1, wherein the regenerating comprises polishing or grinding epitaxially deposited material from a beveled edge of the reusable semiconductor substrate. The method of claim 1, wherein the regenerating comprises lapping or grinding epitaxially deposited material from the surface of the reusable semiconductor substrate. The method of claim 1, wherein the regenerating comprises removing epitaxially deposited material from a back side of the reusable semiconductor substrate. The method of claim 1, wherein the regenerating comprises tape bevel grinding or polishing epitaxially deposited material from a slope of the reusable semiconductor substrate. The method of claim 1, wherein the regenerating comprises removing epitaxially deposited material from the reusable semiconductor substrate using laser ablation. The method of claim 10, wherein the laser ablation uses a water jet guide. The method of claim 1, wherein the regenerating comprises removing epitaxially deposited material from the reusable semiconductor substrate using sonication. The method of claim 1, wherein the regenerating comprises removing epitaxially deposited material from the reusable semiconductor substrate using high pressure water or high pressure gas. The method of claim 1, wherein the regenerating comprises removing epitaxially deposited material from the reusable semiconductor substrate using kiss grinding. The method of claim 1, wherein the regenerating comprises removing epitaxially deposited material from the reusable semiconductor substrate using programmable precision bevel grinding. Way. The method of claim 1, wherein the reusable semiconductor substrate is tracked within the production process to have symmetrical edges and backside deposition, and repeated deposition is performed at different orientations of the substrate. . The reusable semiconductor according to claim 1, wherein prior to grinding and lapping of the regeneration region, the reusable semiconductor is determined for a sequential batch lapping or grinding process to determine the material required in the grinding or lapping step or to bin the material with a substrate or the like. Measuring the thickness and weight of the substrate. Providing a reusable semiconductor substrate;
Forming a sacrificial release layer on a front surface of the reusable semiconductor substrate;
Epitaxially depositing a thin film semiconductor substrate conformally to the sacrificial release layer, the deposition being reduced by at least one of a backside gas purging or a shadow mask. And edge deposition; And
Peeling the thin film semiconductor substrate from the reusable semiconductor substrate by separation in the sacrificial release layer. Providing a reusable semiconductor substrate;
Forming a sacrificial release layer on a front surface of the reusable semiconductor substrate;
Epitaxially depositing a thin film semiconductor substrate conformally to the sacrificial release layer;
Peeling the thin film semiconductor substrate from the reusable semiconductor substrate by separation in the sacrificial release layer;
The reusable semiconductor substrate may be subjected to at least one of silicon etching, metal washing, and organic cleaning to produce a previously produced and exfoliated thin film semiconductor substrate and from an on-template process performed on the thin film semiconductor substrate. Removing residue; And
Regenerating the reusable semiconductor substrate to enable production of a second thin film semiconductor substrate.

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