KR101244667B1 - Digital x-ray detector and method for fabricating the same - Google Patents

Abstract

The present invention provides a digital X-ray detector and a method of manufacturing the same, which are suitable for reducing the production cost by reducing the number of masks and simplifying the process. The digital X-ray detector for achieving the above object includes a first substrate and a second substrate facing each other at a predetermined interval; A gate line and a data line formed vertically and horizontally on the first substrate to define a pixel area, and having gate pads and data pads at one end thereof; A storage lower electrode formed on the first substrate corresponding to the pixel region; A storage line configured to cross the storage lower electrode; It is formed at the intersection of the gate line and the data line, the gate electrode protruding from one side of the gate line, the gate insulating film formed on the front surface including the gate electrode, the active pattern isolated in the upper region of the gate electrode, protruding from one side of the data line A thin film transistor including a source electrode overlapping an upper portion of an active pattern and a drain electrode spaced apart from the source electrode and overlapping an upper portion of the active pattern; A storage upper electrode overlapping an upper portion of the drain electrode of the thin film transistor and extending into the pixel region; A blocking film formed over the channel region of the thin film transistor; A planar passivation layer having a first contact hole in a storage upper electrode, a second contact hole in a data pad, and a first groove formed above the gate pad; A charge collection electrode in contact with the storage upper electrode and formed in the pixel region; A first pad electrode in contact with the data pad and formed over the one region; A second pad electrode contacted with the gate pad and formed over the one region; And an amorphous selenium ion layer filled between the first and second substrates.

DXD, mask, TAB, COG

Description

DIGITAL X-RAY DETECTOR AND METHOD FOR FABRICATING THE SAME}

1 is a unit plan view of a conventional digital x-ray detector (DXD)

2 is a cross-sectional view taken along line II ′ and II-II ′ of FIG. 1;

3A-3K are cross-sectional views of a process for manufacturing the TFT array of FIG.

4 is a unit plan view of a digital x-ray detector according to an exemplary embodiment of the present invention.

5 is a cross-sectional view taken along line III-III ', IV-IV', and V-V 'of FIG.

6A-6H are cross-sectional views of a process for manufacturing the TFT array of FIG.

Explanation of symbols on the main parts of the drawings

60: first substrate 61: storage lower electrode

62: gate line 62a: gate electrode

62b: gate pad 62c: storage line

63 gate insulating film 64 active pattern

65 data line 65a source electrode

65b: drain electrode 65c: data pad

66a: upper storage electrode 66b: blocking film

67: planar protective films 68a, 68b: first and second contact holes

68c: first groove 69: third contact hole

70a: charge collection electrode 70b: data pad electrode

70c: Gate Pad Electrode

The present invention relates to a digital x-ray detector, and more particularly, to a digital x-ray detector suitable for simplifying the process by reducing the number of masks and a manufacturing method thereof.

Hereinafter, with reference to the accompanying drawings will be described a conventional digital xpep detector and its manufacturing method as follows.

FIG. 1 is a unit plan view of a conventional digital x-ray detector DXD, and FIG. 2 is a cross-sectional view of the structure taken along lines II ′ and II-II ′ of FIG. 1.

3A through 3K are cross-sectional views illustrating a process of manufacturing the TFT array of FIG. 2.

The digital X-ray detector according to the prior art, as shown in Figs. 1 and 2, the first substrate 20 and the second substrate 10 which are opposed to each other at a predetermined interval on the first substrate 20, A gate line 22 having first and second gate pads 21b and 22c stacked on one end of the first substrate 20, and formed vertically and horizontally with the gate line 22 to define a pixel area. A front surface including a data line 26 and a first and second data pads 21a and 22b in which one region connected to one end of the data line 26 is stacked, and the gate line 22. A thin film transistor TFT formed at an intersection of the gate insulating film 23 formed at the gate line 22, the gate line 22 and the data line 26, and a storage line 26c formed in the pixel area in a direction orthogonal to the gate line. And storage formed in the pixel area in contact with the storage line 26c. Amorphous selenium filled between the lower electrode 31b, the storage upper electrode 34 formed in the pixel region in contact with the drain electrode 26a of the thin film transistor, and the first and second substrates 20 and 10. It consists of an ion layer 51.

The data line 26 is connected to the second data pad 22b through the first contact hole 25 at one end thereof.

The storage lower electrode 31b contacts the storage line 26c through the fifth contact hole 30b, and the storage upper electrode 34 contacts the drain electrode 26a through the sixth contact hole 33. do. The first transparent pad 31a is further formed in the sixth contact hole 33.

The second data pad 22b and the second gate pad 22c are formed with seventh and eighth contact holes 35a and 35b to be aluminum wire bonded later.

In addition, the storage line 26c, the data line 26, the source electrode 26b and the drain electrode 26a of the thin film transistor are made of chromium or molybdenum.

In the method of manufacturing a digital X-ray detector according to the related art having the above configuration, first, as shown in FIG. 3A, a first conductive layer made of Al-Nd is deposited on a first substrate 20, and a first mask is formed. The first data pad 21a and the first gate pad 21b are formed in the data pad portion by using.

Next, as shown in FIG. 3B, after depositing a second conductive layer made of Al-Nd, a gate electrode 22a is provided on one side using a second mask, and the first gate pad 21b is provided. The second gate pad 22c is formed at one end of the gate line 22 (see FIG. 1) arranged in one direction so as to overlap with the second gate pad 22c. At this time, the second data pad 22b is also formed to overlap the upper portion of the first data pad 21a and extend in one direction.

As described above, the first gate pad 21b and the first data pad 21a are formed in advance under the second gate pad 22c and the second data pad 22b to increase the thickness of each pad. Put it.

Thereafter, as illustrated in FIG. 3C, after depositing a gate insulating film 23 on the entire surface of the first substrate 20 including the gate line 22 and depositing a semiconductor layer on the gate insulating film 23, An active pattern is formed on the gate electrode 22a using the third mask.

Next, as shown in FIG. 3D, a first contact hole 25 is formed in one region of the second data pad 22b using a fourth mask.

The first contact hole 25 is a contact hole for connecting to a data line to be formed later.

Since the second data pad 22b is later connected to the external lead-out IC by aluminum wire bonding, the second data pad 22b requires contact holes at both ends thereof.

Thereafter, as shown in FIG. 3E, a third conductive layer made of chromium or molybdenum (Mo) is deposited on the entire surface including the first contact hole 25 and etched using a fifth mask to form a gate line 22. ) And a data line 26 intersecting with each other to define a pixel area, a source electrode 26b protruding from one side of the data line 26 and overlapping an upper portion of one side of the active pattern 24, and the source electrode. A drain electrode 26a is formed on the other side of the active pattern 24 to be spaced apart from the predetermined distance 26b.

While forming the data line 26, the storage line 26c is formed in a direction orthogonal to the gate line 22.

Next, as shown in FIG. 3F, a first interlayer insulating film 27 made of a silicon nitride film is formed on the entire surface including the data line 26, and one of the drain electrodes 26a is formed using a sixth mask. Second and third contact holes 28a and 28b are formed in an area and one area of the storage line 26c.

Subsequently, as shown in FIG. 3G, a flat insulating film 29 formed of an organic insulating film is formed on the entire surface of the first substrate 20, and the drain electrode 26a and the storage line (using the seventh mask) are formed. The fourth and fifth contact holes 30a and 30b are formed in regions corresponding to the second and third contact holes 28a and 28b of the 26c, respectively, and the second data pad 22b and the second gate pad ( First and second grooves 30c and 30d are formed on the upper side of 22c).

Next, as shown in FIG. 3H, a first transparent conductive film is deposited on the entire surface, and the predrain electrodes 26a and 30b are respectively formed through the fourth and fifth contact holes 30a and 30b using an eighth mask. The first transparent pad 31a and the storage lower electrode 31b are formed to contact the storage line 26c.

Subsequently, as shown in FIG. 3I, a second interlayer insulating film 32 made of a silicon nitride film is deposited on the entire surface of the first substrate 20 so as to be used as a dielectric film, and the fourth contact is made using a ninth mask. The sixth contact hole 33 is formed in the region corresponding to the hole 30a.

Next, as shown in FIG. 3J, a second transparent conductive film is deposited on the entire surface including the sixth contact hole 33, and the drain electrode 26a is formed through the sixth contact hole 33 using a tenth mask. The upper storage electrode 34 is formed in the pixel area to be in contact with each other.

Subsequently, as shown in FIG. 3K, the second interlayer insulating film 32, the first interlayer insulating film 27, and the gate insulating film 23 are etched using the eleventh mask to form the second data pad 22b. And the seventh and eighth contact holes 35a and 35b to expose the second gate pad 22c. The second data pad 22b and the second gate pad 22c opened through the seventh and eighth contact holes 35a and 35b are regions for later aluminum wire bonding.

As described above, the conventional digital X-ray detector has the following problems.

First, the gate pad and the data pad must be formed twice in order to increase the thickness of the gate pad and the data pad which will be bonded later to the lead-out IC and the aluminum wire.

In addition, as the material of the data pad to be wire-bonded with the data line is different, a contact hole forming process for connecting the data line is required.

As described above, the conventional digital X-ray detector requires 11 masks to manufacture, which makes the process complicated and thus requires a large production cost.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a digital X-ray detector suitable for reducing the production cost by reducing the number of masks, and a manufacturing method thereof.

Digital X-ray detector according to the present invention for achieving the above object comprises a first substrate and a second substrate facing each other at a predetermined interval; A gate line and a data line formed vertically and horizontally on the first substrate to define a pixel area, and having a gate pad and a data pad at one end thereof; A storage lower electrode formed on the first substrate corresponding to the pixel region; A storage line configured to cross the storage lower electrode; A gate electrode formed at an intersection of the gate line and the data line, the gate electrode protruding from one side of the gate line, a gate insulating film formed on the front surface including the gate electrode, an active pattern isolated on an upper region of the gate electrode, and the data line A thin film transistor protruding from one side of the thin film transistor including a source electrode overlapping an upper portion of the active pattern, a drain electrode spaced apart from the source electrode, and overlapping an upper portion of the active pattern; A storage upper electrode overlapping an upper portion of the drain electrode of the thin film transistor and extending to the pixel region; A blocking film formed over the channel region of the thin film transistor; A planar passivation layer having a first contact hole in the storage upper electrode, a second contact hole in the data pad, and a first groove formed on the gate pad; A charge collection electrode in contact with the storage upper electrode and formed in the pixel region; A first pad electrode in contact with the data pad and formed over the one region; A second pad electrode contacted with the gate pad and formed on an upper portion of the region; And an amorphous selenium ion layer filled between the first and second substrates.

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The storage lower electrode, the storage upper electrode, the blocking layer, the charge collection electrode, and the first and second pad electrodes may be formed of a transparent conductive film.

The transparent conductive film may be formed of a material such as indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). Characterized in that consisting of.

The storage upper electrode is in direct contact with and overlapping with the daily part of the drain electrode.

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The planar passivation layer is formed of an organic insulating layer having a low dielectric constant of at least one of photoacryl, polyimide, and benzocyclobutene (BCB).

The method of manufacturing a digital x-ray detector of the present invention having the above configuration includes the steps of: forming a storage lower electrode in a region on a first substrate with a first mask; Forming a storage line in one direction on the storage lower electrode and a gate line including a gate electrode and a gate pad on the first substrate using a second mask; Forming a gate insulating film on the first substrate including the gate line; Forming an active pattern on the gate electrode with a third mask; Forming a pixel line intersecting the gate line with a fourth mask to define a pixel region, a data line having a source electrode and a data pad at one side and one end thereof, and a drain electrode separated from the source electrode; Forming a blocking layer over the storage upper electrode and a channel region between the source and drain electrodes to contact the drain electrode with a fifth mask; Forming a planar passivation layer having first and second contact holes on the storage upper electrode and the data pad using a sixth mask and a first groove formed on the gate pad; Forming a third contact hole in the gate pad with a seventh mask; And forming a charge collection electrode in contact with the storage upper electrode in the pixel region using a eighth mask, and a gate pad electrode in contact with the data pad electrode and the gate pad in contact with the data pad.

The storage lower electrode may be formed in a rectangular shape in a unit pixel area.

The gate line, the gate electrode and the storage line are characterized in that the Al-Nd.

The storage line is spaced apart from the gate line and formed in parallel.

The storage upper electrode is in direct contact with and overlapping with the daily part of the drain electrode.

The storage upper electrode and the blocking layer are formed to be isolated.

The planar passivation layer may be formed of an organic insulating layer having a low dielectric constant of at least one of photoacryl, polyimide, and benzocyclobutene (BCB).

The charge collecting electrode may be formed to overlap the gate line and / or the data line.

The storage lower electrode, the storage upper electrode, the blocking layer, the charge collection electrode, the data pad electrode and the gate pad electrode may be formed of a transparent conductive layer.

The transparent conductive film may be formed of a material such as indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). Characterized in that formed.

Hereinafter, a digital x-ray detector and a manufacturing method thereof according to a preferred embodiment of the present invention will be described with reference to the accompanying drawings.

First, a configuration of a digital x-ray detector according to an embodiment of the present invention will be described.

FIG. 4 is a unit plan view of a digital x-ray detector according to an exemplary embodiment of the present invention, and FIG. 5 is a cross-sectional view taken along line III-III ', IV-IV', and V-V 'of FIG. 4.

Digital X-ray detector (DXD) according to an embodiment of the present invention relates to a configuration that can be connected to the read out IC (Read out IC) using TAB bonding or COG bonding, as shown in Figures 4 and 5 And a first substrate 60 and a second substrate 50 opposed to each other at predetermined intervals, and are formed on the first substrate 60 vertically and horizontally to define pixel regions, and gate pads 62b at one end thereof, respectively. And a gate line 62 and a data line 65 having a data pad 65c, a storage lower electrode 61 formed on the first substrate 60 corresponding to the pixel region, and the storage lower electrode A storage line 62b configured to cross the 61, a thin film transistor TFT formed at an intersection of the gate line 62 and the data line 65, and a drain electrode 65b of the thin film transistor TFT. Overlap with one upper part of the A storage upper electrode 66a, a blocking film 66b formed over the channel region of the thin film transistor, a charge collection electrode 70a formed in the pixel region in contact with the storage upper electrode 66a, and the data pad ( The data pad electrode 70b is formed in contact with 65c and is formed on one region, and the gate pad electrode 70c is formed in contact with the gate pad 62b and is formed in one region, and the first and second substrates are filled with each other. The amorphous selenium ion layer 51 is formed.

The thin film transistor may include a gate electrode 62a protruding from one side of the gate line 62, a gate insulating layer 63 formed on the entire surface including the gate electrode 62a, and an upper region of the gate electrode 62a. An active pattern 64 isolated from the source pattern, a source electrode 65a protruding from one side of the data line 65 and overlapping an upper portion of the active pattern 64, and spaced apart from the source electrode 65a. The drain electrode 65b overlaps the upper portion of the active pattern 64.

The storage lower electrode 61 is formed in a rectangular shape in a unit pixel area.

The storage line 62c is formed to cross the middle region of the storage lower electrode 61, and is formed on the same layer in parallel with the gate line 62.

The storage upper electrode 66a and the blocking layer 66b are also formed on the same layer.

The storage lower electrode 61, the storage upper electrode 66a, the blocking layer 66b, the charge collection electrode 70a, the data pad electrode 70b, and the gate pad electrode 70c are indium tin. It is composed of a transparent conductive film such as indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). .

The storage upper electrode 66a is in direct contact with and overlaps with the daily part of the drain electrode 65b.

In addition, a first contact hole 68a is formed on the storage upper electrode 70a and a second contact hole 68b is formed on the data pad 65c on the first substrate 60 including the storage upper electrode 66a. The planar passivation layer 67 having the first groove 68c (see FIG. 7F) formed on the gate pad 62b is provided.

A third contact hole 69 is formed in the gate insulating layer 63 below the first groove 68c so that the gate pad 62b is exposed.

The planar passivation layer 67 is formed of an organic insulating layer having a low dielectric constant of at least one of photoacryl, polyimide, and benzocyclobutene (BCB).

The storage upper electrode 66a and the blocking layer 66b are isolated from each other.

The charge collection electrode 70a may be overlapped on the gate line 62 and the data line 65 to maximize the charge collection region.

The digital X-ray detector having the above configuration connects the data pad electrode 70b and the gate pad electrode 70c formed of a transparent conductive film with TAB bonding or COG bonding to the readout IC.

When the digital X-ray detector (DXD) configured as described above receives an X-ray from an upper portion of the second substrate 50 and the X-ray meets amorphous selenium (Se) ions to form an electron hole pair, After the charge is charged to the storage area through the charge collection electrode 70a, when the thin film transistor TFT is turned on, the charge is transferred to the external readout circuit through the thin film transistor to be driven.

For example, when X-ray imaging a part of a body, the amount of charge charged in the charge collection electrode is high in the body portion through which the X-ray is transmitted, and the amount of charge charged in the charge collection electrode in the region where the X-ray transmittance is low. This is the case, but the difference can be obtained with the image.

Next, a method of manufacturing a digital x-ray detector according to an embodiment of the present invention having the above configuration will be described.

6A to 6H are cross-sectional views of a process for manufacturing the TFT array of FIG. 5.

In the method of manufacturing the digital X-ray detector DXD according to the embodiment of the present invention, first, as shown in FIGS. 6A and 7A, a first transparent conductive film is deposited on one region of the first substrate 60. The storage lower electrode 61 is formed by etching by using only the first mask so that only one region remains.

In this case, the storage lower electrode 61 is formed in a wide rectangular shape in the unit pixel area.

Next, as shown in FIGS. 6B and 7B, a first conductive layer made of Al-Nd is deposited on the entire surface of the first substrate 60 including the storage lower electrode 61, and then oriented in one direction using a second mask. The storage line 62c is formed on the storage lower electrode 61 so as to be spaced apart from and parallel to the gate line 62 arranged in a row. In this case, a protruding gate electrode 62a is formed at one side of the gate line 62, and a gate pad 62b is formed at one end of the gate line 62.

Subsequently, as shown in FIGS. 6C and 7C, a gate insulating film 63 composed of a silicon oxide film is deposited on the entire surface, and a semiconductor layer is deposited on the gate insulating film 63. The active pattern 64 is formed in one region above the gate electrode 62a.

6D and 7D, a second conductive layer is deposited on the entire surface including the active pattern 64, and the second conductive layer is etched using a fourth mask to form the gate line ( 62 and a data line 65 arranged in one direction so as to define a pixel area, and a source electrode 65a protruding from one side of the data line 65 so as to overlap the upper portion of one side of the active pattern 64. And a drain electrode 65b spaced apart from the source electrode 65a at a predetermined interval so as to overlap the upper portion of the active pattern 64, and a data pad 65c arranged at one end of the data line 65. ).

As a result, a thin film transistor including a gate electrode 62a, a source electrode 65a, and a drain electrode 65b is formed in an area where the gate line 62 and the data line 65 cross each other.

Subsequently, as illustrated in FIGS. 6E and 7E, after depositing a second transparent conductive film on the entire surface of the first substrate 60 including the data line 65, an upper portion of the lower storage electrode is formed using a fifth mask. A blocking film 66b is formed on the storage upper electrode 66a and the channel region between the source and drain electrodes 65a and 65b in the pixel region of the substrate. The storage upper electrode 66a and the blocking layer 66b are isolated from each other.

The storage upper electrode 66a is in direct contact with the ordinary portion of the drain electrode 65b and extends into the pixel region.

Next, as shown in FIGS. 6F and 7F, a flat protective film 67 is deposited on the first substrate 60 including the storage upper electrode 66a.

The planarization protective layer 67 is etched using the sixth mask to expose a region of the storage upper electrode 66a overlapping the drain electrode 65b so that the first contact hole 68a and the data pad 65c are exposed. The second contact hole 68b and the first groove 68c are formed on the gate pad 62b so that one region of the top surface is exposed.

The planar passivation layer 67 may be formed of an organic insulating layer having a low dielectric constant of at least one of photoacryl, polyimide, and benzocyclobutene (BCB).

Thereafter, as shown in FIGS. 6G and 7G, the third contact hole 69 is formed to expose one region of the gate pad 62c using the seventh mask.

Next, as shown in FIGS. 6H and 7H, after depositing the third transparent conductive film on the planar protective film 67 including the first to third contact holes 68a, 68b, and 69, the eighth mask is deposited. To etch the third transparent conductive film. As a result, the charge collecting electrode 70a and the second contact hole 68b are disposed in the pixel area to be in contact with the storage upper electrode 66a through the first contact hole 68a and the data pad 65c. ) And a data pad electrode 70b in one region so as to contact the gate pad electrode 70c in contact with the gate pad 62b through the third contact hole 69.

In this case, the charge collecting electrode may be overlapped with the gate line 62 and / or the data line 65 to maximize the charge collecting region.

The first, second, and third transparent conductive films of the above processes may include indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or indium tin zinc oxide. It may be composed of a material such as (Indium Tin Zinc Oxide: ITZO).

The data pad electrode 70b and the gate pad electrode 70c formed of the transparent conductive film are later connected to the lead-out IC by tap bonding or COG bonding.

5, the second substrate 50 is bonded to face the first substrate 60, and amorphous selenium (Se) ions are filled between the first and second substrates 60 and 50.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit of the invention.

Accordingly, the technical scope of the present invention should not be limited to the contents described in the above embodiments, but should be determined by the claims.

The digital X-ray detector and its manufacturing method according to the present invention as described above has the following effects.

The effect is to simplify the process by reducing the number of masks.

Accordingly, the defect rate during the process can be reduced, and the production cost can be reduced.

Claims (17)

A first substrate and a second substrate facing each other at a predetermined interval; A gate line and a data line formed vertically and horizontally on the first substrate to define a pixel area, and having a gate pad and a data pad at one end thereof; A storage lower electrode formed on the first substrate corresponding to the pixel region; A storage line configured to cross the storage lower electrode; A gate electrode formed at an intersection of the gate line and the data line, the gate electrode protruding from one side of the gate line, a gate insulating film formed on the front surface including the gate electrode, an active pattern isolated on an upper region of the gate electrode, and the data line A thin film transistor protruding from one side of the thin film transistor including a source electrode overlapping an upper portion of the active pattern, a drain electrode spaced apart from the source electrode, and overlapping an upper portion of the active pattern; A storage upper electrode overlapping an upper portion of the drain electrode of the thin film transistor and extending to the pixel region; A blocking film formed over the channel region of the thin film transistor; A planar passivation layer having a first contact hole in the storage upper electrode, a second contact hole in the data pad, and a first groove formed on the gate pad; A charge collection electrode in contact with the storage upper electrode and formed in the pixel region; A first pad electrode in contact with the data pad and formed over the one region; A second pad electrode contacted with the gate pad and formed on an upper portion of the region; And an amorphous selenium ion layer filled between the first and second substrates. delete The method of claim 1, And the storage lower electrode, the storage upper electrode, the blocking layer, the charge collection electrode, and the first and second pad electrodes are formed of a transparent conductive layer. delete The method of claim 1, And the storage upper electrode is in direct contact with and overlaps with a daily portion of the drain electrode. delete The method of claim 1, The planar passivation layer is a digital x-ray detector, characterized in that formed of an organic insulating film of at least one of photoacryl, polyimide, BCB (Benzo Cyclo Butene). Forming a storage lower electrode in a region on the first substrate with the first mask; Forming a storage line in one direction on the storage lower electrode and a gate line including a gate electrode and a gate pad on the first substrate using a second mask; Forming a gate insulating film on the first substrate including the gate line; Forming an active pattern on the gate electrode with a third mask; Forming a pixel line intersecting the gate line with a fourth mask to define a pixel region, a data line having a source electrode and a data pad at one side and one end thereof, and a drain electrode separated from the source electrode; Forming a blocking layer over the storage upper electrode and a channel region between the source and drain electrodes to contact the drain electrode with a fifth mask; Forming a planar passivation layer having first and second contact holes on the storage upper electrode and the data pad using a sixth mask and a first groove formed on the gate pad; Forming a third contact hole in the gate pad with a seventh mask; And forming a charge collection electrode in contact with the storage upper electrode in the pixel region with the eighth mask, and a gate pad electrode in contact with the data pad electrode and the gate pad in contact with the data pad. Method of manufacturing the X-ray detector. 9. The method of claim 8, The storage lower electrode is a manufacturing method of a digital x-ray detector, characterized in that formed in a wide rectangular shape in the unit pixel area. 9. The method of claim 8, The gate line, the gate electrode and the storage line is a manufacturing method of a digital x-ray detector, characterized in that composed of Al-Nd. 9. The method of claim 8, And the storage line is spaced apart from and parallel to the gate line. 9. The method of claim 8, And the storage upper electrode is in direct contact with and overlaps with a daily part of the drain electrode. 9. The method of claim 8, The storage upper electrode and the blocking layer is formed to be isolated to the digital x-ray detector manufacturing method. 9. The method of claim 8, The planar passivation film is a method of manufacturing a digital x-ray detector, characterized in that formed of an organic insulating film of at least one of photoacryl, polyimide, BCB (Benzo Cyclo Butene). 9. The method of claim 8, The charge collecting electrode (Charge Collecting Electrode) is a method of manufacturing a digital x-ray detector, characterized in that the overlap formed on the gate line and / and the data line. 9. The method of claim 8, And the storage lower electrode, the storage upper electrode, the blocking layer, the charge collection electrode, the data pad electrode, and the gate pad electrode are formed of a transparent conductive film. delete

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