KR101237969B1 - Semi-polar or Non-polar Nitride Semiconductor Substrate, Device, and Method for Manufacturing the Same - Google Patents

Abstract

The present invention relates to a nitride semiconductor in which a nitride-based layer is horizontally grown in a semipolar or nonpolar direction, and a method of manufacturing the same, wherein the semipolar or nonpolar nitride semiconductor device is formed at intervals of 100 to 3100 μm longer than the length of one side of the substrate and the unit device. Mask layer forming openings, semi-polar or nonpolar n-type nitride layer with defects in each opening, multi-quantum well layer, multi-quantum well layer grown on one side of semi-polar or non-polar n-type nitride layer Semi- or non-polar p-type nitride layer grown on top, n-electrode, semi-polar or non-polar p-type nitride layer formed on top of semi-polar or non-polar n-type nitride layer and between multiple quantum well layers It characterized in that it comprises a p-electrode generated on the side.
Furthermore, the semi-polar or non-polar nitride semiconductor wafer according to the present invention includes a mask layer having openings formed at intervals of 100 to 3100 μm longer than the length of one side of the substrate, the unit element, semi-polar with defects at each opening, or It characterized in that it comprises a non-polar n-type nitride layer.
In the method of manufacturing a semi-polar or non-polar nitride semiconductor device according to the present invention, first, preparing a substrate, depositing a mask layer on the substrate, and then patterning the openings at intervals of 100 to 3100 μm longer than the length of one side of the unit device. Creating, vertically and horizontally growing the semi-polar or non-polar n-type nitride layer through the opening to the top of the mask layer using a hydrogen vapor deposition process, multi-quantum on top of the grown semi-polar or non-polar n-type nitride layer Growing a multi quantum well (MQW) layer, growing a semi-polar or non-polar p-type nitride layer on top of the multi quantum well layer, and then exposing the multi quantum well layer and a portion of the top of the n-type nitride layer; Etching the semipolar or nonpolar p-type nitride layer, one side of the upper portion of the semipolar or nonpolar n-type nitride layer exposed after etching And generating the n- electrode between the multi-quantum well layer, it characterized in that it includes the step of generating the p- electrode to the upper semi-polar or non-polar one side p-type nitride layer.
Furthermore, in the method for manufacturing a semi-polar or non-polar nitride semiconductor wafer according to the present invention, an opening is formed by preparing a substrate, depositing a mask layer on the substrate, and patterning the pattern at intervals of 100 to 3100 μm longer than one side of the unit device. And vertically and horizontally growing the semipolar or nonpolar n-type nitride based layer through the opening to the mask layer by using a hydrogen vapor deposition process.

Description

Semi-polar or non-polar nitride semiconductor device, wafer and method for manufacturing the same {Semi-polar or Non-polar Nitride Semiconductor Substrate, Device, and Method for Manufacturing the Same}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nitride semiconductor device, a wafer, and a method of manufacturing the same. More particularly, the present invention relates to a technique for depositing a mask layer for growing a nitride semiconductor having a semipolar or nonpolar plane and laterally growing a nitride semiconductor thereon. BACKGROUND OF THE INVENTION The present invention relates to a semipolar or nonpolar nitride semiconductor device, a wafer, and a manufacturing method thereof, as an optimized lateral growth technology of a nitride semiconductor for maximizing device efficiency by minimizing defects in a multiple quantum well layer.

In general, nitride-based semiconductor optical devices or electronic devices are growing in polarity. Nitride-based semiconductor films grown in polarity are structurally caused by spontaneous polarization or piezoelectric polarization due to internal stress. Due to the polarization effect, the energy band is bent and the charge distribution is separated inside the quantum well, thereby reducing the recombination efficiency of electrons and holes. Therefore, at high currents, the wavelength of the optical device is changed and the characteristics of the device are deteriorated. In order to reduce the polarization phenomenon, development of semi-polar or non-polar nitride semiconductors is actively underway, but there are still many problems in the improvement of quality in crystal growth for devices.

In order to improve the quality of a semipolar or nonpolar nitride semiconductor, a technique for growing a nitride film in a semipolar or nonpolar direction by using the Lateral Epitaxial Overgrowth (LEO) technology has been developed (Patent Document 1). However, in the organic organic chemical vapor deposition (MOCVD) technique for growing crystals, the gap between the openings is shortened due to the low growth rate, so that the surface laterally grown from the openings is grown from the nearest opening. There is a disadvantage that defects are generated again at the part where the face meets. According to the existing growth technology of organometallic chemical vapor deposition and hydrogen vapor deposition (HVPE) or other nitride semiconductors, dozens of defect regions repeatedly generated by short opening intervals must be present in the device. This causes a problem of the efficiency of the device.

Patent Document 1: Korea Patent Publication 10-2008-0017056

The present invention is to solve the above-described problems, by growing a semi-polar or non-polar nitride-based semiconductor using hydrogen vapor deposition technology, the openings are formed at intervals of 100 ~ 3100㎛ longer than the length of one side of the unit element An object of the present invention is to provide a nitride semiconductor and a method of manufacturing the same, which are free from defects in the manufacture of nitride semiconductor devices.

In addition, a semi-polar or non-polar nitride semiconductor device, a wafer, and a method of manufacturing the same, which reduce reflection loss and have high light extraction efficiency by utilizing a mask layer widely patterned at intervals of 100 to 3100 μm as a reflector.

In addition, since the bonding force between the growth substrate and the nitride semiconductor grown on the upper side is very weak because the pattern is laterally grown at wide intervals, the device fabrication having a vertical electrode structure is removed by removing the unnecessary growth substrate in the device fabrication. A semipolar or nonpolar nitride semiconductor device, a wafer, and a method of manufacturing the same have high efficiency.

In order to achieve the above object, the semi-polar or non-polar nitride semiconductor device according to the present invention is a substrate, a mask layer forming the openings at intervals of 100 to 3100 μm longer than one side of the unit device, each defect (defect) Semipolar or nonpolar n-type nitride layer with), multiple quantum well layer grown on one side of semipolar or nonpolar n-type nitride layer, semipolar or nonpolar p-type nitride layer grown on top of multiple quantum well layer And an n-electrode formed on the semipolar or nonpolar n-type nitride layer and interposed between the multiple quantum well layers, and a p-electrode formed on one side of the semipolar or nonpolar p-type nitride layer. do.

Furthermore, the semipolar or nonpolar nitride semiconductor wafer according to the present invention comprises a substrate, And a mask layer forming openings at intervals of 100 to 3100 μm longer than one side of the unit element, and a semipolar or nonpolar n-type nitride based layer having defects for each opening.

In the method of manufacturing a semi-polar or non-polar nitride semiconductor device according to the present invention, first, preparing a substrate, depositing a mask layer on the substrate, and then patterning the openings at intervals of 100 to 3100 μm longer than the length of one side of the unit device. Creating, vertically and horizontally growing the semi-polar or non-polar n-type nitride layer through the opening to the top of the mask layer using a hydrogen vapor deposition process, multi-quantum on top of the grown semi-polar or non-polar n-type nitride layer After growing a multi quantum well (MQW) layer, growing a semipolar or nonpolar p-type nitride layer on top of the multi quantum well layer and then exposing a portion of the multi quantum well layer and half to expose a portion of the top of the n-type nitride layer. Etching the polar or non-polar p-type nitride layer, one side of the upper surface of the semi-polar or non-polar n-type nitride layer exposed after etching And generating the n- electrode between the multi-quantum well layer, it characterized in that it includes the step of generating the p- electrode to the upper semi-polar or non-polar one side p-type nitride layer.

Furthermore, in the method for manufacturing a semi-polar or non-polar nitride semiconductor wafer according to the present invention, an opening is formed by preparing a substrate, depositing a mask layer on the substrate, and patterning the pattern at intervals of 100 to 3100 μm longer than one side of the unit device. And vertically and horizontally growing the semipolar or nonpolar n-type nitride based layer through the opening to the mask layer by using a hydrogen vapor deposition process.

The semipolar or nonpolar nitride semiconductor device and wafer fabrication method may further comprise the step of growing a semipolar or nonpolar thin film between the substrate and the mask layer, with the addition of the semipolar or nonpolar nitride semiconductor device structure has a thickness of 1 A thin film layer of ˜100 μm is added. In addition, the method may further include removing the substrate.

As described above, according to the present invention, the mask layer is patterned to form openings having a suitable spacing for device size, and the nitride layer is laterally grown by utilizing the characteristics of different growth rates depending on the crystal plane through the openings. It is possible to maximize the efficiency of the semiconductor device by minimizing defects inside the multi-quantum well.

Further, by using a hydrogen vapor deposition process for growing the nitride film vertically and laterally through the openings, the growth rate of the crystals is improved, and the openings 200 to 3500 μm in width and 10 to 100 μm in length and longer than the length of one side of the unit device are 100 to Patterning at 3100 [mu] m intervals increases the spacing on the side during nitride growth of the nitride layer, minimizing defects in the multiple quantum well layer portions within the semiconductor device.

In addition, the mask layer patterned at wide intervals is used as a reflector to increase the light extraction efficiency of the nitride semiconductor device.

Since the bonding force between the nitride semiconductor and the growth substrate is greatly reduced by the wide mask layer, the internal stress of the nitride semiconductor can be reduced to obtain the characteristics of the device having higher brightness, and the growth substrate can be removed from the nitride semiconductor. There is an advantage that the reliability of the device can be improved by manufacturing a nitride semiconductor device having an electrode.

Furthermore, due to the low bonding force between the nitride semiconductor and the growth substrate, the growth substrate may be more easily removed by applying a natural separation technique, thereby providing a high quality freestanding semipolar or nonpolar nitride semiconductor substrate.

1 is a flow chart illustrating a method of manufacturing a non-polar nitride semiconductor according to a conventional embodiment.
2 is a flowchart and a stereoscopic view illustrating a method of manufacturing a semipolar or nonpolar nitride semiconductor according to an embodiment of the present invention.
3 is a cross-sectional view illustrating a semipolar or nonpolar nitride semiconductor device according to an embodiment of the present invention.
4 is a cross-sectional view illustrating a semipolar or nonpolar nitride semiconductor wafer according to an embodiment of the present invention.
5 is a microscope image and a schematic diagram illustrating a nitride semiconductor growth direction by an opening direction according to an embodiment of the present invention.
FIG. 6 is a diagram illustrating nitride semiconductor SEM images grown horizontally in a semipolar or nonpolar direction and defects and crystallinity of nitride semiconductors according to an exemplary embodiment.
7 is a structural diagram of a semipolar or nonpolar nitride semiconductor device having a vertical electrode structure according to an embodiment of the present invention.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily reproduce the present invention.

1 is a cross-sectional view illustrating a method of manufacturing a non-polar nitride semiconductor according to a conventional embodiment. Growing a nonpolar GaN layer on the substrate as shown, depositing a mask layer on the GaN layer and patterning the gap to 2 ~ 30㎛ to create an opening, GaN layer through the patterned opening at regular intervals Etching, growing the etched GaN layer by reaction with a reaction gas, and horizontally growing the grown GaN layer on the mask layer.

The growth of the nonpolar GaN layer on the substrate and the horizontal growth of the grown GaN layer to the upper part of the mask layer occur through the organometallic chemical vapor deposition process, and the growth rate of the GaN layer in the organometallic chemical vapor deposition process is 1 to 30. Openings with narrow spacing are created with low growth rates at μm / h. Therefore, as shown in (f) of FIG. 1, the openings formed narrower than the size of the semiconductor device have both defects caused by the horizontal growth of the GaN layer and the defects generated by the vertical growth through the openings. .

FIG. 2A is a flowchart illustrating a method of manufacturing a semipolar or nonpolar nitride semiconductor according to an embodiment of the present invention, and FIG. 2B illustrates a mask layer 302 of an n-type nitride based layer 303 through an opening. It is a three-dimensional view illustrating the step (s203) of vertical growth and horizontal growth using a hydrogen vapor deposition process to the upper surface. Preparing the substrate 301 as shown in (s201), the mask layer 302 is deposited on the substrate 301, and then patterned at intervals of 100-3100 μm longer than the length of one side of the unit device to form an opening. Generating step (s202), the semi-polar or non-polar n-type nitride based layer 303 through the opening step to grow vertically and horizontally using a hydrogen vapor deposition process to the upper surface of the mask layer 302 (s203), the grown half The multi-quantum well layer 305 is grown on the polar or nonpolar n-type nitride layer 303, and the semi-polar or nonpolar p-type nitride layer is grown on the multi-quantum well layer, and then the n-type nitride layer is grown on the n-type nitride layer 303. Etching the multiple quantum well layer and a portion of the semipolar or nonpolar p-type nitride layer to expose a portion of the region (s204), one side and the upper surface of the semipolar or nonpolar n-type nitride layer 303 exposed after etching; Proton Between the water layer 305 generates the n- electrode 307, and the upper one side p-type nitride layer (306) comprises a step (s205) of generating the p- electrode 308.

The hydrogen vapor deposition process is performed to horizontally grow the semipolar or nonpolar n-type nitride based layer 303 on the mask layer 302, and further the semipolar or nonpolar n-type nitride based layer 303 and the upper part thereof. The multi quantum well 305 and the semipolar or nonpolar p-type nitride based layer 306 may be grown through an organometallic chemical vapor deposition process. At this time, the semipolar or nonpolar n-type nitride based layer 303 by the organometallic chemical vapor deposition process on the semipolar or nonpolar n-type nitride based layer 303 grown by the hydrogen vapor deposition process is used for improving the crystal quality or improving the surface. Used and may or may not be included in this structure.

Furthermore, after the preparing of the substrate 301 (s201), the method may further include growing a semipolar or nonpolar thin film layer 304 on the substrate 301, and further removing the substrate 301. By including it, a semipolar or nonpolar nitride device having a vertical electrode structure can be manufactured.

The substrate 301 may be removed by either a natural separation method due to thermal stress or a wet etching method of the mask layer 302. A large area of the mask layer 302 between the growth substrate 301 and the grown nitride semiconductor significantly reduces the bonding force between the substrate 301 and the nitride semiconductor, thus separating the growth substrate 301 from the nitride semiconductor. Can be. The removal process of the growth substrate 301 may be performed by wet etching of the mask material, and a laser lift-off (LLO) technique may be applied for a faster process. After the mask material is completely removed, the device structure of the semipolar or nonpolar nitride semiconductor is formed at the bottom of the n-electrode 307 and the semipolar or nonpolar n-type nitride based layer 303, the semipolar or nonpolar n- a multi-quantum well 305 on top of the type nitride layer 303, a semipolar or nonpolar p-type nitride layer 306 on top of the multi quantum well, and a p on top of the semipolar or nonpolar p-type nitride layer 306 The electrode 308 is located. Accordingly, the p-electrode 308 and the n-electrode 307 form a vertical array, and the nitride semiconductor therebetween includes a structure characterized in that it is a portion grown horizontally by the mask layer 302. However, the removal process of the substrate 301 may or may not be included in the manufacturing process of the device.

If the semi-polar or non-polar n-type nitride based layer 303 is grown for a long time and its thickness is increased to 100-2000 μm, it is possible to grow a semi-polar or non-polar nitride semiconductor with significantly improved crystallinity compared to the conventional method. . Since the bonding force of the grown nitride semiconductor and the growth substrate 301 is significantly reduced by the intermediate mask layer 302, a method of manufacturing a self-separating nitride semiconductor wafer using a self-separation technique is also included. Here, the natural separation technique means that the growth substrate 301 is naturally removed from the nitride semiconductor during the temperature drop to room temperature after the growth of the nitride semiconductor and the growth substrate 301 by a large stress. Natural separation is controllable by the size or spacing of the openings inside the mask.

Preparing the substrate 301 (s201) is a step of preparing a substrate 301 for growing a nitride semiconductor of the semi-polar or non-polar side, sapphire and the growth substrate 301 for growing the nitride semiconductor SiC, Si, γ-LiAlO ₂ Or MgAl ₂ O ₄ substrate.

After the deposition of the mask layer 302 on the substrate 301 and patterning the pattern at intervals of 100 to 3100 μm to generate the openings (s202), the gaps between the openings may be formed by a hydrogen vapor deposition process having a high growth rate. It can be produced longer than the length of one side of the device or 100 ~ 3100㎛. The conventional semipolar or nonpolar GaN layer is grown vertically and horizontally using an organometallic chemical vapor deposition process, but the present invention is about 10 to 100 times larger than the organometallic chemical vapor deposition process to vertically and horizontally grow a nitride layer. A fast hydrogen vapor deposition process was used. Due to the rapid growth rate of the hydrogen vapor deposition process, the openings of the mask layer 302 may be patterned at intervals of 100 to 3100 μm wider than those of the conventional 2 to 30 μm. Therefore, the area of the nitride semiconductor grown on the mask has a size larger than one device area.

When the mask layer 302 formed on the substrate 301 is not removed by etching, the nitride-based semiconductor and the substrate 301 are not separated, and light extraction of the nitride semiconductor is performed by using the mask layer 302 as a reflective film. The efficiency can be improved. Since the mask layer 302 is formed to be wider than the opening gap of the mask layer 302 of the general nitride semiconductor, that is, the gap between the openings can be optimized for fabrication of the device, it is possible to reduce the reflection loss when the mask layer 302 is used as the reflective film. Can be.

After depositing the mask layer 302 on the substrate 301 and patterning at intervals of 100 to 3100 μm to create an opening (s202), a semipolar or nonpolar nitride layer directly on the substrate 301 may be included. In the growing step, the nitride layer is grown by reacting at least one of NH ₃ , HCl gas and Ga, Al, or In in an H ₂ or N ₂ atmosphere chamber at 800 to 1100 ° C. for 10 to 30 minutes.

Vertically growing and horizontally growing the semi-polar or nonpolar n-type nitride based layer 303 horizontally grown through the opening to the upper surface of the mask layer 302 by using a hydrogen vapor deposition process (s203) may be performed in an H ₂ or N ₂ atmosphere. In the chamber, at least one of NH ₃ , HCl gas and Ga, Al, or In reacts with each other to vertically and horizontally grow the nitride layer through the openings, and vertical and horizontal growths occur simultaneously. In the organometallic chemical vapor deposition process, vertical growth and horizontal growth occur at the same time, but the hydrogen vapor deposition process has a relatively high growth rate and horizontal growth speed up to 5 times faster than vertical growth. The lateral growth rate of the semipolar or nonpolar nitride semiconductor in the hydrogen vapor deposition process is 30 to 200 µm / h.

Further, the horizontally grown semi-polar or non-polar n-type nitride based layer 303 is grown horizontally in the N-face direction and the Ga-face direction on the mask layer 302, but the growth rate of the nitride based layer is N in the Ga-face direction. Since it is 2 to 20 times faster than the -face direction, the nitride based layer grown from the opening in the Ga-face direction becomes a large area without defects.

3 is a cross-sectional view illustrating a semipolar or nonpolar nitride semiconductor device according to an embodiment of the present invention. 3A illustrates a structure in which a mask layer 302 is deposited on a substrate 301, and FIG. 3B illustrates a semipolar or nonpolar thin film layer 304 between the substrate 301 and the mask layer 302. It is a structure that grew. As shown, the substrate 301, the mask layer 302 forming openings at intervals of 100 to 3100 μm longer than one side of the unit element, and a semipolar or nonpolar n-type having defects in each opening. Nitride-based layer 303, a multipolar quantum well layer 305 grown on one side of the semi-polar or non-polar n-type nitride-based layer 303, semi-polar or nonpolar p-type grown on the multi-quantum well layer 305 N-electrode 307, semi-polar or non-polar p-type nitride layer formed on top of nitride layer 306, semipolar or nonpolar n-type nitride layer 303, and between the multiple quantum well layers 305 306 is a cross-sectional view of a nitride semiconductor device composed of a p-electrode 308 formed on one side of the top.

4 is a cross-sectional view illustrating a semipolar or nonpolar nitride semiconductor wafer according to an embodiment of the present invention. As shown in FIG. 4 (a), the substrate 301, the mask layer 302 forming the openings at intervals of 100 to 3100 μm, and the horizontal growth of a wide area having defects in the openings but having minimum defects A cross-sectional view of a nitride semiconductor composed of a semipolar or nonpolar n-type nitride based layer 303, and FIG. 4B shows a substrate 301, a semipolar or nonpolar thin film layer 304 having a thickness of 1 to 100 µm, and 100. A cross-sectional view of a nitride semiconductor composed of a mask layer 302 forming openings at intervals of ˜3100 μm, and a horizontally grown semi-polar or non-polar n-type nitride based layer 303 having a defect in the opening portion but with a minimum of defects. to be. 4C is a cross-sectional view illustrating a nitride semiconductor wafer by a conventional LEO process. The growth of the nitride semiconductor by the conventional narrow gap LEO process has a high probability of generating defects in two crystal planes which are grown from the defect region of the opening and the closest opening.

The mask layer 302 forming the openings at intervals of 100 to 3100 μm has a multilayer structure of at least one of a composite material or a multilayer of SiO ₂ , Si ₃ N ₄ , TiO ₂ , SiN, Al ₂ O ₃ , and Ta ₂ O ₃ . Is formed. In addition, the mask layer 302 material may be formed of one of Ag, Al, or Pt, in which Ag, Al, and Pt are used as a reflective film by patterning the metal material wider than a conventional nitride semiconductor mask layer 302. It is a material having a high reflectivity for increasing the reflectance of the mask layer 302. Therefore, when the mask layer 302 is deposited from Ag, Al, or Pt metal material, it may be formed of a composite material of any one of SiO ₂ , Si ₃ N ₄ , TiO ₂ , SiN, Al ₂ O _3, or Ta ₂ O ₃ . The light extraction efficiency can be increased more than ever. In addition, SiO ₂ , Si ₃ N ₄ , TiO ₂ , SiN, Al ₂ O _{3 ,} Ta ₂ O ₃ and the like, Ag, Al, Pt may be utilized as a composite material or a laminated structure of two or more materials.

Furthermore, although the openings generated by patterning the mask layer 302 may be generated in various shapes, in the present invention, a mask layer having a length of 200 to 3500 μm, a width of 10 to 100 μm, and an interval between the openings is 100 to 3100 μm. (302) It is preferable that the nitride-based layer formed on top is formed in a rectangular shape long in the direction perpendicular to the fastest crystal growth direction.

The horizontally grown semipolar or nonpolar n-type nitride based layer 303 having defects in each opening vertically and horizontally grows the nitride based layer using a hydrogen vapor deposition process. The thickness of the semi-polar or non-polar n-type nitride based layer 303 grown horizontally is 5 ~ 500㎛.

Furthermore, when the nitride layer grown vertically to the upper surface of the mask layer 302 is horizontally grown on the mask layer 302, the nitride layer grows at a speed of 2 to 20 times faster in the Ga-face direction than in the N-face direction. At this time, the nitride-based layer grown in the Ga-face direction and the nitride-based layer grown in the N-face direction from the closest opening are bonded to the nitride-based layer growing horizontally to generate a defect. In a typical LEO process, defects exist in the nitride semiconductor device due to a short gap between the openings. However, in the present invention, defects in the nitride semiconductor device are minimized because the gap between the openings is greater than or equal to that of the nitride semiconductor device.

A wide-area horizontally grown semipolar or nonpolar n-type nitride based layer 303 having defects in the openings but with minimal defects may be formed of any one of GaN, AlN, InN, AlGaN, InGaN, or two or more composite materials. It contains a multilayer structure.

4C illustrates a defect generated by contacting a defect included in a GaN layer vertically grown from an opening in a nitride semiconductor device with a narrow patterning interval of the mask layer 302, and a GaN layer grown horizontally from the closest opening. In addition, there are many areas containing defects than (a) and (b) of FIG. 4 and are not suitable for device fabrication.

The structure (a) or (b) of FIG. 4 described in the present embodiment maximizes the lateral growth to protect the quantum well layer 305, which is the most susceptible to defects, to maximize the efficiency of the device. It has a big advantage. Therefore, the application of the semipolar or nonpolar n-type nitride semiconductor in which the lateral growth is maximized by the hydrogen vapor deposition process according to the present invention is various. In particular, using a semi-polar or non-polar n-type nitride semiconductor, which has maximized lateral growth by hydrogen vapor deposition, as a substrate, it is the most useful organometallic chemical vapor deposition method for the manufacture of nitride semiconductor devices. The more efficient device can be realized through the growth of 305 and the semi-polar or non-polar p-type nitride based layer 306. In this case, the thickness of the semipolar or nonpolar nitride semiconductor that is laterally grown by the hydrogen vapor deposition process is preferably 10 to 500 μm on the growth substrate 301.

Furthermore, the mask layer 302 of a wide area existing between the growth substrate 301 and the grown nitride semiconductor suggests a method of controlling the bonding force between the growth substrate 301 and the nitride semiconductor. By controlling such bonding force, there is an advantage in that the growth substrate 301 can be easily separated from the nitride semiconductor. This separation provides in particular a method by which a nitride semiconductor device having a vertical electrode structure or a freestanding semipolar or nonpolar nitride semiconductor wafer can be manufactured.

5 is a microscope image and a schematic diagram illustrating a nitride semiconductor growth direction by an opening direction according to an embodiment of the present invention. As shown, (a) of FIG. 5 is an SEM image of the nitride semiconductor element along the direction of the opening. GaN < 0001 > direction rotated by 45 DEG from GaN < 0001 > direction and GaN < 1010 > 5B is a schematic diagram of GaN growth direction along the direction of the opening. On the left is a schematic diagram of the growth direction of GaN grown on the opening when the direction of the opening is parallel to the GaN <0001> direction, and on the right is the growth direction of GaN grown on the opening when the opening direction is perpendicular to the GaN <0001> direction. Schematic diagram.

When the direction of the opening is formed long in parallel with the GaN <0001> direction, the GaN crystal grows in a triangular shape, which is not suitable for device fabrication.

When the direction of the opening is generated in a direction rotated by 45 ° from the GaN <0001> direction, the surface state is improved than the GaN <0001> direction, but the growth rate is insufficient on the side.

When the opening is formed to be perpendicular to the GaN <0001> direction in the direction of the GaN <1010>, the opening is formed perpendicular to the GaN <0001> direction so that the GaN horizontally grown on the opening through the opening has a horizontal growth rate. Grows in the fastest Ga-face direction and the surface state is suitable for device fabrication. You can see the result of growing from 150 to 300㎛ width from one opening. In this case, compared to the direction in which the openings are rotated by 45 ° in the GaN <0001> and GaN <0001> directions, GaN having less defect density and having a size suitable for device fabrication can be formed.

FIG. 6 is a diagram illustrating nitride semiconductor SEM images grown horizontally in a semipolar or nonpolar direction and defects and crystallinity of nitride semiconductors according to an exemplary embodiment.

As shown, (a) is a SEM image of a horizontally grown GaN layer, and (b) is data of defects and crystallinity in the N-face direction and the Ga-face direction around the opening. The C position is an opening, A and B are in the Ga-face direction, and D and E are in the N-face direction.

In FIG. 6B, the intensity of partial dislocation related emission (I _PDE ) is a light emission position of 3.28 eV at room temperature, and as the number of defects increases, the intensity of light emission increases to increase the I _PDE value. In addition, I have _FEE (Intensity of Free Excition Emission) is better the crystallinity of a light emission position of 3.43eV at room temperature, the emission intensity is increased even large I _FEE value.

The point D in the direction of the opening C and the N-face located close to the opening has a large value of I _PDE / I _FEE , indicating that the value of I _PDE is larger than the value of I _FEE , which causes GaN to grow vertically through the opening. It can be seen that the layer contains many defects. In addition, the points A and B present in the Ga-face direction from the openings have a small I _PDE / I _FEE value, indicating that the I _FEE value is large. It can be judged that it is small and has good crystallinity.

7 relates to a method of manufacturing a semi-polar or non-polar nitride device having a vertical electrode structure through the present invention according to an embodiment of the present invention. As shown in FIG. 2, a multi quantum well (MQW) layer 305 is grown on the semi-polar or non-polar n-type nitride based layer 303 grown as described above, and on the multi quantum well layer 305. After the semi-polar or non-polar p-type nitride based layer 306 is grown, the p-electrode 308 is formed on the semi-polar or non-polar p-type nitride based layer 306, and the removal and mask of the growth substrate 301 is performed. If the n-electrode 307 structure is formed under the semipolar or nonpolar n-type nitride based layer 303 through the removal of the layer 302, the p-electrode 308 and the n-electrode 307 have a vertical structure. And improve the reliability of the device. In this case, the growth substrate 301 may be removed by wet etching the mask layer 302 or by using a faster laser lift-off (LLO) method. If a semipolar or nonpolar thin film is present under the mask layer 302, a wet etching method may be used. If the separated region of the manufactured device and the device is an opening region, which is a region where defects of the mask layer 302 are many, it is possible to manufacture a device without defects.

Thus, after the growth substrate 301 and the mask layer 302 are removed, the structure of the present invention is that the p-electrode 308 and the n-electrode 307 form a vertical array with a nitride semiconductor multi-quantum well layer 305 therebetween. The entire portion includes a structure characterized in that the portion is horizontally grown by the mask layer 302.

Furthermore, the present invention provides a method for producing a semipolar or nonpolar freestanding nitride semiconductor wafer. In the growth of the semi-polar or non-polar n-type nitride layer 303 through the vertical and horizontal growth of hydrogen vapor deposition according to the present invention, the growth time is extended to a thickness of about 100 to 3100 μm, semi-polar or non-polar n-type When the nitride-based layer 303 is grown and the gap and size of the openings are controlled to control the bonding force between the growth substrate 301 and the grown nitride semiconductor, the growth substrate 301 may be removed to manufacture a free-standing nitride semiconductor wafer. Can be. In this case, the growth substrate 301 may be naturally removed in the process of lowering the temperature after the growth to room temperature by the internal stress of the nitride semiconductor and the growth substrate 301. Alternatively, the growth substrate 301 may be removed by wet etching the mask layer 302. Therefore, controlling the bonding force of the semipolar or nonpolar nitride semiconductor and the growth substrate 301 by the mask layer 302 of a wider area or the opening of the wider area is the core of the method of manufacturing a self-supporting nitride semiconductor wafer. Can be. Compared with the conventional method, the side growth is wider, and thus, there is a big advantage that a self-supporting semipolar or nonpolar wafer can be manufactured with significantly less defects.

While the invention has been described with reference to the preferred embodiments, which are referenced by the accompanying drawings, it is apparent that various modifications are possible without departing from the scope of the invention within the scope covered by the claims that follow from this disclosure. .

101: substrate
102: GaN layer
103: mask layer
104: Vertically and Horizontally Grown GaN Layers
301: substrate
302: mask layer
303: n-type nitride layer
304: thin film layer
305: multiple quantum well layer
306: p-type nitride layer
307: n-electrode
308: p-electrode

Claims (23)

Preparing a substrate;
Depositing a mask layer on the substrate and patterning the mask layer at intervals of 100 to 3100 μm longer than a length of one side of a unit device to generate an opening;
Vertically and horizontally growing a semipolar or nonpolar n-type nitride based layer through the opening to a top surface of the mask layer by using a hydrogen vapor deposition process;
After growing a multi quantum well (MQW) layer on the grown semi-polar or non-polar n-type nitride layer, and growing a semi-polar or non-polar p-type nitride layer on the multi quantum well layer, Etching the multi-quantum well layer and the semipolar or nonpolar p-type nitride based layer to expose a portion of the upper portion of the n-type nitride based layer above the opening; And
An n-electrode is formed between one side of the semipolar or nonpolar n-type nitride based layer and the multiple quantum well layer exposed after the etching, and a p-electrode is formed on one side of the upper of the semipolar or nonpolar p-type nitride based layer. Generating;
Semi-polar or non-polar nitride semiconductor device manufacturing method comprising a. Preparing a substrate;
Growing a semipolar or nonpolar thin film on the substrate;
Depositing a mask layer on the thin film layer and patterning the mask layer at intervals of 100 to 3100 μm longer than one side of a unit device to generate an opening;
Vertically and horizontally growing a semipolar or nonpolar n-type nitride based layer through the opening to a top surface of the mask layer by using a hydrogen vapor deposition process;
After growing a multi quantum well (MQW) layer on the grown semi-polar or non-polar n-type nitride layer, and growing a semi-polar or non-polar p-type nitride layer on the multi quantum well layer, Etching the multi-quantum well layer and the semipolar or nonpolar p-type nitride based layer to expose a portion of the upper portion of the n-type nitride based layer above the opening; And
An n-electrode is formed between one side of the semipolar or nonpolar n-type nitride based layer and the multiple quantum well layer exposed after the etching, and a p-electrode is formed on one side of the upper of the semipolar or nonpolar p-type nitride based layer. Generating;
Semi-polar or non-polar nitride semiconductor device manufacturing method comprising a. The method of claim 2, wherein the growing of the semi-polar or non-polar thin film on the substrate,
Semipolar or nonpolar nitride semiconductor device characterized by growing by reacting any one or more of NH ₃ , HCl gas and Ga, Al or In in H ₂ or N ₂ atmosphere chamber at 800 ~ 1100 ℃ temperature 10 ~ 30 minutes Manufacturing method. The method of claim 1, wherein the semi- or non-polar n-type nitride based layer is vertically and horizontally grown using a hydrogen vapor deposition process through the opening to the upper surface of the mask layer.
In a H ₂ or N ₂ atmosphere chamber, a nitride-based material reacted with at least one of NH ₃ , HCl gas and Ga, Al, or In is vertically grown through the opening, and then horizontally grown in the direction of the crystal plane with the fastest growth rate. A method for producing a semipolar or nonpolar nitride semiconductor device, characterized in that. The method of claim 1, wherein the semi- or non-polar n-type nitride based layer is vertically and horizontally grown using a hydrogen vapor deposition process through the opening to the upper surface of the mask layer.
The growth rate of the hydrogen vapor deposition process is 30 ~ 200㎛ / h, the semi-polar or non-polar nitride semiconductor device manufacturing method characterized in that the growth in the Ga-face direction of the side. The method of claim 1, wherein the semi- or non-polar n-type nitride based layer is vertically and horizontally grown using a hydrogen vapor deposition process through the opening to the upper surface of the mask layer.
A method of manufacturing a semi-polar or non-polar nitride semiconductor device, characterized in that the area of the nitride semiconductor grown on the mask is at least one device area. The method of manufacturing the semipolar or nonpolar nitride semiconductor device according to any one of claims 1 to 2,
Removing the substrate;
Semi-polar or non-polar nitride semiconductor device manufacturing method further comprising. Preparing a substrate;
Depositing a mask layer on the substrate and patterning the mask layer at intervals of 100 to 3100 μm longer than a length of one side of a unit device to generate an opening; And
Vertically and horizontally growing a semipolar or nonpolar n-type nitride based layer through the opening to a top surface of the mask layer by using a hydrogen vapor deposition process;
Semi-polar or non-polar nitride semiconductor wafer manufacturing method comprising a. The method of claim 8, wherein the semipolar or nonpolar nitride semiconductor wafer is manufactured by:
Growing a semipolar or nonpolar thin film on the substrate; And
Removing the substrate;
Semi-polar or non-polar nitride semiconductor wafer manufacturing method further comprising. The method of claim 9, wherein removing the substrate comprises:
A method of manufacturing a semi-polar or non-polar nitride semiconductor wafer, characterized in that it is a natural separation method by thermal stress or a wet etching method of the mask layer. Board;
A mask layer forming openings at intervals of 100 to 3100 μm longer than the length of one side of the unit element;
A semipolar or nonpolar n-type nitride based layer having a defect in each of the openings;
A multi-quantum well layer grown on one side of the semipolar or nonpolar n-type nitride based layer;
A semipolar or nonpolar p-type nitride based layer grown on the multi-quantum well layer;
An n-electrode formed on the semipolar or nonpolar n-type nitride based layer and above the opening between the multiple quantum well layers; And
A p-electrode formed on one side of the semipolar or nonpolar p-type nitride based layer;
Semi-polar or non-polar nitride semiconductor device comprising a. Board;
A thin film layer grown on the substrate and having a thickness of 1 to 100 μm;
A mask layer forming openings at intervals of 100 to 3100 μm longer than the length of one side of the unit element;
A semipolar or nonpolar n-type nitride based layer having a defect in each of the openings;
A multi-quantum well layer grown on one side of the semipolar or nonpolar n-type nitride based layer;
A semipolar or nonpolar p-type nitride based layer grown on the multi-quantum well layer;
An n-electrode formed on the semipolar or nonpolar n-type nitride based layer and above the opening between the multiple quantum well layers; And
A p-electrode formed on one side of the semipolar or nonpolar p-type nitride based layer;
Semi-polar or non-polar nitride semiconductor device comprising a. A semipolar or nonpolar n-type nitride based layer having a defect for each opening formed at an interval of 100 to 3100 μm;
A multi-quantum well layer grown on one side of the semipolar or nonpolar n-type nitride based layer;
A semipolar or nonpolar p-type nitride based layer grown on the multi-quantum well layer;
An n-electrode formed above the opening of one lower surface of the semipolar or nonpolar n-type nitride based layer; And
A p-electrode formed between the openings on one side of the upper portion of the semipolar or nonpolar p-type nitride layer;
Semi-polar or non-polar nitride semiconductor device comprising a. A thin film layer having a thickness of 1 to 100 μm;
A mask layer forming openings at intervals of 100 to 3100 μm longer than the length of one side of the unit element;
A semipolar or nonpolar n-type nitride based layer having a defect in each of the openings;
A multi-quantum well layer grown on one side of the semipolar or nonpolar n-type nitride based layer;
A semipolar or nonpolar p-type nitride based layer grown on the multi-quantum well layer;
An n-electrode formed on one side of the lower portion of the semipolar or nonpolar n-type nitride layer; And
A p-electrode formed on one side of the semipolar or nonpolar p-type nitride based layer;
Semi-polar or non-polar nitride semiconductor device comprising a. The substrate according to any one of claims 11 to 12, wherein
A semi-polar or non-polar nitride semiconductor device comprising any one of sapphire substrate, Si or SiC substrate. The substrate according to any one of claims 11 to 12, wherein
A semipolar or nonpolar nitride semiconductor device comprising any one of a γ-LiAlO ₂ or MgAl ₂ O ₄ substrate having a {100} plane. The method according to any one of claims 11 to 14, wherein the mask layer,
A semi-polar or non-polar nitride semiconductor device, characterized in that formed of a material having a complex laminated structure with any one of SiO ₂ , Si ₃ N ₄ , TiO ₂ , SiN, Al ₂ O _3, or Ta ₂ O ₃ . The method according to any one of claims 11 to 14, wherein the mask layer,
A semi-polar or non-polar nitride semiconductor device, characterized in that formed of a metal material of any one of Ag, Al, or Pt. The opening of the mask layer according to any one of claims 11 to 14,
A semipolar or nonpolar nitride semiconductor device, characterized in that the length is 200-3500 µm, the width is 10-100 µm, and the interval is 100-3100 µm longer than the length of one side of the unit element. The method according to any one of claims 11 to 14, wherein the semipolar or nonpolar n-type nitride layer,
A semi-polar or non-polar nitride semiconductor device, characterized in that the thickness of the semi-polar or non-polar n-type nitride based layer grown horizontally is 5 ~ 500㎛. The method according to any one of claims 11 to 14, wherein the semipolar or nonpolar n-type nitride layer or the semipolar or nonpolar p-type nitride layer is
A semipolar or nonpolar nitride semiconductor device comprising any one or more of GaN, AlN, InN, AlGaN, InGaN. Board;
A mask layer forming openings at intervals of 100 to 3100 μm longer than the length of one side of the unit element; And
A semipolar or nonpolar n-type nitride based layer having a defect in each of the openings;
Semi-polar or non-polar nitride semiconductor wafer comprising a. Board;
A thin film layer grown on the substrate and having a thickness of 1 to 100 μm;
A mask layer forming openings at intervals of 100 to 3100 μm longer than the length of one side of the unit element; And
A semipolar or nonpolar n-type nitride based layer having a defect in each of the openings;
Semi-polar or non-polar nitride semiconductor wafer comprising a.

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