KR101218658B1 - Encoing and decoding method using irregular repeat multiple state accumulate code - Google Patents

Abstract

PURPOSE: An encoding and decoding method using an irregularity multiple state accumulate code is provided to improve a calculation speed by providing error correction performance more improved a former coding method through an IRmA(Irregular Repeat multiple state Accumulate) code. CONSTITUTION: An encoder interleaves order of information bits repeated plural times(S110). The encoder initializes an encoding state(S120). The encoder initializes the encoding state every time an information bit line is encoded. The encoder selects partial information bits among the interleaved information bits(S130). The encoder changes the encoding state according to the selected information bits(S140). The encoder determines parity bits based on the changed information bits(S150). The encoder generates a code word based on the parity bits and the information bit line(S160). [Reference numerals] (AA) Start; (BB) End; (CC) Inputting all selected information bits?; (DD) Satisfied with the number of repetitions?; (S110) Repeating an information bit line and mixing a sequence; (S120) Initializing an encoding state; (S130) Selecting a part of the information bits among mixed information bits; (S142) Inputting one of the information bits among the selected information bits; (S144) Changing the encoding state according to the input bit; (S150) Determining parity bits according to the changed encoding state; (S160) Generating a code word based on the parity bits and the information bit line

Description

ENCOING AND DECODING METHOD USING IRREGULAR REPEAT MULTIPLE STATE ACCUMULATE CODE}

The disclosed technology relates to a method of encoding and decoding data, and more particularly, without limitation, an encoding method and a decoding method using an Irregular Repeat Multiple State Accumulate Code (hereinafter referred to as IRmA code). The IRmA code proposed in the present specification can speed up encoding and decoding operations, and improve error correction performance. Although the technology disclosed herein can be applied to various ranges, it can be utilized to improve the operation speed through parallel processes and to efficiently use storage space, especially in a communication terminal having an enhanced processor.

In communication, encoding is generally used to recover original data at the receiving end despite errors caused by distortion, loss, or the like of the data transmitted from the transmitting side through the communication channel. It means the process of processing the data in the sender to make sure that it is. This is called channel coding, which is distinguished from source coding that reduces the size of original data to facilitate transmission and storage. Decoding is a process of restoring the encoded and transmitted signal to the original data at the receiving side. To encode is usually to make an information sequence of length K (information bits) into a code of length N. In wireless LAN or mobile communication where signal transmission path is unstable, code length N is made significantly larger than information sequence length K. That is, the data to be transmitted is repeatedly repeated in the coded code. In two-way communication, if a receiving side fails to recover data in transmitting data including an information sequence, the transmitting side transmits the data again. Since repetitive transmission of such data causes a drop in transmission speed, channel coding techniques for reducing such repetitive transmission have been studied.

Channel coding is roughly divided into block codes and convolution codes. The block code generates K bits of data sequences into N bits of output codes. The convolution code is a method of using some signals from the past with the current input signal when coding. Turbo codes are further developed through parallel coding and interleaving based on convolutional codes. Turbo codes are one of error correction codes (ECC) based on the idea of keeping the bit error probability of a communication channel to a minimum. The turbo code, proposed by Berrou et al. In 1993, has a relatively simple structure and provides very good error correction performance, and has been applied to a communication system requiring a high performance error correction code method.

Recently, low-density parity-check (LDPC) codes have been applied to communication systems. The LDPC code makes an information sequence of length K a codeword of length N. A parity bit having a length of (NK) excluding an information sequence among codewords may be generated using a parity-check matrix H. The parity check matrix H is (NK) x N in size and has a low density property with more zeros than one. In the encoding method using the LDPC code, how to make the parity check matrix H is the most important factor. Typically, irregular LDPC codes provide better performance than regular LDPC codes. Regular here means that all rows of parity check matrix H used for LDPC code have the same number of 1s and all columns of H have the same number of 1s, otherwise LDPC code Is considered to be irregular. Here the number of 1s in a row or column is referred to as the weight of the row or column. Irregular low-density parity-check (LDPC) codes with block lengths greater than 10 ⁴ have been shown to perform better than turbo codes.

However, since the parity check matrix H has a size of about 1000 × 2000 or more, many operations are required in the encoding and decoding process, implementation is very complicated, and requires a lot of storage space. In other words, as the size of the data block increases, the error correction capability of the LDPC becomes stronger, but there is a problem that the amount of computation and processing space required by the processor also increase. As a technique for solving such a problem, Korean Patent Laid-Open Publication No. 10-2007-0058438 (Encoding, Decoding Method and Apparatus Using Low Density Parity Check Code in a Wireless Communication System).

The technical problem to be achieved by the disclosed technology is to provide an encoding method and a decoding method that can improve the operation speed and performance. In addition, since the operation processing speed can be increased by using the parallel operation, the disclosed technology provides a code suitable for parallel operation.

In order to achieve the above technical problem, a first aspect of the disclosed technology comprises: (a) repeating each information bit included in an information bit string a plurality of times, and mixing the order of the repeated information bits; (b) initializing a coding state; (c) changing the encoding state according to some selected plurality of information bits of the interleaved information bits; (d) determining parity bits based on the encoding state; (e) repeating steps (c) and (d) at least once by selecting a plurality of previously unselected information bits among the mixed information bits; And (f) generating a codeword based on the information bit string and the parity bits determined in step (d).

A second aspect of the disclosed technology to achieve the above technical problem is a repeating unit for repeating the information bit string a plurality of times; An interleaver for mixing the information bits repeated the plurality of times; An initialization unit for initializing an encoding state; A polyphase-accumulated coder for selecting some of the information bits provided from the interleaver, changing the encoding state according to the selected information bits, and repeating the process of determining parity bits based on the encoding state; And a codeword generator that generates a codeword based on the parity bits provided from the information bit string and the polyphase-accumulated coder.

A third aspect of the disclosed technology to achieve the above technical problem comprises the steps of: (a) receiving an encoded signal comprising information bits and parity bits; (b) grouping coded bits included in the coded signal into G (G is an integer of 2 or more) groups; (c) for each bit of the encoded bits, each bit is based on the likelihood (hereinafter, the value of the first message) of each bit provided from a plurality of groups containing each bit. Estimating the likelihood (hereinafter, the value of a second message) of each bit provided to the plurality of groups; (d) updating the values of the first message based on the values of the second message provided by the G groups by using a two-dimensional BCJR algorithm based on a trellis representing an encoding state transition. Providing to; (e) repeating steps (c) and (d); And (f) determining the value of each bit according to the likelihood of each bit estimated based on the values of the first message updated in the last iteration.

Embodiments of the disclosed technique may have effects that include the following advantages. It should be understood, however, that the scope of the disclosed technology is not to be construed as limited thereby, since the embodiments of the disclosed technology are not meant to include all such embodiments.

IRmA code according to an embodiment of the disclosed technology has an advantage that the operation speed is faster while improving the error correction performance than the conventional coding scheme (eg, IRA code). In addition, the encoding or decoding method using the IRmA code has the advantage that the storage space required is smaller than the conventional, and parallel processing is easy to be advantageous in the hardware implementation.

1 is a flowchart illustrating a method of encoding by an encoder using an IRmA code, according to an embodiment of the disclosed technology.
2 is a diagram for describing a process of changing an encoding state and a process of determining parity bits according to an embodiment of the disclosed technology.
3 is a block diagram illustrating an encoder for encoding an information bit string provided using an IRmA code, according to an embodiment of the disclosed technology.
4 is a block diagram for describing in detail the polyphase-accumulated coder 340 of FIG. 3.
5 is a view for explaining the state change unit 420 of FIG.
6 is a flowchart illustrating a method of decoding using an IRmA code, according to an embodiment of the disclosed technology.
7 is a flowchart for describing in detail an operation S640 according to an embodiment of the disclosed technology.
FIG. 8 is a simplified representation of the trellis of FIG. 2.

The description of the disclosed technique is merely an example for structural or functional explanation and the scope of the disclosed technology should not be construed as being limited by the embodiments described in the text. That is, the embodiments may be variously modified and may have various forms, and thus the scope of the disclosed technology should be understood to include equivalents capable of realizing the technical idea.

Meanwhile, the meaning of the terms described in the present application should be understood as follows.

The terms " first ", " second ", and the like are used to distinguish one element from another and should not be limited by these terms. For example, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component.

It is to be understood that when an element is referred to as being "connected" to another element, it may be directly connected to the other element, but there may be other elements in between. On the other hand, when an element is referred to as being "directly connected" to another element, it should be understood that there are no other elements in between. On the other hand, other expressions describing the relationship between the components, such as "between" and "immediately between" or "neighboring to" and "directly neighboring to", should be interpreted as well.

Singular expressions should be understood to include plural expressions unless the context clearly indicates otherwise, and terms such as "include" or "have" refer to features, numbers, steps, operations, components, parts, or parts thereof described. It is to be understood that the combination is intended to be present, but not to exclude in advance the possibility of the presence or addition of one or more other features or numbers, steps, operations, components, parts or combinations thereof.

Each step may occur differently from the stated order unless the context clearly dictates the specific order. That is, each step may occur in the same order as described, may be performed substantially concurrently, or may be performed in reverse order.

All terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the disclosed technology belongs, unless otherwise defined. Terms such as those defined in the commonly used dictionaries should be construed as consistent with the meanings in the context of the related art, and should not be construed as having ideal or overly formal meanings unless expressly defined in this application. .

Conventional encoding and decoding methods have a variety of problems, such as a lot of operations, implementation is very complicated, and requires a lot of storage space. Irregular-Repeat-Accumulate (IRA) codes are classified as turbo codes or LDPC codes and are relatively simple but show performance close to capacity limits. Irregular Repeated Accumulation (IRA) codes are somewhat inferior to irregular LDPC codes, but have the advantage of simple coding. However, even when using IRA code, there is still a problem that the operation is complicated if the block size is very large. Accordingly, there is a need for a new error correction code that can improve the operation speed and error correction performance as compared to the conventional encoding and decoding methods. The disclosed technology proposes an encoding method using an IRmA code as an encoding method that exhibits improved error correction performance than a conventional IRA code and has a faster operation speed and easier parallel processing. In addition, the disclosed technique newly proposes a decoding method using a two-dimensional BCJR algorithm as a method of decoding a code according to the newly proposed coding scheme.

1 is a flowchart illustrating a method of encoding by an encoder using an IRmA code, according to an embodiment of the disclosed technology. According to the disclosed technique, an encoder generates an information bit block from an information bit string b _k using an Irregular Repetition (IR) code, and then uses a multiple state accumulate (mA) code. To generate a codeword having the parity bits b _p added to the information bit string b _k from the information bit block. Hereinafter, a method of encoding one information bit string b _k will be described with reference to FIG. 1.

이다. 여기서, K는 정보 비트열 b _k 의 길이이다. 부호기는 정보 비트 블록의 정보 비트들의 순서를 섞는다. In step S110, the encoder repeats each information bit included in the information bit string a plurality of times, and shuffles the information bits repeated a plurality of times. The number of times q (j) of repetition of each information bit b _j included in the information bit string may vary irregularly for each bit. The information bits repeated a plurality of times constitute one information bit block. In this case, the length L of the information bit block is

to be. Here, K is the length of the information bit string b _k . The encoder mixes the order of the information bits of the information bit block.

In step S120, the encoder initializes the encoding state. According to an embodiment, the encoder may initialize the encoding state every time one information bit block, that is, one information bit string is encoded. As an example, the encoder may initialize the coding state to zero state.

In step S130, the encoder selects some of the information bits of the interleaved information bits. The encoder repeats steps S130 to S150 a predetermined number of times (hereinafter, referred to as G times), and for each iteration, selects previously unselected information bits among the mixed information bits of the information bit block. The number of information bits selected in the i th iteration of the G iterations is called K _i . According to an embodiment, the encoder divides the L information bits constituting the information bit group into G groups, and then selects the information bits included in any one of the divided groups as the some information bits. . The number of information bits included in the i th group G _i becomes K _i . In one example, at each iteration, the encoder may select some information bits in a manner that sequentially selects one of the G groups.

In step S140, the encoder changes the encoding state according to the selected plurality of information bits. The encoder changes the coding state each time the selected information bits are input one by one. According to an embodiment, the encoder may change an encoding state while repeating steps S142 and S144.

In step S142, the encoder receives one of the plurality of information bits that have not been previously input. The encoding state is changed from the current state to the next state according to the bit received in step S144. The encoder repeats steps S142 and S144 until all selected bits are input. That is, in step S140 performed at the i th time, the encoder repeats steps S142 and S144 K _i times.

The number of states that an encoding state can have is N _s . The current state is determined as one of N _s states based on previously input bits. The current state is initialized, for example, to state 0 on the first iteration of the first group, and on subsequent iterations the state changed from the previous iteration becomes the current state. The next state is determined by the current state and the currently input bit. The next state becomes one of the two states corresponding to the current state, which is determined according to the currently input bit. According to an embodiment, when N _s is 4, a process of changing an encoding state according to input bits is illustrated in FIG. 2. In the embodiment of FIG. 2, when the current state is state 0 (S = 0), the next state may be state 0 or state 2 (S = 0 or S = 2). If state 0 and the input bit is 1, the next state is state 2. That is, according to the current state, there are two states that can be the next state, and the encoder transitions to one state determined according to a bit received from the two states corresponding to the current state.

When the current state (S _k ) and the next state (state at k + 1 iteration, S _{k +1} ) of the k iterations of K _i iterations are expressed as in Equation 1, between the current state and the next state According to an embodiment, a relationship such as Equation 2 or Equation 3 may be established.

When the value of S _k is represented by N bits, d _{N -1, k} represents the most significant bit of the N bits, and d _{0, k} represents the least significant bit of the N bits. Similarly, when the value of S _{k +1} is represented by N bits, d _{N −1, k + 1} represents the most significant bit of the N bits, and d _{0 , k + 1} represents the least significant bit of the N bits.

는 배타적 논리합(exclusive OR, XOR) 연산을 의미하고, d_k 는 d_{0 ,k} 내지 d_{N -1,k}중 선택되는 적어도 하나의 비트를 XOR 연산한 결과 값을 나타낸다. 일례로, d_k 는 d_{0 ,k} 내지 d_{N -1,k} 비트들을 모두 XOR 연산한 결과일 수 있으며, 다른 일례로, d_k 는 d_{0 ,k} 내지 d_{N -1,k} 비트들 중 d_{0 ,k}, d_{2 ,k} 등 홀수 번째 비트들을 XOR 연산한 결과일 수 있다.i _k is the information bit received in the k th iteration,

Means an exclusive OR (XOR) operation, and d _k Represents a result of performing an XOR operation on at least one bit selected from d _{0 , k} to d _{N -1, k} . For example, d _k May be the result of performing an XOR operation on all of d _{0 , k} to d _{N −1, k} bits. As another example, d _k May be the result of performing an XOR operation on odd bits, such as d _{0 , k} , d _{2 , k} , among d _{0 , k} to d _{N −1, k} bits.

At this time, a ₁ to a _{N -1} have a value of 0 or 1 _{, and} the coefficient of d _{0 , k} is always 1. The values a ₁ to a _{N -1} may all have a value of 1, depending on the implementation, and some (eg, odd-numbered) may have a value of 0 for the remainder (eg, even-numbered). .

More specifically, the case where the state transitions as in the embodiment of FIG. 2 from the case where the state number N _s is 4 will be described with an example. When the current state in the k iterations is represented by two bits [d _{1 , k} d _{0 , k} ], and the next state is represented by [d _{1 , k + 1} d _{0 , k + 1} ], each state The relationship between the bits representing may be represented by Equation 4.

At this time, if the current state value is 0 [00], the next state value is 0 [00] when the input bit is 0 and 2 [10] when the input bit is 1. If the current state value is 1 [01], the next state value is 2 [10] when the input bit is 0, and 0 [00] when the input bit is 1. If the current state value is 2 [10], the next state value is 3 [11] when the input bit is 0 and 1 [01] when the input bit is 1. Finally, if the current state value is 3 [11], the next state value is 1 [01] when the input bit is 0 and 3 [11] when the input bit is 1.

Among the cases where the state number N _s is 4, the state transition rule according to another embodiment may be expressed as in Equation 5 below.

After the steps S142 and S144 are repeated a predetermined number of times, in step S150, the encoder determines parity bits based on the coding state changed by the last iteration. For example, in the case of the i-th iteration, the encoder on the basis of K _i second modified coding state by the K _i-th input bit determines the i th parity bit.

According to one embodiment, the encoder determines the values of the input bits as parity bits that cause the changed encoding state to converge to a preset state (eg, an initialization state). For example, in the i-th iteration, the value of the input bits for causing the K _i -th changed coding state to converge to an initialization state (eg, state 0) may be the i-th parity bits. More specifically, in FIG. 2 in which the state number N _S is 4, the number N _P of parity bits is 2, and the state transitions as shown in Equation 4, the parity bits in the i th iteration are determined as follows. When the value of the K _i th changed encoding state is state 0 [00], when the value of the K _i th changed encoding state is State 1 [10], and the value of the K _i th changed encoding state is State 2 [11] When the value of the K _i -th changed encoding state is state 3, the parity bits become [01]. 2, a predetermined i-th parity bits can see that time, the convergence state of state 0 is K _i second modified coding state after all previously set by the state transition is completed, assuming the input bits deuleogandago after K _i th iteration 220. In FIG. 2 and the above-described example, the case of convergence to state 0 has been described, but the converged state is not limited thereto and may be determined to converge to another state. On the other hand, when the number of states is N _S , the number of bits N _P of the parity bits is log ₂ N _s . The number of parity bits N _P determined at one time is an integer of 2 or more, and may be determined in an appropriate number in consideration of error correction performance, encoding speed, arithmetic speed, required storage space, and the like. Hereinafter, a description will be given of a four-phase-accumulated code in which the number of N _P is 2 and the state number N _s is 4. However, the present invention is not limited thereto, and N _P may be an integer such as 3 or 4, and N _s Can be an integer such as 8 or 16.

The encoder selects a plurality of previously unselected plurality of information bits among the mixed information bits (ie, bits of the information bit block), and performs steps S130 to S150 at least once. For example, when the encoder divides the information bit block into G groups, the encoder may sequentially perform steps S130 to S150 for each group G times. Since the initialization of the encoding state is not performed when the steps S130 to S150 are repeated, the initial encoding state in the i + 1 th iteration is the same as the last encoding state (K _i th changed encoding state) in the i th iteration. If G steps S130 to S150 are repeated G times, N _p parity bit groups are generated.

이 된다.
In step S160, the encoder generates a codeword based on the information bit string and the parity bits determined in step S150. As an example, the codeword may be generated by combining the information bit string b _k and the bit string b _p in which G parity bits are combined, such as c = [ b _k b _p ]. According to one embodiment, b _p is [b _{K +1} , b _{K +2} , ..., b _{K + Np (i-1) +1} , ..., b _{K + Np (G-1) + Np} ], b _{K + Np (i-1) + 1} means the first bit of the parity bits generated in the i-th iteration. If the parity bits are generated by repeating G times, the code rate is

.

2 is a diagram for describing a process of changing an encoding state and a process of determining parity bits according to an embodiment of the disclosed technology. FIG. 2 is a trellis diagram when N _S is 4, N _P is 2, and a state transitions as shown in Equation 4 as described above. In FIG. 2, an iterative process of transitioning states as information bits are input is unfolded over time. Trellis diagrams include branches and states. The branches represent a coded signal or a state transition in accordance with the coded signal. The states represent encoding states that transition with time in correspondence with the encoded signal. In FIG. 2, the encoding states according to the input of the information bits are displayed in a circle, and a solid line arrow indicates a case where bit 0 is input and a dotted line arrow indicates a case where bit 1 is input. Each time the encoding for one block starts, the encoding state is initialized to state zero. Then, when the information bit is input, it is transitioned to the next state according to the current state and the value of the input bit. t = (i, l) indicates the time at which the first information bit of the i th selected information bits (hereinafter referred to as the i th group) is input. At t = (1,1), the current state value is state 0, which is an initialization value. Thereafter, when 0 is inputted, the state transitions to 0, and when 1 is inputted, state 2 is entered. Assuming 1 is entered, the current state value at t = (1,2) is state 2. Thereafter, the state transitions to state 3 when 0 is input, and to state 1 when 1 is input. If 0 is entered, the current state value at t = (1,3) is state 3. As the information bits are input as described above, the state transition is repeated. When information bits are input as many as a preset number for one group, for example, K _{1 for} the first group, N according to the encoding state S _t (where t = (1, K ₁ +1)) changed in the K _1st iteration. _P Determines the parity bits of the bit. For example, if the state value at t = (1, K ₁ +1) is 2, the parity bits are [11]. The parity bits are determined by the values of the input bits that make the state value of the encoded state S _t (where t = (1, K ₁ +1)) changed at the K ₁ iteration to converge to a particular state, for example state 0. Referring to FIG. 2, when the coding state changed in the K ₁ iteration is state 2, it can be confirmed that when bit 1 is inputted, state 1 is input, and when bit 1 is inputted again from state 1, it becomes state 0 (zero state). have. When the parity bits for the first group are determined, the above-described process is repeated while sequentially receiving the information bits of the second group. At this time, the encoding state changed by the input of the last information bit of the first group becomes the initial encoding state of the second group. Once the second parity bits are determined, the above process is repeated for all subsequent groups as well. As described above, since a parity bit value is determined based on an encoding state changed as one information bit of each group is input, the receiving side can determine whether there is an error of transmitted data by using the parity bits.

3 is a block diagram illustrating an encoder for encoding an information bit string provided using an IRmA code, according to an embodiment of the disclosed technology. Since the encoder 300 of FIG. 3 includes an encoder that encodes an information bit string according to the encoding method of FIG. 1, the description of FIG. 1 may also be applied to the present embodiment. Referring to FIG. 3, the encoder 300 includes a repeater 310, an interleaver 320, an initializer 330, a polyphase-accumulated coder 340, and a codeword generator 350.

The repeater 310 repeats a given information bit string a plurality of times. For example, the repeater 310 may generate one information bit block by repeating the i-th bit of the information bit string b _k q (i) times for all the information bit strings. The interleaver 320 mixes the order of the information bits constituting the information bit string repeated a plurality of times. For example, the interleaver 320 may mix the order of the bits constituting the information bit block generated by the repeater 310. The initialization unit 330 initializes the encoding state.

The polyphase-accumulating coder 340 selects some information bits among the information bits provided from the interleaver 320, changes the encoding state according to the selected information bits, and determines parity bits based on the changed encoding state. Repeat. The codeword generator 350 performs information bit strings b _k. And a codeword based on the parity bits provided from the polyphase-accumulated coder 340.

4 is a block diagram for describing in detail the polyphase-accumulated coder 340 of FIG. 3. The polyphase-cumulative encoder 340 according to an embodiment includes a grouping unit 410, a state changing unit 420, and a parity bit determining unit 430. The grouping unit 410 divides the information bits provided from the interleaver 320 into groups of G (where G is an integer of 2 or more). The state changing unit 420 changes the encoding state while receiving the information bits included in any one group selected sequentially among the groups one by one, and changes each time all the information bits included in the one group are input. Output the encoding status. The parity bit determiner 430 determines parity bits for any one group based on the encoding state provided from the state changer 420.

5 is a view for explaining the state change unit 420 of FIG. According to an embodiment, the state change unit 420 may include a register 510 and an operation unit 520. The register 510 stores bits representing the coding state. When any one bit is input to the encoder, the operation unit 520 may include bits (information bit i) input to the encoder and bits indicating an encoding state (that is, bits having values stored in a register, d _o , d ₁ , Performs an XOR (exclusive OR) operation between at least one bit of ... For example, an XOR operation may be performed between all bits stored in the register 510 and an input bit, and as another example, a bit stored in a D ₀ register. And an XOR operation between the input bit and the input bit, that is, each storage space D ₀ of the register 510. D _{N -1} is selectively connected to the operation unit 520 and provides the stored bit value to the operation unit 520. According to an embodiment, the register 510 is a recursive shift register. When the information bits are input to the encoder one by one, the stored bits are shifted one bit by one bit, and the operation unit 520 executes the bits. The operation result is input to the most significant bit digit to update the bits indicating the encoding state. The operation of the register 510 and the operation unit 520 may be expressed as Equation 2 or Equation 3 below.

6 is a flowchart illustrating a method of decoding using an IRmA code, according to an embodiment of the disclosed technology. Unlike using the tanh rule for parity check in the IRA code, the IRmA code according to the disclosed technique can be decoded using the BCJR algorithm. In the disclosed technology, a two-dimensional BCJR algorithm is newly proposed as a method of decoding an IRmA code. Hereinafter, for the sake of understanding, a process of decoding the decoder when receiving a signal encoded using the IRmA code according to the trellis diagram of FIG. 2 will be described as an example. In connection with the present embodiment, a part to which the IRA decryption scheme is equally applicable may be simply mentioned or omitted.

As in the decoding process of the IRA, the IRmA code may be represented as a Tanner Graph, that is, nodes divided into two sides and edges connected from one node to another node. Nodes on either side of the nodes on both sides are variable nodes meaning each bit of the codeword, and nodes on the other side are group nodes meaning each group. The decoding process can be described by repeating a process of transmitting a message from one node to another node along the branch and updating a message to be delivered based on the received message. As the message delivery and update process is repeated, the accuracy of decryption increases. In this case, the message includes information on the likelihood of the corresponding bit in the coded signal. Likelihood refers to the degree of likelihood that a bit has a value of 1 or 0. As an index representing the likelihood, a case in which a log likelihood ratio (LLR) is used will be described as an example, but is not limited thereto. Group nodes update the message delivered to each variable node using the two-dimensional BCJR algorithm. A decoding method using an IRmA code will now be described with reference to FIG. 6.

In step S610, the decoder receives an encoded signal including information bits and parity bits. In step S620, the decoder groups the coded bits included in the coded signal into groups of G (G is an integer of 2 or more). For example, the decoder may match the encoded bits with at least one of the G groups. One group may include a plurality of encoded bits, and any one encoded bit may be included in the plurality of groups. The number of bits included in the i th group is called m (i). The m (i) coding bits may be composed of K _i information bits and N _P parity bits. The encoded bits may represent a repetition and interleaving process in the encoding process using the matrix, similar to using the parity check matrix H in the LDPC code, and the decoder uses the matrix to encode the encoded bits. Can be grouped The variable nodes representing each encoding bit are connected with at least one group node corresponding to itself among the group nodes representing each group.

The variable nodes may have as many as N lengths of codewords, and the group nodes may have as many as G groups. Here, the order of the N variable nodes is denoted by j, and the order of the G group nodes is denoted by i. The number of variable nodes (the number of coding bits included in the i-th group) connected to the i-th group node among the G group nodes is m (i). When the order of m (i) variable nodes is expressed as l, the relationship between l and j is represented by j = π (l). That is, the l th node among the m (i) variable nodes corresponds to the j = π (l) th node among the N variable nodes. Similarly, the number of group nodes connected to the j th variable node among the N variable nodes, that is, the number of groups including the j th encoding bit is referred to as q (j). When the order of q (j) group nodes is expressed as k, the relationship between k and i is represented by i = σ (k). That is, the k th node among the q (j) group nodes corresponds to the i = σ (k) th node among the G group nodes.

When the coded bits are grouped, the decoder may initialize the likelihood L and the first message U of each bit of the coded signal based on the received coded signal. L _j means the LLR of the j th bit (b _j ) of the N-bit encoded signal. The first message U is a message provided by the group node to the variable node. U _{i , j} is a message provided by the i-th group node to the j-th variable node and has a value of LLR of b _j estimated by the i-th group node. U _{0 , j} is an observed LLR value of b _j estimated based on the received coded signal value. U _0, U _{i, j} except for _j is initialized to 0, L _j values are initialized to the value of U _{0, j.}

In step S630, the decoder determines each variable node based on the likelihood of each bit provided from a plurality of groups including each bit, for each bit among the encoded bits. Estimates the likelihood (hereinafter, the value of the second message) of each bit that is provided to the plurality of group nodes. According to an embodiment, in the j th variable node, q (j) first messages U _{σ (k), j} provided from q (j) group nodes connected with the j th variable node, where k is from 1 q (j) second messages V are calculated based on the integers between q (j). The second messages V _{j , σ (k)} , where k is an integer between 1 and q (j), are LLR values of b _j that the j th variable node provides to each of q (j) group nodes. Indicates. Among them, the second message V _{j , σ (n) =} V _{j , i} provided to σ (n) = i-th group node may be calculated as in Equation 6 according to an embodiment. At this time, it is defined as σ (0) = 0.

The second message provided by the jth variable node is the sum of the LLR values (U _{σ (k), j} ) of b _j and U _{0 , j} provided by the group nodes connected to the jth variable node to the jth variable node. In this case, the second message V _{j , i} provided to the i-th group node is determined as a sum value except for the value of the first message U _{i , j} provided from the i-th group node.

개의 제2 메시지의 값들을 기초로, 제1 메시지의 값들을 갱신하여 각 변수 노드에 제공한다. 제1 메시지의 값은 각 그룹 노드들이 각 그룹 노드와 연결된 비트들에 대하여 추정하는 각 비트들의 가능도(likelihood)로서, 각 비트의 주변 비트들의 가능도에 기반하여 추정된다. 예컨대, U_{i ,j}는 i번째 그룹 노드가 j번째 변수 노드에 제공하는 제1 메시지의 값으로, G개의 그룹들이 제공받은

개의 제2 메시지의 값들 중 j번째 변수 노드가 i번째 그룹노드에 제공한 제2 메시지 V_{j ,i}를 제외한 제2 메시지들을 기초로 추정되는 값이다. 이때, tanh 규칙을 사용하는 IRA 코드와 달리, 복호기는 BCJR 알고리즘을 이용하여 제1 메시지 값을 갱신할 수 있다. 복호기가 제1 메시지 값을 갱신하는 과정은 도 7을 참조하여 후술한다.In step S640, the decoder updates the values of the first message based on the values of the second message. According to an embodiment, the encoder is provided with G group nodes using a two-dimensional BCJR algorithm based on a trellis representing a coding state transition.

Based on the values of the two second messages, the values of the first message are updated and provided to each variable node. The value of the first message is the likelihood of each bit that each group node estimates for the bits associated with each group node and is estimated based on the likelihood of the surrounding bits of each bit. For example, U _{i , j} is the value of the first message that the i th group node provides to the j th variable node.

Among the values of the second message, the j th variable node is estimated based on the second messages excluding the second message V _{j , i} provided to the i th group node. In this case, unlike the IRA code using the tanh rule, the decoder may update the first message value using the BCJR algorithm. The process of updating the first message value by the decoder will be described later with reference to FIG. 7.

In step S650, the decoder repeats performing steps S630 and S640. The decoder calculates the second message using the first message calculated in the previous iteration, and repeats the process of updating the first message using the newly calculated second message by a predetermined number of times.

In step S660, the decoder determines the value of each bit (b _j), depending on also available for each bit (b _j) is estimated on the basis of the value of the first update message from the last iteration. According to an embodiment, L _{j, which} is an LLR value of b _j , may be calculated as shown in Equation 7 below.

The decoder determines whether the value of b _j is 1 or 0 depending on whether the value of L _j is less than 1 or greater than 1.

7 is a flowchart for describing in detail an operation S640 according to an embodiment of the disclosed technology. According to the decoding method using the two-dimensional BCJR algorithm described in FIG. Finally, calculate the outward status metric. Once the status metrics are calculated, the decoder can update the first message using the forward, forward, backward, and outward status metrics. Meanwhile, for convenience of description _, a time t corresponding to V _{π (l), i} , which is the l-th second message, of the m (i) second messages provided by the i-th group node of the coded signals is a two-dimensional time. It is indicated by the index t = (i, l). Further, time t = (i, l) is a time corresponding to the lth bit of the i th group. In this case, for each i t = (i, 1), ..., t = (i, K _i ) is the time corresponding to the information bits, t = (i, K _i + 1), ..., t = (i, m (i)) is the time corresponding to the parity bit.

The coded signal is assumed to be a signal generated by combining parity bits generated according to state transition and parity bit generation rules as shown in the trellis diagram of FIG. 2 with information bits. Since the transition rule of FIG. 2 is information that the transmitting side and the receiving side have in common, the receiving side can have the same trellis as shown in FIG.

개의 제2 메시지들에 2차원 BCJR 알고리즘을 적용하여

개의 제1 메시지들을 갱신한다. 도 2의 트렐리스는 일반적인 트렐리스와 달리, 정보 비트들이 입력됨에 따른 부호화 상태 천이를 나타내는 메인 가지들(210)과 패리티 비트들이 입력됨에 따른 부호화 상태 천이를 나타내는 보조 가지들(220)을 포함한다. 보조 가지들(220)은 시간 t=(i,K_i+1)인 때마다 메인 가지들(210)로부터 분기된다. 즉, 도 2에서, i번째 보조 가지가 메인 가지와 분기되는 분기 상태의 시점은 t=(i,K_i+1)로 나타낼 수 있으며, i번째 보조 가지의 최종 상태의 시점은 t=(i,m(i)+1)로 나타낼 수 있다. 경우에 따라, K_i는 m(i)-N_P로 표현될 수도 있다.Based on the trellis of FIG. 2, the decoder is provided with G group nodes.

Two-dimensional BCJR algorithm to two second messages

First messages Unlike the general trellis, the trellis of FIG. 2 includes main branches 210 indicating the encoding state transition as information bits are input and auxiliary branches 220 indicating the encoding state transition as parity bits are input. . The auxiliary branches 220 branch off from the main branches 210 whenever time t = (i, K _i +1). That is, in FIG. 2, the time point of the branch state where the i-th auxiliary branch branches with the main branch may be represented by t = (i, K _i +1), and the time point of the final state of the i-th auxiliary branch may be t = (i , m (i) +1). In some cases, K _i may be represented by m (i) -N _P.

According to the conventional BCJR algorithm, a soft decision value of a transmission bit may be obtained by calculating a post probability based on a received bit string. The posterior probability at time t may be calculated as the sum of the posterior transition probabilities at time t. The posterior probability at time t is expressed by Equation 9.

Here, the posterior probability P (d _t = d) is a probability that the transmission bit value at time t is d (d is 0 or 1). σ (s _t , s _{t +1} ) is the probability of post-transition at time t, σ (s _t = a, s _{t +1} = b) is that state at time t (s _t ) is state a, and It means the probability that the state s _{t +1} at t + 1 is the state b. At this time, state b is a state value transitioned at time t + 1 when the state at time t is state a and the transmission bit value at time t is d. s _t has a value of any one of coding states given by the state number N _s . In the present embodiment, s _t has a value of any one of state 0, state 1, state 2, and state 3.

According to the two-dimensional BCJR decoding algorithm proposed in the disclosed technique, the post-transition probability in the main branch and the post-transition probability in the auxiliary branch are calculated based on different values. At time t, the post-transition probability in the main branch may be calculated as in Equation 10, and the post-transition probability in the auxiliary branch may be calculated as in Equation 11.

Here, α (s _t ) is a forward state metric of s _{t which} is an encoding state at time t, and β (s _{t +1} ) is a backward state metric of s _{t +1} which is an encoding state at time t + 1. . γ (s _t , s _{t + 1} ) is the branch metric of the branch connecting between s _t and s _{t + 1} . The forward state metric and the backward state metric are defined only in the branch representing the information bits, ie in the state associated with the main branch. γ (s _t , s _{t +1} ) is a branch metric at time t. In Equation 10, only the branch metric at the main branch is used. The value of the branch metric at time t may be determined based on the value of the second message corresponding to time t.

Here, μ (s _t ) and λ (s _{t +1} ) are state metrics relating to a state associated with a branch representing a parity bit, and are an out state state metric at time t and an inward state metric at time t + 1, respectively. do. The forward state metric and the forward state metric are defined only in a branch representing parity bits, i. γ (s _t , s _{t + 1} ) is the branch metric at time t, and only the branch metric at the secondary branch is used in Equation (11). Further, the value of the branch metric at time t may be determined based on the value of the second message corresponding to time t. The outward state metric is calculated sequentially based on the outward state metric of the previous state from each time the secondary branch branches in the main branch. The initial outward state metric at the time of branching may be calculated based on the forward and backward state metrics. The forward status metric is calculated in reverse order based on the forward status metric of the next state, from the last state of each auxiliary branch.

When the post-transition probabilities are obtained for all branches on the trellis as shown in Equations 10 and 11, the value of the first message corresponding to the time t is determined according to the post probability calculated according to Equation 9.

A procedure of performing decoding based on the trellis diagram will be described with reference to FIG. 8. FIG. 8 is a simplified representation of the trellis of FIG. 2. The diagram of FIG. 2 shows all cases of bits that can be input up to each time t and all states that an encoding state can have at time t according to the bits input up to time t. In the diagram of FIG. 8, a bit and an encoding state at a time t inputted to each time t are simply represented by one arrow and one circle, respectively. The arrows in FIG. 8 may have a value of 0 or 1, and each circle may have a value from state 0 to state 3. As shown in FIG. 8, in the two-dimensional BCJR algorithm according to the disclosed technique, inward recursion, forward recursion, backward recursion, and outward recursion are performed. Decoding proceeds in order. In this case, according to an embodiment, the order of the forward iteration and the backward iteration may be changed. Inward iteration is a process of calculating the inward state metric value in the reverse order from the final state of each auxiliary branch. In the forward iteration operation, the forward state metric is sequentially calculated from the first state of the main branch, but in the branch state, the forward state metric is calculated by reflecting the forward state metric. In the backward iteration operation, the backward state metric value is calculated in the reverse order of the forward iteration operation. Similar to the forward iteration operation, in the branched state, the backward state metric is calculated by reflecting the value of the inward state metric. The outward iteration operation is a process of sequentially calculating the outward state metric values in the reverse order of the inward iteration operation from the branch state at the time when the main branch and the auxiliary branch are branched. A method of calculating each state metric in this order will be described in detail.

Prior to calculating each state metric, the decoder calculates branch metrics corresponding to each branch from the second message, based on the trellis diagram of FIG. 2 or 8. Once the branch metrics are calculated, the decoder calculates each state metric in the order as described above. Once each state metric value is calculated, the decoder may update the first message based on the state metric values. However, in the present embodiment, the above-described two-dimensional BCJR is applied, and since only the LLR values (extrinsic information) of bits other than the self are reflected in the process of estimating the LLR value thereof, in calculating the post-transition probability, the equation Unlike 10 and 11, do not multiply the values of the branches metric.

According to one embodiment, the decoder determines the value of the branch metric at t = (i, l) based on the second message V _{pi (l), i} value. The second message V _{π (l), i} is a message value provided from the l th variable node among m (i) variable nodes connected to the i th group node by the i th group node. At this time, the values of the second message are input values of the BCJR algorithm and correspond to the pre-LLR values of respective transmission bits in the BCJR algorithm. For example, the branch metric corresponding to bit 0 of the branch metrics at time t = (i, l) is the probability that the bit value at time t = (i, l) is 0 from the value of V _{π (l), i.} The metric of the branch corresponding to bit 1 is also determined by the probability that the bit value at time t = (i, l) is 1 from the value of V _{pi (l), i} .

If this is expressed as an equation, Equation 12 is obtained.

When the branch metrics are calculated, the decoder sequentially calculates each state metric as follows.

In operation S710, the decoder calculates inward state metrics based on values of a branch metric corresponding to parity bits among all encoded bits included in the G groups. The forward status metric is a status metric for the state associated with the auxiliary branch, which is calculated in the reverse order based on the forward status metric of the next state. The inward status metric is calculated for each secondary branch representing parity bits. The inward status metric is the branch state s _{(i, l)} at the point where the main and secondary branches diverge from the state s _(il) (where l = m (i)) immediately before the final convergence state of each secondary branch _. In this case, l = K _i +1 or l = m (i) -N _P +1 is calculated in the reverse order as in Equation 13.

Assuming that each auxiliary branch converges to a specific state, for example state 0, s _{(i, m (i) +1)} has a state 0 value. Thus, λ (s _{(i, m (i) +1)} ) is a value of 1 when s _{(i, m (i) +1)} is state 0, and s _{(i, m (i) +1)} is In the other state, it has a value of zero.

After calculating the forward state metric for all the auxiliary branches, in step S720, the decoder forwards the values of the branch metric corresponding to the information bits among the encoded bits included in the G groups and the forward state metrics. Calculate state metrics and backward state metrics. The forward state metric is a state metric for the state connected to the main branch 210 and is sequentially calculated based on the forward state metric of the previous state. The backward state metric is a state metric for the state connected to the main branch 210 and is calculated in the reverse order based on the backward state metric of the next state. The forward state metric is computed sequentially for each state from t = (i, 1) to t = (i, K _i +1) by a forward iteration operation. In addition, i is incremented one by one until the i value is 1 and the i value is G, and the calculation is repeated. The forward state metric of s _{(i, 1),} which is a state corresponding to the first bit of each information bit group _, may be calculated using a condition as shown in Equation (14).

이다.In this case, S _init is an initial value of the encoding state. Assuming that S _init is state 0, α (s _(1,1) ) has a value of 1 when s _(1,1) is state 0 and a value of 0 when s _(1,1) is the other state. Also, since the state at t = (i, 1) is the same as the state at t = (i-1, K _{i -1} +1),

to be.

The forward state metric after the branch state in each group of information bits is calculated as shown in Equation 15 below. That is, α (s _t = a) is a s _{t -1,} which for all the branches leading to the state s _t s _{t -1} a from the value of having a random state value, and the branch metric for each of It is calculated as the sum of the products of the forward state metric. In this case, t may have a value of (i, 2), ..., (i, K _i ) for every i.

Finally, the forward state metric of the branch state in each group of information bits is calculated by reflecting the value of the forward state metric as shown in Equation 16. That is, since the branch state is a point where the auxiliary branch and the main branch cross each other, the forward state metric is calculated by multiplying the forward state metric value calculated from the auxiliary branch and the forward state metric value calculated from the main branch.

At this time, t, which is the branching time point, is t = (i, K _i +1) or, since K _i = m (i) -N _P , t = (i, m (i) -N _P +1). Similarly, t-1 = (i, K _i ) or (i, m (i) -N _P ).

The backward state metric is calculated in reverse order for each state from t = (i, K _i +1) to t = (i, 1) by a backward iteration operation. Further, i decreases one by one from the value of i to G until the value of i is 1 and the calculation is repeated. The backward state metric for the state at t = (i, K _i +1), which is changed according to the last bit of each information bit group, may be calculated using a condition as shown in Equation 21.

이다.Therefore, the state at t = (i, K _i +1) is the same as the state at t = (i + 1,1),

to be.

Except for the branch state in each group of information bits, the remaining backward state metrics are calculated as shown in Equation 18. That is, β (s _t = a) is s _{t +1} that for all of the reverse leading to the state s _t a value of from s _{t +1} having an arbitrary state value, and the branch metric for each of Is computed as the sum of the products of the backward state metric. In this case, t may have a value of (i, K _i ), ..., (i, 2) for every i.

Finally, the forward state metric of the branch state in each group of information bits is calculated by reflecting the value of the forward state metric as shown in Equation 19. That is, since the branch state is the point where the secondary branch and the main branch cross each other, the backward state metric in the branch state is calculated by multiplying the inward state metric value calculated from the secondary branch and the backward state metric value calculated from the main branch. do.

In operation S730, the decoder calculates outward state metrics based on values of a branch metric corresponding to the parity bits among the encoding bits included in the G groups. The outward state metric is a state metric for a state connected with the auxiliary branch 220 and is sequentially calculated based on the branch state corresponding to the outward state metric and parity bits of the previous state.

Like the inward status metric, the outward status metric is calculated for each auxiliary branch representing parity bits, but is performed in the opposite direction to the inward status metric. The outward status metric is _calculated from the branch status s _{(i, l)} at each time the main and secondary branches branch, where l = K _i +1 or l = m (i) -N _P +1. It is calculated sequentially up to the state s _(il) , where l = m (i), just before the final state of the auxiliary branch.

The forward state metric in each branch state is equal to the product of the forward state metric and the backward state metric in each branch state. If this is expressed as an equation, Equation 20 is obtained.

The outward state metrics from the state following the branch state are sequentially calculated as shown in Equation 21.

Once the state metrics are calculated, the decoder can update the values of the first message directed to the variable node corresponding to the information bits or parity bits (S740). The decoder updates the values of the first message directed to the variable node corresponding to the information bits based on the values of the forward state metrics and the backward state metrics, and based on the values of the forward state metrics and the outward state metrics. Update the values of the first message directed to the variable node corresponding to the parity bits.

However, as mentioned above, since values of the first message for each bit are updated to reflect only LLR values (extrinsic information) of bits other than itself, in calculating a post-transition probability, Equations 10 and 11 Unlike multiply the values of the branches metric. That is, the post-transition probability used to update the first message values is calculated as in Equation 22 and Equation 23. According to an embodiment, the first message U _{i , π (n)} of the i-th group node provides to the j = π (n) -th variable node, where n is an integer of 1 ≦ n ≦ m (i ₎ . The value is calculated as shown in Equation 22 when the j = π (n) th variable node corresponds to the information bit, and is calculated as shown in Equation 23 when the j = π (n) th variable node corresponds to the parity bit. It can be calculated as the sum of the transition probabilities. The value of the first message U _{i , π (n} ) is the LLR of the posterior probability P (d _t ) of the bit corresponding to t = (i, n) calculated according to Equations 12 and 7 in the BCJR algorithm. It can be determined by the converted value.

As described above, values of the first message are output values of the BCJR algorithm and are determined based on post-transition probabilities calculated as Equations 22 and 23. Same as 24

As described above, an operation of calculating the value U of the first message from the value V of the second message by the BCJR algorithm may be simply expressed as in Equation 25.

While the system and apparatus disclosed herein have been described with reference to the embodiments shown in the drawings for purposes of clarity of understanding, they are illustrative only and various modifications and equivalent embodiments can be made by those skilled in the art. I will understand that. Accordingly, the true scope of protection of the disclosed technology should be determined by the appended claims.

Claims (18)

(a) repeating each information bit included in the information bit string a plurality of times and mixing the order of the repeated information bits;
(b) initializing a coding state;
(c) changing the encoding state according to some selected plurality of information bits of the interleaved information bits;
(d) determining parity bits based on the encoding state;
(e) repeating steps (c) and (d) at least once by selecting a plurality of previously unselected information bits among the mixed information bits; And
(f) generating a codeword based on the information bit string and the parity bits determined in step (d). The method of claim 1, wherein step (d)
And determining the values of the input bits as the parity bits to cause the encoding state to converge to a preset state. The method of claim 1, wherein step (d)
And determining the values of the input bits as the parity bits to cause the encoding state to converge to an initial encoding state. The method of claim 1, wherein the step (c)
(c1) receiving any one of the selected plurality of information bits not previously input;
(c2) changing the encoding state from the current state to the next state according to the received bit;
(c3) an encoding method comprising repeating the receiving step and the changing step. The method of claim 4, wherein step (c2) comprises:
And the encoding state is changed to one of two states corresponding to the current bit among two states corresponding to the current state. The method of claim 4, wherein in step (c2), the step (c) is performed repeatedly for the kth while the step (c) is performed once.
The current state is N bits [d _{N -1, k} ... d _{0 , k} ], the next state is
d _{n , k + 1} = d _{n + 1, k} (where n = 0, ..., N-2)

Where i _k is the information bit received in the current iteration,

Means an exclusive OR (XOR) operation, and d _k Denotes a value obtained by performing XOR operation on at least one bit selected from d _{0 , k} to d _{N -1, k} ), wherein N bits [d _{N −1, k + 1} ... d _{0 , k + 1} ]. The method of claim 4, wherein in step (c2), the step (c) is performed repeatedly for the kth while the step (c) is performed once.
The current state at the kth iteration of the plurality of iterations is N bits [d _{N −1, k} ... d _{0 , k} ]
d _{n , k + 1} = d _{n + 1, k} (where n = 0, ..., N-2)

Where i _k is the information bit received in the current iteration,

Denotes an exclusive OR (XOR) operation, wherein a ₁ to a _{N -1} has a value of 0 or 1, and N bits [d _{N −1, k + 1} ... d _{0 , k + 1} ]. A repeater which repeats the information bit string a plurality of times;
An interleaver for mixing the information bits repeated the plurality of times;
An initialization unit for initializing an encoding state;
A polyphase-accumulated coder for selecting some of the information bits provided from the interleaver, changing the encoding state according to the selected information bits, and repeating the process of determining parity bits based on the encoding state; And
And a codeword generator for generating a codeword based on the parity bits provided from the information bit string and the polyphase-accumulated coder. The method according to claim 8, wherein the polyphase-cumulative code portion,
A grouping unit dividing the information bits provided from the interleaver into G groups (G is an integer of 2 or more);
A state in which the encoding state is changed while receiving the information bits included in any one group selected sequentially among the groups one by one, and outputs a changed encoding state whenever all the information bits included in the one group are input. Change section; And
And a parity bit determiner configured to determine parity bits for the one group based on an encoding state provided from the state changer. The method of claim 9, wherein the state change unit,
A register for storing bits representing the encoding state; And
And an operation unit configured to perform an XOR operation between at least one of the input bits and the bits indicating the encoding state.
When the bits are input one by one, the stored bits move by one bit to the lower bit positions, and the operation result performed by the operation unit is input to the highest bit position to update the bits indicating the encoding state. Encoder that is a (Recursive Shift Register). (a) receiving an encoded signal comprising information bits and parity bits;
(b) grouping coded bits included in the coded signal into G (G is an integer of 2 or more) groups;
(c) for each bit of the encoded bits, each bit is based on the likelihood (hereinafter, the value of the first message) of each bit provided from a plurality of groups containing each bit. Estimating the likelihood (hereinafter, the value of a second message) of each bit provided to the plurality of groups;
(d) updating the values of the first message based on the values of the second message provided by the G groups by using a two-dimensional BCJR algorithm based on a trellis representing an encoding state transition. Providing to;
(e) repeating steps (c) and (d); And
(f) determining the value of each bit according to the likelihood of each bit estimated based on the values of the first message updated in the last iteration. The method of claim 11, wherein step (d)
(d1) calculating inward state metrics based on values of a second message corresponding to the parity bits among the encoded bits included in the G groups;
calculating forward state metrics and backward state metrics based on values of a second message corresponding to the information bits among the encoded bits included in the G groups and the forward state metrics;
(d3) calculating outward state metrics based on values of a second message corresponding to the parity bits among the encoded bits included in the G groups; And
(d4) update values of a first message corresponding to the information bits based on the values of the forward state metrics and the backward state metrics, and determine the values of the forward state metrics and the outward state metrics. Updating values of a first message corresponding to the parity bits on a basis. The method of claim 12,
The trellis includes a main branch and an auxiliary branch branched from the main branch,
The inward status metric is a status metric for a status associated with the auxiliary branch, and is a status metric calculated in reverse order based on the inward status metric of a next status.
The forward state metric is a state metric for a state connected to the main branch, and is a state metric sequentially calculated based on a forward state metric of a previous state.
The backward state metric is a state metric for a state connected to the main branch, and is a state metric calculated in reverse order based on the backward state metric of a next state.
The outward state metric is a state metric for a state associated with the auxiliary branch, and is a state metric sequentially calculated based on the outward state metric of a previous state. The method of claim 12, wherein the step (d1),

(Where λ (s _{(i, l)} ) is the inward state metric for state s _{(i, l)} , s _{(i, l)} is the state corresponding to the lth bit of the i th group, γ (s _{( i, l)} , s _{(i, l + 1)} ) is a branch metric that connects states s _{(i, l)} and s _{(i, l + 1)} to the first 2 is calculated based on the value of the message, l is an integer from m (i) to m (i) -N _P +1, m (i) is the number of bits in the i-th group, N _P is the i-th Calculating the inward status metrics according to the number of parity bits included in the group). The method of claim 12, wherein the step (d2),
if l = 1,

If l = K _i +1,

(Where α (s _{(i, l)} ) is the forward state metric for state s _{(i, l)} , s _{(i, l)} corresponds to the l-th bit of the i-th group, and K _i is the i-th The number of information bits included in the group, λ (s _{(i, l)} ) is an inward state metric for state s _{(i, l)} , γ (s _{(i, l-1)} , s _{(i, l)} ) Is a branch metric that connects s _{(i, l-1)} and s _{(i, l)} , calculated based on the value of the second message provided from the l-1th bits of the i th group, Calculating a first forward state metric and a last forward state metric in each group accordingly. The method of claim 12, wherein the step (d2),
If l = K _i +1,

if l = 1,

Where β (s _{(i, l)} is the backward state metric for state s _{(i, l)} , s _{(i, l)} is the state corresponding to the lth bit of the i-th group, and K _i is i The number of information bits included in the first group, λ (s _{(i, l)} ) is an inward state metric for state s _{(i, l)} , γ (s _{(i, l)} , s _{(i, l + 1 )} ) Is a branch metric that connects s _{(i, l)} and s _{(i, l + 1)} and is calculated based on the value of the second message provided from the lth bit of the i th group). Calculating a last backward state metric and a first backward state metric in the first group. The method of claim 12, wherein step (d3),
If l = K _i +1,

If l is an integer greater than or equal to K _i +2 and less than or equal to m (i),

Where μ (s _{(i, l)} ), α (s _{(i, l)} ), and β (s _{(i, l)} ) are the forward state metric and forward state metric of state s _{(i, l),} respectively. The backward state metric, s _{(i, l)} is the state corresponding to the lth bit of the i-th group, γ (s _{(i, l-1)} , s _{(i, l)} ) is s _{(i, l- 1)} is a branch metric that connects s _{(i, l)} and is calculated based on the value of the second message provided from the l-1 th bit of the i th group, and m (i) is included in the i th group Calculating outward status metrics according to the number of bits, K _i represents the number of information bits included in the i th group). The method of claim 12, wherein the step (d4),
The values of the first message corresponding to the information bits are

(At this time, α (s _{(i, l))} is the state s _{(i, l)} forward state _{metric, β (s (i, l} + 1) on) is back to state s _{(i, l + 1)} The extrinsic post-transition probability σ calculated according to the word state metric),
The values of the first message corresponding to the parity bits are

Where μ (s _{(i, l)} ) is an outward state metric for state s _{(i, l)} , and λ (s _{(i, l + 1)} ) for state s _{(i, l + 1)} Updating based on an extrinsic post-transition probability σ calculated according to an inward state metric).

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