KR101103893B1 - 몽고메리 곱셈 내에서의 ｓｉｍｄ 명령어들의 사용 - Google Patents

몽고메리 곱셈 내에서의 ｓｉｍｄ 명령어들의 사용 Download PDF

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KR101103893B1
KR101103893B1 KR1020040067024A KR20040067024A KR101103893B1 KR 101103893 B1 KR101103893 B1 KR 101103893B1 KR 1020040067024 A KR1020040067024 A KR 1020040067024A KR 20040067024 A KR20040067024 A KR 20040067024A KR 101103893 B1 KR101103893 B1 KR 101103893B1
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array
instructions
simd
instruction
multiplication
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KR20050036698A (ko
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피터엘. 몽고메리
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마이크로소프트 코포레이션
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/728—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic using Montgomery reduction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Organic Low-Molecular-Weight Compounds And Preparation Thereof (AREA)
KR1020040067024A 2003-10-15 2004-08-25 몽고메리 곱셈 내에서의 ｓｉｍｄ 명령어들의 사용 Expired - Lifetime KR101103893B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/686,316 2003-10-15
US10/686,316 US7532720B2 (en) 2003-10-15 2003-10-15 Utilizing SIMD instructions within montgomery multiplication

Publications (2)

Publication Number Publication Date
KR20050036698A KR20050036698A (ko) 2005-04-20
KR101103893B1 true KR101103893B1 (ko) 2012-01-12

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US (1) US7532720B2 (https=)
EP (1) EP1524594B1 (https=)
JP (1) JP4662744B2 (https=)
KR (1) KR101103893B1 (https=)
CN (1) CN100437548C (https=)
AT (1) ATE413642T1 (https=)
DE (1) DE602004017559D1 (https=)

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KR100530372B1 (ko) * 2003-12-20 2005-11-22 삼성전자주식회사 사이드채널 공격을 방지할 수 있는 타원곡선 암호화 방법
US7664810B2 (en) * 2004-05-14 2010-02-16 Via Technologies, Inc. Microprocessor apparatus and method for modular exponentiation
JP5027422B2 (ja) * 2006-02-09 2012-09-19 ルネサスエレクトロニクス株式会社 剰余演算処理装置
US8036379B2 (en) * 2006-03-15 2011-10-11 Microsoft Corporation Cryptographic processing
KR20120077164A (ko) 2010-12-30 2012-07-10 삼성전자주식회사 Ｓｉｍｄ 구조를 사용하는 복소수 연산을 위한 사용하는 장치 및 방법
CN102431508B (zh) * 2011-10-12 2014-06-11 奇瑞汽车股份有限公司 太阳能汽车天窗供电控制方法、系统以及汽车
WO2013089750A1 (en) * 2011-12-15 2013-06-20 Intel Corporation Methods to optimize a program loop via vector instructions using a shuffle table and a blend table
EP2856303B1 (en) * 2012-05-30 2017-08-02 Intel Corporation Vector and scalar based modular exponentiation
US10095516B2 (en) 2012-06-29 2018-10-09 Intel Corporation Vector multiplication with accumulation in large register space
US9355068B2 (en) 2012-06-29 2016-05-31 Intel Corporation Vector multiplication with operand base system conversion and re-conversion
JP5852594B2 (ja) * 2013-01-15 2016-02-03 日本電信電話株式会社 多倍長整数演算装置、多倍長整数演算方法、プログラム
CN104951279B (zh) * 2015-05-27 2018-03-20 四川卫士通信息安全平台技术有限公司 一种基于NEON引擎的向量化Montgomery模乘器的设计方法
IL239880B (en) * 2015-07-09 2018-08-30 Kaluzhny Uri Simplified montgomery multiplication
CN106452723B (zh) * 2016-12-13 2017-05-31 深圳市全同态科技有限公司 一种基于模运算的全同态加密处理方法
JP7286239B2 (ja) * 2019-02-28 2023-06-05 ルネサスエレクトロニクス株式会社 演算処理方法、演算処理装置、及び半導体装置
US20230042366A1 (en) * 2021-07-23 2023-02-09 Cryptography Research, Inc. Sign-efficient addition and subtraction for streamingcomputations in cryptographic engines
US12008369B1 (en) 2021-08-31 2024-06-11 Apple Inc. Load instruction fusion
WO2023199440A1 (ja) * 2022-04-13 2023-10-19 日本電気株式会社 符号付き整数の剰余積計算装置、符号付き整数の剰余積計算方法及び、プログラム
US12217060B1 (en) 2022-09-23 2025-02-04 Apple Inc. Instruction fusion
US12288066B1 (en) 2022-09-23 2025-04-29 Apple Inc. Operation fusion for instructions bridging execution unit types

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US6202077B1 (en) 1998-02-24 2001-03-13 Motorola, Inc. SIMD data processing extended precision arithmetic operand format
WO2001076132A1 (en) 2000-03-31 2001-10-11 The State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Oregon S Tate University Scalable and unified multiplication methods and apparatus

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JP3869947B2 (ja) * 1998-08-04 2007-01-17 株式会社日立製作所 並列処理プロセッサ、および、並列処理方法
JP2002007112A (ja) * 2000-06-20 2002-01-11 Sony Corp 剰余演算計算方法および剰余演算計算装置
JP3785044B2 (ja) * 2001-01-22 2006-06-14 株式会社東芝 べき乗剰余計算装置、べき乗剰余計算方法及び記録媒体
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US6202077B1 (en) 1998-02-24 2001-03-13 Motorola, Inc. SIMD data processing extended precision arithmetic operand format
WO2001076132A1 (en) 2000-03-31 2001-10-11 The State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Oregon S Tate University Scalable and unified multiplication methods and apparatus

Non-Patent Citations (2)

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J. Grossschadl et al., "Architectural Enhancement for Montgomery Multiplication on Embedded RISC Processors", Computer Science
R. Posch et al., "RNS-Modulo Reduction Upon a Restricted Base Value Set and its Applicability to RSA Crypotography", Computer & Security, vol. 17, no.7, 1988 pp. 637-650.

Also Published As

Publication number Publication date
CN100437548C (zh) 2008-11-26
EP1524594A3 (en) 2006-04-12
EP1524594A2 (en) 2005-04-20
US7532720B2 (en) 2009-05-12
ATE413642T1 (de) 2008-11-15
JP2005122141A (ja) 2005-05-12
DE602004017559D1 (de) 2008-12-18
EP1524594B1 (en) 2008-11-05
JP4662744B2 (ja) 2011-03-30
CN1607518A (zh) 2005-04-20
KR20050036698A (ko) 2005-04-20
US20050084099A1 (en) 2005-04-21

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