DE602004017559D1 - Benutzung von SIMD-Befehlen innerhalb einer Montgomerymultiplizierung - Google Patents
Benutzung von SIMD-Befehlen innerhalb einer MontgomerymultiplizierungInfo
- Publication number
- DE602004017559D1 DE602004017559D1 DE602004017559T DE602004017559T DE602004017559D1 DE 602004017559 D1 DE602004017559 D1 DE 602004017559D1 DE 602004017559 T DE602004017559 T DE 602004017559T DE 602004017559 T DE602004017559 T DE 602004017559T DE 602004017559 D1 DE602004017559 D1 DE 602004017559D1
- Authority
- DE
- Germany
- Prior art keywords
- arrays
- update
- mul
- multiplication
- simd instructions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/728—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic using Montgomery reduction
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
- Organic Low-Molecular-Weight Compounds And Preparation Thereof (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/686,316 US7532720B2 (en) | 2003-10-15 | 2003-10-15 | Utilizing SIMD instructions within montgomery multiplication |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE602004017559D1 true DE602004017559D1 (de) | 2008-12-18 |
Family
ID=34377640
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE602004017559T Expired - Lifetime DE602004017559D1 (de) | 2003-10-15 | 2004-08-06 | Benutzung von SIMD-Befehlen innerhalb einer Montgomerymultiplizierung |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7532720B2 (https=) |
| EP (1) | EP1524594B1 (https=) |
| JP (1) | JP4662744B2 (https=) |
| KR (1) | KR101103893B1 (https=) |
| CN (1) | CN100437548C (https=) |
| AT (1) | ATE413642T1 (https=) |
| DE (1) | DE602004017559D1 (https=) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040249782A1 (en) * | 2003-06-04 | 2004-12-09 | International Business Machines Corporation | Method and system for highly efficient database bitmap index processing |
| DE602004027943D1 (de) * | 2003-11-16 | 2010-08-12 | Sandisk Il Ltd | Verbesserte natürliche montgomery-exponentenmaskierung |
| KR100530372B1 (ko) * | 2003-12-20 | 2005-11-22 | 삼성전자주식회사 | 사이드채널 공격을 방지할 수 있는 타원곡선 암호화 방법 |
| US7664810B2 (en) * | 2004-05-14 | 2010-02-16 | Via Technologies, Inc. | Microprocessor apparatus and method for modular exponentiation |
| JP5027422B2 (ja) * | 2006-02-09 | 2012-09-19 | ルネサスエレクトロニクス株式会社 | 剰余演算処理装置 |
| US8036379B2 (en) * | 2006-03-15 | 2011-10-11 | Microsoft Corporation | Cryptographic processing |
| KR20120077164A (ko) | 2010-12-30 | 2012-07-10 | 삼성전자주식회사 | Simd 구조를 사용하는 복소수 연산을 위한 사용하는 장치 및 방법 |
| CN102431508B (zh) * | 2011-10-12 | 2014-06-11 | 奇瑞汽车股份有限公司 | 太阳能汽车天窗供电控制方法、系统以及汽车 |
| WO2013089750A1 (en) * | 2011-12-15 | 2013-06-20 | Intel Corporation | Methods to optimize a program loop via vector instructions using a shuffle table and a blend table |
| EP2856303B1 (en) * | 2012-05-30 | 2017-08-02 | Intel Corporation | Vector and scalar based modular exponentiation |
| US10095516B2 (en) | 2012-06-29 | 2018-10-09 | Intel Corporation | Vector multiplication with accumulation in large register space |
| US9355068B2 (en) | 2012-06-29 | 2016-05-31 | Intel Corporation | Vector multiplication with operand base system conversion and re-conversion |
| JP5852594B2 (ja) * | 2013-01-15 | 2016-02-03 | 日本電信電話株式会社 | 多倍長整数演算装置、多倍長整数演算方法、プログラム |
| CN104951279B (zh) * | 2015-05-27 | 2018-03-20 | 四川卫士通信息安全平台技术有限公司 | 一种基于NEON引擎的向量化Montgomery模乘器的设计方法 |
| IL239880B (en) * | 2015-07-09 | 2018-08-30 | Kaluzhny Uri | Simplified montgomery multiplication |
| CN106452723B (zh) * | 2016-12-13 | 2017-05-31 | 深圳市全同态科技有限公司 | 一种基于模运算的全同态加密处理方法 |
| JP7286239B2 (ja) * | 2019-02-28 | 2023-06-05 | ルネサスエレクトロニクス株式会社 | 演算処理方法、演算処理装置、及び半導体装置 |
| US20230042366A1 (en) * | 2021-07-23 | 2023-02-09 | Cryptography Research, Inc. | Sign-efficient addition and subtraction for streamingcomputations in cryptographic engines |
| US12008369B1 (en) | 2021-08-31 | 2024-06-11 | Apple Inc. | Load instruction fusion |
| WO2023199440A1 (ja) * | 2022-04-13 | 2023-10-19 | 日本電気株式会社 | 符号付き整数の剰余積計算装置、符号付き整数の剰余積計算方法及び、プログラム |
| US12217060B1 (en) | 2022-09-23 | 2025-02-04 | Apple Inc. | Instruction fusion |
| US12288066B1 (en) | 2022-09-23 | 2025-04-29 | Apple Inc. | Operation fusion for instructions bridging execution unit types |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2726667B1 (fr) * | 1994-11-08 | 1997-01-17 | Sgs Thomson Microelectronics | Procede de mise en oeuvre de multiplication modulaire selon la methode montgomery |
| US6202077B1 (en) * | 1998-02-24 | 2001-03-13 | Motorola, Inc. | SIMD data processing extended precision arithmetic operand format |
| JP3869947B2 (ja) * | 1998-08-04 | 2007-01-17 | 株式会社日立製作所 | 並列処理プロセッサ、および、並列処理方法 |
| US7240204B1 (en) | 2000-03-31 | 2007-07-03 | State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Oregon State University | Scalable and unified multiplication methods and apparatus |
| JP2002007112A (ja) * | 2000-06-20 | 2002-01-11 | Sony Corp | 剰余演算計算方法および剰余演算計算装置 |
| JP3785044B2 (ja) * | 2001-01-22 | 2006-06-14 | 株式会社東芝 | べき乗剰余計算装置、べき乗剰余計算方法及び記録媒体 |
| JP2002229445A (ja) * | 2001-01-30 | 2002-08-14 | Mitsubishi Electric Corp | べき乗剰余演算器 |
| CN1375765A (zh) * | 2001-03-19 | 2002-10-23 | 深圳市中兴集成电路设计有限责任公司 | 一种快速大数模乘运算电路 |
| US7107305B2 (en) * | 2001-10-05 | 2006-09-12 | Intel Corporation | Multiply-accumulate (MAC) unit for single-instruction/multiple-data (SIMD) instructions |
| EP1459167B1 (en) * | 2001-12-14 | 2006-01-25 | Koninklijke Philips Electronics N.V. | Pipelined core in montgomery multiplier |
| US7266577B2 (en) * | 2002-05-20 | 2007-09-04 | Kabushiki Kaisha Toshiba | Modular multiplication apparatus, modular multiplication method, and modular exponentiation apparatus |
-
2003
- 2003-10-15 US US10/686,316 patent/US7532720B2/en not_active Expired - Lifetime
-
2004
- 2004-08-06 DE DE602004017559T patent/DE602004017559D1/de not_active Expired - Lifetime
- 2004-08-06 AT AT04018745T patent/ATE413642T1/de not_active IP Right Cessation
- 2004-08-06 EP EP04018745A patent/EP1524594B1/en not_active Expired - Lifetime
- 2004-08-25 KR KR1020040067024A patent/KR101103893B1/ko not_active Expired - Lifetime
- 2004-09-15 JP JP2004269033A patent/JP4662744B2/ja not_active Expired - Lifetime
- 2004-10-15 CN CNB2004100855415A patent/CN100437548C/zh not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CN100437548C (zh) | 2008-11-26 |
| EP1524594A3 (en) | 2006-04-12 |
| EP1524594A2 (en) | 2005-04-20 |
| US7532720B2 (en) | 2009-05-12 |
| ATE413642T1 (de) | 2008-11-15 |
| JP2005122141A (ja) | 2005-05-12 |
| EP1524594B1 (en) | 2008-11-05 |
| JP4662744B2 (ja) | 2011-03-30 |
| CN1607518A (zh) | 2005-04-20 |
| KR101103893B1 (ko) | 2012-01-12 |
| KR20050036698A (ko) | 2005-04-20 |
| US20050084099A1 (en) | 2005-04-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE602004017559D1 (de) | Benutzung von SIMD-Befehlen innerhalb einer Montgomerymultiplizierung | |
| Charalambous et al. | Initial experiences porting a bioinformatics application to a graphics processor | |
| Horn et al. | Clawhmmer: A streaming hmmer-search implementatio | |
| Heller | A survey of parallel algorithms in numerical linear algebra | |
| WO2004006060A3 (en) | Statically speculative compilation and execution | |
| WO2007012794A3 (en) | Algebraic single instruction multiple data processing | |
| EP1127316A4 (en) | METHOD AND DEVICE FOR DYNAMIC COMPRESSION OF A CONTROL WITH A MATRICULAR MATERIAL ELEMENT | |
| GB0328542D0 (en) | Data element size control within parallel lanes of processing | |
| Yang et al. | An efficient parallel algorithm for longest common subsequence problem on gpus | |
| Ben Abdelhamid et al. | A block-based systolic array on an HBM2 FPGA for DNA sequence alignment | |
| Chowdhury et al. | Cache-oblivious dynamic programming for bioinformatics | |
| Luo et al. | MICA: A fast short-read aligner that takes full advantage of Many Integrated Core Architecture (MIC) | |
| WO2005109221A3 (en) | A bit serial processing element for a simd array processor | |
| Alachiotis et al. | Coupling SIMD and SIMT architectures to boost performance of a phylogeny-aware alignment kernel | |
| Pavon et al. | QUETZAL: Vector acceleration framework for modern genome sequence analysis algorithms | |
| Cao et al. | Dp-hls: A high-level synthesis framework for accelerating dynamic programming algorithms in bioinformatics | |
| US6567831B1 (en) | Computer system and method for parallel computations using table approximation | |
| DE60307089D1 (de) | "emod" eine schnelle module berechnung für rechnersysteme | |
| Rucci et al. | First Experiences Accelerating Smith-Waterman on Intel’s Knights Landing Processor | |
| Meng et al. | Boosting data throughput for sequence database similarity searches on FPGAs using an adaptive buffering scheme | |
| Soliman | Mat-core: A matrix core extension for general-purpose processors | |
| Zeni et al. | New solution for a (scaff) old problem: an fpga approach | |
| Vuduc | Methods for High-Throughput Computation of Elementary Functions | |
| Wei et al. | Vectorized SVE2 Optimization of the Post-Quantum Signature ML-DSA on ARMv9-A Architecture | |
| Franchetti | Performance portable short vector transforms |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition |