KR101091369B1 - Semiconductor Manufacturing Apparatus - Google Patents

Semiconductor Manufacturing Apparatus Download PDF

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KR101091369B1
KR101091369B1 KR1020090013154A KR20090013154A KR101091369B1 KR 101091369 B1 KR101091369 B1 KR 101091369B1 KR 1020090013154 A KR1020090013154 A KR 1020090013154A KR 20090013154 A KR20090013154 A KR 20090013154A KR 101091369 B1 KR101091369 B1 KR 101091369B1
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wafer carrier
wafer
chamber
pocket
manufacturing apparatus
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KR1020090013154A
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KR20100093974A (en
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김종학
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엘지이노텍 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68771—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting more than one semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67103—Apparatus for thermal treatment mainly by conduction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68764—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support

Abstract

실시 예는 반도체 제조장치에 관한 것이다.An embodiment relates to a semiconductor manufacturing apparatus.

실시 예에 따른 반도체 제조장치는, 챔버; 상기 챔버 중앙에서 포켓을 구비한 원판형 제1웨이퍼 캐리어; 포켓을 구비하고 상기 제1웨이퍼 캐리어의 둘레에 링 형상으로 배치된 제2웨이퍼 캐리어를 포함한다. A semiconductor manufacturing apparatus according to an embodiment includes a chamber; A disk-shaped first wafer carrier having a pocket at the center of the chamber; And a second wafer carrier having a pocket and disposed in a ring shape around the first wafer carrier.

챔버, 웨이퍼 캐리어 Chamber, Wafer Carrier

Description

반도체 제조장치{Semiconductor Manufacturing Apparatus}Semiconductor Manufacturing Apparatus

실시 예는 반도체 제조장치에 관한 것이다.An embodiment relates to a semiconductor manufacturing apparatus.

반도체 소자는 증착 공정, 포토공정, 식각공정, 확산공정을 통하여 제조될 수 있으며, 이러한 공정들이 수 차례에서 수십 차례 반복되어야 적어도 하나의 반도체 장치가 탄생될 수 있다. 특히, 상기 증착 공정은 반도체 소자 제조의 재현성 및 신뢰성에 있어서 개선이 요구되는 필수적인 공정으로 졸겔(sol-gel)방법, 스퍼터링(sputtering)방법, 전기도금(electro-plating)방법, 증기(evaporation)방법, 화학기상증착(chemical vapor deposition)방법, 분자 빔 에피탁시(molecule beam eptaxy)방법, 원자층 증착방법 등에 의하여 반도체 기판 상에 상기 가공막을 형성하는 공정이다.The semiconductor device may be manufactured through a deposition process, a photo process, an etching process, and a diffusion process, and at least one semiconductor device may be produced when these processes are repeated several times to several tens of times. In particular, the deposition process is an essential process requiring improvement in the reproducibility and reliability of semiconductor device fabrication, such as a sol-gel method, a sputtering method, an electroplating method, and an evaporation method. , A process of forming the processed film on a semiconductor substrate by a chemical vapor deposition method, a molecular beam epitaxy method, an atomic layer deposition method, or the like.

그 중 화학기상증착방법은 다른 증착방법보다 반도체 기판 상에 형성되는 박막의 스텝커버리지(step coverage), 균일성(uniformity) 및 양산성 등 같은 증착 특성이 우수하기 때문에 가장 보편적으로 사용되고 있다. 이와 같은 화학기상증착방법에는 LPCVD(Low Pressure Chemical Vapor Deposition), APCVD(Atmospheric Pressure Chemical Vapor Deposition), LTCVD(Low Temperature Chemical Vapor Deposition), PECVD(Plasma Enhanced Chemical Vapor Deposition), MOCVD(Metal Organic Chemical Vapor Deposition) 등으로 나눌 수 있다. Among them, the chemical vapor deposition method is most commonly used because the deposition characteristics such as step coverage, uniformity, and mass productivity of the thin film formed on the semiconductor substrate are superior to other deposition methods. Such chemical vapor deposition methods include LPCVD (Low Pressure Chemical Vapor Deposition), APCVD (Atmospheric Pressure Chemical Vapor Deposition), LTCVD (Low Temperature Chemical Vapor Deposition), PECVD (Plasma Enhanced Chemical Vapor Deposition), MOCVD (Metal Organic Chemical Vapor Deposition) ) And the like.

예컨대, 상기 MOCVD는 유기금속의 열분해반응을 이용해 반도체 기판상에 금속화합물을 형성하는 공정이다. 그리고, 최근에 반도체 장치가 고집적화되고 고성능화가 요구됨에 따라 새로운 물질이 도입이 필요해지고 있고, 상기 반도체 기판 상에 상기 MOCVD 공정이 수행된 이후에는 상기 화학기상증착설비 내부에 존재하는 잔류가스 및 반응생성물을 제거하는 세정 및 퍼지공정을 수행하고 있다. 따라서, 이러한 MOCVD 공정과 같은 화학기상증착 공정은 원료물질을 기체상태로 반응챔버에 유입시켜 반도체 기판 상에서 화학반응을 통하여 소정의 막질이 증착되도록 하는 공정이다.For example, the MOCVD is a process of forming a metal compound on a semiconductor substrate using a thermal decomposition reaction of an organic metal. In recent years, as semiconductor devices are highly integrated and high performance is required, new materials are required to be introduced. After the MOCVD process is performed on the semiconductor substrate, residual gases and reaction products present in the chemical vapor deposition facility are introduced. A cleaning and purging process is performed to remove this. Therefore, the chemical vapor deposition process such as the MOCVD process is a process for introducing a raw material into the reaction chamber in a gaseous state to deposit a predetermined film quality through a chemical reaction on the semiconductor substrate.

실시 예는 복수개의 웨이퍼 캐리어을 갖는 반도체 제조장치를 제공한다.The embodiment provides a semiconductor manufacturing apparatus having a plurality of wafer carriers.

실시 예는 원판 형상의 웨이퍼 캐리어 및 이의 둘레에 다중의 링 형상을 갖는 웨이퍼 캐리어를 배치할 수 있도록 한 반도체 제조장치를 제공한다. The embodiment provides a semiconductor wafer manufacturing apparatus capable of arranging a disk-shaped wafer carrier and a wafer carrier having a plurality of ring shapes around it.

실시 예에 따른 반도체 제조장치는, 챔버; 상기 챔버 중앙에서 포켓을 구비한 원판형 제1웨이퍼 캐리어; 포켓을 구비하고 상기 제1웨이퍼 캐리어의 둘레에 링 형상으로 배치된 제2웨이퍼 캐리어를 포함한다. A semiconductor manufacturing apparatus according to an embodiment includes a chamber; A disk-shaped first wafer carrier having a pocket at the center of the chamber; And a second wafer carrier having a pocket and disposed in a ring shape around the first wafer carrier.

실시 예는 웨이퍼 캐리어를 복수개로 분리하여 가스의 배기를 원활하게 할 수 있는 효과가 있다.The embodiment has the effect of separating the plurality of wafer carriers to facilitate the exhaust of the gas.

실시 예는 원판 형상의 웨이퍼 캐리어의 외측 둘레에 하나 또는 복수개의 링 형상의 웨이퍼 캐리어를 배치할 수 있어, 챔버 사이즈에 따라 웨이퍼 캐리어를 확장시켜 줄 수 있는 효과가 있다.According to the embodiment, one or a plurality of ring-shaped wafer carriers may be disposed around the outer side of the disk-shaped wafer carrier, thereby extending the wafer carrier according to the chamber size.

실시 예는 대형 사이즈의 챔버 내에서도 가스 흐름 속도를 일정하게 유지할 수 있는 효과가 있다.The embodiment has the effect of maintaining a constant gas flow rate even in a large sized chamber.

실시 예에는 대형 사이즈의 챔버 내에서도 반도체 성장 두께가 달라지는 것을 개선시켜 줄 수 있다. According to the embodiment, the semiconductor growth thickness may be improved even in a large sized chamber.

이하, 실시 예에 따른 반도체 제조장치에 대하여 첨부된 도면을 참조하여 설명하면 다음과 같다.Hereinafter, a semiconductor manufacturing apparatus according to an embodiment will be described with reference to the accompanying drawings.

도 1은 실시 예에 따른 반도체 제조장치의 측 단면도이고, 도 2는 도 1의 반응 용기 내의 웨이퍼 캐리어 배치 예를 나타낸 평면도이다. 1 is a side cross-sectional view of a semiconductor manufacturing apparatus according to an embodiment, and FIG. 2 is a plan view showing an example of a wafer carrier arrangement in a reaction vessel of FIG. 1.

도 1 및 도 2를 참조하면, 반도체 제조장치(100)는 챔버(110)를 갖는 반응 용기(112), 통로(118), 배출구(119), 제1웨이퍼 캐리어(120), 제2웨이퍼 캐리어(130), 제1히터(123), 제2히터(153), 회전축(135), 지지부(160), 회전부(170), 벨트(175), 제1모터(180) 및 제2모터(182)를 포함한다.1 and 2, the semiconductor manufacturing apparatus 100 includes a reaction vessel 112 having a chamber 110, a passage 118, an outlet 119, a first wafer carrier 120, and a second wafer carrier. 130, the first heater 123, the second heater 153, the rotary shaft 135, the support 160, the rotary 170, the belt 175, the first motor 180 and the second motor 182. ).

이러한 반도체 제조장치(100)는 화학적 기상 증착공정에 사용되기에 적당한 어떠한 전구체 가스들을 이용하여 웨이퍼에 증착하게 된다. 즉, 상기 챔버(110)에 유입된 전구체 가스들은 혼합되어 웨이퍼에 증착물을 형성하며, 캐리어 가스들은 통상적으로 웨이퍼 캐리어에서 층류를 유지하기 위한 것이다. 이런 방법으로, 예를들어 GaAs, GaN, GaAlAs, InGaAsSb, InP, ZnSe, ZnTe, HgCdTe, InAsSbP, InGaN, AlGaN, SiGe, SiC, ZnO 및 InGaAlP 등과 같은 반도체 화합물의 에피텍셜 성장이 얻어지며, 이에 한정하지는 않는다.The semiconductor device 100 is deposited on a wafer using any precursor gases suitable for use in a chemical vapor deposition process. That is, the precursor gases introduced into the chamber 110 are mixed to form deposits on the wafer, and the carrier gases are typically for maintaining laminar flow in the wafer carrier. In this way, for example, epitaxial growth of semiconductor compounds such as GaAs, GaN, GaAlAs, InGaAsSb, InP, ZnSe, ZnTe, HgCdTe, InAsSbP, InGaN, AlGaN, SiGe, SiC, ZnO and InGaAlP is obtained, and is thus limited. It doesn't.

상기 반응 용기(112)는 실린더로서 기능하며, 내부에 챔버(110)가 구비된다. 상기 반응 용기(112)의 상부에는 상부판(113)이 배치되며, 상기 상부판(113)을 통해 각종 공급 가스가 공급된다. 이러한 상부판(113)은 공급 가스의 경로나 형성 위치에 의해 변경될 수 있으며, 이에 대해 한정하지는 않는다.The reaction vessel 112 functions as a cylinder, and the chamber 110 is provided therein. An upper plate 113 is disposed above the reaction vessel 112, and various supply gases are supplied through the upper plate 113. The top plate 113 may be changed by the path or the formation position of the supply gas, but is not limited thereto.

상기 통로(118)는 상기 챔버(110)의 내부 및 외부로 상기 웨이퍼 캐리 어(130)의 이송을 용이하게 하기 위한 구멍이다. 이러한 통로(118)는 상기 웨이퍼 캐리어(130)의 크기 변경에 따라 변경될 수 있으며, 그 구체적인 크기나 형상에 대해 한정하지는 않는다.The passage 118 is a hole for facilitating the transfer of the wafer carrier 130 into and out of the chamber 110. The passage 118 may be changed according to the size change of the wafer carrier 130, and is not limited to the specific size or shape.

상기 배출구(119)는 상기 챔버(110)의 바닥면 둘레에 배치되며, 가스를 외부통로(미도시)를 통해 배출하게 된다. 상기 배출구(119)는 상기 제1웨이퍼 캐리어(120)와 제2웨이퍼 캐리어(130) 사이의 가스 구멍(117)에 대응되는 위치에 형성되며, 상기 가스 구멍(117) 및 외주변을 통해 내려오는 공급 가스를 외부로 배출하게 된다. 이러한 배출구 구조에 대해 한정하지는 않는다.The outlet 119 is disposed around the bottom surface of the chamber 110, and discharges gas through an external passage (not shown). The outlet 119 is formed at a position corresponding to the gas hole 117 between the first wafer carrier 120 and the second wafer carrier 130 and descends through the gas hole 117 and the outer periphery. The supply gas is discharged to the outside. There is no limitation on this outlet structure.

상기 제1 및 제2웨이퍼 캐리어(120,130)는 상면 평평한 형태이고, 적어도 하나의 포켓(121,131)이 형성된다. 상기 포켓(121,131)에는 웨이퍼가 로딩된다.The first and second wafer carriers 120 and 130 have a flat top surface, and at least one pocket 121 and 131 is formed. Wafers are loaded in the pockets 121 and 131.

상기 제1웨이퍼 캐리어(120)은 챔버(110)의 센터에 원판 형상으로 형성되며, 상기 제2웨이퍼 캐리어(130)은 상기 제1웨이퍼 캐리어(120)의 외측 둘레를 따라 링 형상으로 형성된다. 여기서, 상기 제2웨이퍼 캐리어(130)의 외측 둘레에 다른 웨이퍼 캐리어가 링 형상을 갖고, 이중 또는 삼중으로 배치될 수 있으며, 이는 상기 챔버(110)의 크기에 대응하여 링 형상의 웨이퍼 캐리어를 다중으로 배치할 수 있다. The first wafer carrier 120 is formed in a disk shape at the center of the chamber 110, the second wafer carrier 130 is formed in a ring shape along the outer periphery of the first wafer carrier 120. Here, another wafer carrier has a ring shape and may be disposed in a double or triple manner around the outer side of the second wafer carrier 130, which corresponds to the size of the chamber 110. You can place it.

만약, 챔버(110)의 사이즈가 증가되면, 단일 원판의 웨이퍼 캐리어에 공급된 가스는 내부와 외부의 흐름이 상이하게 되며, 이는 외부로 갈수록 가스 흐름이 더 빨라져 반도체 성장 두께가 얇아질 수 있다. 또한 단일 원판인 경우, 서셉터의 균일도(uniformity)를 확보하기가 어려워진다.If the size of the chamber 110 is increased, the gas supplied to the wafer carrier of the single disc may have different flows inside and outside, which may result in a faster gas flow and thinner semiconductor growth thickness. In addition, in the case of a single disc, it becomes difficult to secure the uniformity of the susceptor.

이에 따라 링 형태의 제2웨이퍼 캐리어(130)를 다중으로 배치한 경우, 웨이 퍼 캐리어와의 사이에 가스 구멍(117)이 형성됨으로써, 가스 흐름 속도가 변화되지 않도록 조절할 수 있다.Accordingly, when a plurality of ring-shaped second wafer carriers 130 are disposed, the gas holes 117 are formed between the wafer carriers and thus the gas flow rate may not be changed.

상기 제1웨이퍼 캐리어(120)의 아래에는 제1히터(123)이 배치되고, 상기 제1히터(123)의 아래에는 제1히터 전체를 지지하는 제1베이스 플레이트(125)가 배치된다.A first heater 123 is disposed below the first wafer carrier 120, and a first base plate 125 that supports the entire first heater is disposed below the first heater 123.

상기 제2웨이퍼 캐리어(130)의 아래에는 제2히터(153)이 배치되고, 상기 제2히터(153)의 아래에는 제2히터 전체를 지지하는 제2베이스 플레이트(155)가 배치된다. 상기 제1 및 제2베이스 플레이트(125,155)는 단일 구조로 형성될 수 있으며, 이에 대해 한정하지는 않는다.A second heater 153 is disposed below the second wafer carrier 130, and a second base plate 155 supporting the entire second heater is disposed below the second heater 153. The first and second base plates 125 and 155 may be formed in a single structure, but are not limited thereto.

여기서, 상기 제1 및 제2히터(123,153)에는 가열 전극(127,145)이 연결된다. 상기 제 1 및 제2히터(123,153)는 상기 가열 전극(127,145)으로 전달되는 열을 방출하여, 각 웨이퍼 캐리어(120,130)를 가열시켜 준다. Here, heating electrodes 127 and 145 are connected to the first and second heaters 123 and 153. The first and second heaters 123 and 153 release heat transferred to the heating electrodes 127 and 145 to heat the respective wafer carriers 120 and 130.

상기 제1웨이퍼 캐리어(120)의 배면 센터에는 회전 축(125)의 일단에 결합되며, 상기 회전축(135)은 하부의 제1모터(180)에 의해 지지되고 회전하게 된다. 상기 제1모터(180)는 자성 유체(ferro fluidic) 타입으로 구현될 수 있다.The rear center of the first wafer carrier 120 is coupled to one end of the rotation shaft 125, the rotation shaft 135 is supported and rotated by the lower first motor 180. The first motor 180 may be implemented as a ferro fluidic type.

상기 제2웨이퍼 캐리어(130)의 외주변에는 수직하게 하 방향으로 연장된 측면 커버(132)가 형성된다. 상기 측면 커버(132)는 원통 형태로 형성되며, 그 내주변에서 내측 방향으로 기어 구조(134)로 결합된다. The outer circumference of the second wafer carrier 130 is formed with a side cover 132 extending vertically downward. The side cover 132 is formed in a cylindrical shape, it is coupled to the gear structure 134 in the inner direction from the inner periphery.

상기 측면 커버(132)의 내측에 형성된 기어 구조(134)는 상기 웨이퍼 캐리어(130)를 회전시켜 주기 위해 지지부(160)의 상단과 서로 맞물려 있는 구조 즉, 치 구조 또는 요철 구조로 결합된다. 이에 따라 상기 지지부(160)의 회전에 따라 상기 제2웨이퍼 캐리어(130)는 회전하게 된다. The gear structure 134 formed on the inner side of the side cover 132 is coupled to the structure that is engaged with the upper end of the support 160, that is, tooth structure or uneven structure to rotate the wafer carrier 130. Accordingly, the second wafer carrier 130 rotates in accordance with the rotation of the support 160.

상기 지지부(160)는 상기 측면 커버(132)에 대응되는 구조로 예컨대, 원통 형상으로 형성될 수 있으며, 상기 측면 커버(132)의 내주변으로 결합된다. 상기 지지부(160)는 몰디(Moly) 재질로 이루어질 수 있다.The support part 160 may have a structure corresponding to the side cover 132, for example, a cylindrical shape, and is coupled to an inner circumference of the side cover 132. The support part 160 may be made of a Moly material.

상기 지지부(160)의 하단(162)은 외측으로 돌출되며, 상기 회전부(170)의 상단과 볼트(163)로 체결된다. 상기 회전부(170)는 벨트(175)에 의해 회전하게 된다. 상기 벨트(175)는 상기 회전부(170)에 밀착 결합되어, 상기 반응 용기(112)의 외측에 배치된 제2모터(182)에 의해 회전하면서 상기 회전부(170)를 회전시켜 준다. 여기서, 상기 지지부(160)과 회전부(170) 사이의 결합 구조는 외측에 배치하여, 챔버 내부에서 볼트 결합을 용이하게 할 수 있다.The lower end 162 of the support part 160 protrudes outward and is fastened to the upper end of the rotating part 170 by a bolt 163. The rotating part 170 is rotated by the belt 175. The belt 175 is tightly coupled to the rotating unit 170 to rotate the rotating unit 170 while rotating by the second motor 182 disposed outside the reaction container 112. Here, the coupling structure between the support unit 160 and the rotating unit 170 may be disposed on the outside to facilitate bolt coupling inside the chamber.

상기 제1모터(180) 및 회전 축(125)에 의해 상기 제1웨이퍼 캐리어(120)는 회전하게 되며, 하부의 제1히터(123)에 의해 가열된다. The first wafer carrier 120 is rotated by the first motor 180 and the rotation shaft 125, and is heated by the first heater 123 below.

상기 제2모터(182)에 의한 구동력은 상기 벨터(175), 상기 회전부(170) 및 상기 지지부(160)을 통해 상기 제2웨이퍼 캐리어(130)에 전달되어, 상기 제2웨이퍼 캐래어(130)는 회전하게 되며, 하부의 제2히터(153)에 의해 가열된다. The driving force by the second motor 182 is transmitted to the second wafer carrier 130 through the belt 175, the rotating part 170, and the support part 160, and thus the second wafer carrier 130. ) Rotates and is heated by the lower second heater 153.

그리고 상기 제1 및 제2웨이퍼 캐리어(120,130)은 서로 다른 회전 시스템으로 회전될 수 있으며, 각 웨이퍼 캐리어(120,130) 간에 간섭은 발생되지 않게 된다.In addition, the first and second wafer carriers 120 and 130 may be rotated by different rotation systems, and interference may not occur between the wafer carriers 120 and 130.

그리고, 상부판(113)을 통해 각종 공급 가스가 공급되면, 상기 제1 및 제2웨 이퍼 캐리어(120,130)의 포켓(121,131)에 로딩된 웨이퍼(미도시)에 반도체 박막이 형성될 수 있으며, 상기 공급 가스는 상기 제1 및 제2웨이퍼 캐리어(120,130) 사이의 가스 구멍(117) 및 외주변을 따라 하부의 배출구(119)를 통해 외부 통로로 유출될 수 있다. When various supply gases are supplied through the upper plate 113, a semiconductor thin film may be formed on wafers (not shown) loaded in the pockets 121 and 131 of the first and second wafer carriers 120 and 130. The supply gas may flow out to the outer passage through the gas hole 117 between the first and second wafer carriers 120 and 130 and the lower outlet 119 along the outer periphery.

이러한 반도체 제조장치(100)는 상기 제1 및 제2웨이퍼 캐리어(120,130) 사이에 공급 가스의 통로를 확보해 줌으로써, 외측으로 진행할수록 가스 흐름 속도가 빨라지는 것을 방지할 수 있다. The semiconductor manufacturing apparatus 100 may secure a passage of the supply gas between the first and second wafer carriers 120 and 130, and may prevent the gas flow rate from increasing as it moves outward.

이상에서 본 발명에 대하여 실시 예를 중심으로 설명하였으나 이는 단지 예시일 뿐 본 발명의 실시 예를 한정하는 것이 아니며, 본 발명의 실시 예가 속하는 분야의 통상의 지식을 가진 자라면 본 발명의 본질적인 특성을 벗어나지 않는 범위에서 이상에 예시되지 않은 여러 가지의 변형과 응용이 가능함을 알 수 있을 것이다. 예를 들어, 본 발명의 실시 예에 구체적으로 나타난 각 구성 요소는 변형하여 실시할 수 있는 것이다. 그리고 이러한 변형과 응용에 관계된 차이점들은 첨부된 청구 범위에서 규정하는 본 발명의 범위에 포함되는 것으로 해석되어야 할 것이다.The present invention has been described above with reference to the embodiments, which are merely examples and are not intended to limit the embodiments of the present invention. Those skilled in the art to which the embodiments of the present invention pertain have the essential characteristics of the present invention. It will be appreciated that various modifications and applications not illustrated above are possible without departing from the scope of the invention. For example, each component shown in detail in the embodiment of the present invention may be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

도 1은 실시 예에 따른 반도체 제조장치를 나타낸 측 단면도이다.1 is a side cross-sectional view illustrating a semiconductor manufacturing apparatus according to an embodiment.

도 2는 도 1의 반응 용기 내의 웨이퍼 캐리어 배치 예를 나타낸 평면도이다. FIG. 2 is a plan view showing an example of a wafer carrier arrangement in the reaction vessel of FIG. 1.

Claims (5)

챔버;chamber; 상기 챔버의 중앙에 배치되고, 웨이퍼가 로딩되는 제1 포켓을 구비한 원판 형 제1 웨이퍼 캐리어; 및A disk-shaped first wafer carrier disposed in the center of the chamber and having a first pocket into which a wafer is loaded; And 상기 제1 웨이퍼 캐리어의 둘레에 링 형상으로 배치되고, 상기 웨이퍼가 로딩되는 제2 포켓을 구비하며, 상기 제1 웨이퍼 캐리어와의 사이에 가스 구멍을 형성하는 제2 웨이퍼 캐리어를 포함하는 반도체 제조장치.A semiconductor manufacturing apparatus including a second wafer carrier disposed in a ring shape around the first wafer carrier, the second pocket having a second pocket loaded with the wafer, and forming a gas hole between the first wafer carrier. . 제 1항에 있어서,The method of claim 1, 상기 제2 웨이퍼 캐리어의 둘레에 링 형상으로 배치되고, 상기 웨이퍼가 로딩되는 제3 포켓을 구비하며, 상기 제2 웨이퍼 캐리어와의 사이에 상기 가스 구멍을 형성하는 제3 웨이퍼 캐리어를 포함하는 반도체 제조장치.A semiconductor wafer including a third wafer carrier disposed in a ring shape around the second wafer carrier, having a third pocket into which the wafer is loaded, and forming the gas hole between the second wafer carrier; Device. 제 1항에 있어서,The method of claim 1, 상기 제1 및 제2웨이퍼 캐리어의 아래에 배치된 제1 및 제2히터를 포함하는 반도체 제조장치.And a first heater and a second heater disposed under the first and second wafer carriers. 제 1항에 있어서,The method of claim 1, 상기 제1웨이퍼 캐리어의 중심 아래에 결합된 회전축 및 상기 회전축에 결합된 제1모터를 포함하며,A rotation shaft coupled below a center of the first wafer carrier and a first motor coupled to the rotation shaft, 상기 제2웨이퍼 캐리어의 외주변에 결합된 원통형의 지지부, 상기 원통형의 지지부를 회전시켜 주는 원통형의 회전부, 상기 회전부에 결합된 벨트 및 상기 벨 트를 구동하는 제2모터를 포함하는 반도체 제조장치. And a cylindrical support portion coupled to an outer circumference of the second wafer carrier, a cylindrical rotation portion for rotating the cylindrical support portion, a belt coupled to the rotation portion, and a second motor for driving the belt. 제 1항에 있어서,The method of claim 1, 상기 웨이퍼 상에 증착물을 형성하기 위해 상기 챔버의 상부판을 통해 공급된 가스를 배출하고, 상기 챔버의 바닥 둘레를 따라 형성된 배출구를 포함하는 반도체 제조장치.And discharging the gas supplied through the upper plate of the chamber to form a deposit on the wafer, and including an outlet formed along a bottom circumference of the chamber.
KR1020090013154A 2009-02-17 2009-02-17 Semiconductor Manufacturing Apparatus KR101091369B1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001189375A (en) 1999-10-18 2001-07-10 Hitachi Kokusai Electric Inc Substrate treatment apparatus and method for manufacturing of semiconductor device
JP2003347228A (en) 2002-05-30 2003-12-05 Renesas Technology Corp Method of manufacturing semiconductor device and thermal treatment equipment
JP2005045213A (en) 1993-01-21 2005-02-17 Moore Epitaxial Inc Rapid thermal processing reactor for processing semiconductor substrate

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005045213A (en) 1993-01-21 2005-02-17 Moore Epitaxial Inc Rapid thermal processing reactor for processing semiconductor substrate
JP2001189375A (en) 1999-10-18 2001-07-10 Hitachi Kokusai Electric Inc Substrate treatment apparatus and method for manufacturing of semiconductor device
JP2003347228A (en) 2002-05-30 2003-12-05 Renesas Technology Corp Method of manufacturing semiconductor device and thermal treatment equipment

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