KR101075677B1 - LGA substrate and method for manufacturing the same - Google Patents
LGA substrate and method for manufacturing the same Download PDFInfo
- Publication number
- KR101075677B1 KR101075677B1 KR1020090052005A KR20090052005A KR101075677B1 KR 101075677 B1 KR101075677 B1 KR 101075677B1 KR 1020090052005 A KR1020090052005 A KR 1020090052005A KR 20090052005 A KR20090052005 A KR 20090052005A KR 101075677 B1 KR101075677 B1 KR 101075677B1
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- KR
- South Korea
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- plating layer
- layer
- electrode pad
- forming
- lga substrate
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Geometry (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The present invention relates to a LGA substrate and a method for manufacturing the same, each core layer having an upper electrode pad and a lower electrode pad formed on both sides; A solder resist layer formed on both surfaces of the core layer and having an opening exposing the upper electrode pad and the lower electrode pad; A lower plating layer formed on the lower electrode pads exposed to the openings; And an upper plating layer formed on the upper electrode pad exposed to the opening and having a thickness different from that of the lower plating layer. The present invention also provides a method for manufacturing the LGA substrate.
Substrate, Plating, Thickness
Description
The present invention relates to an LGA substrate and a method of manufacturing the same, and more particularly, to an LGA substrate having a thickness of a plating layer formed on an upper portion of a core layer is smaller than a thickness of a plating layer formed on a lower portion of a core layer and a method of manufacturing the same. .
The LGA (Land Grid Array) type substrate is a method in which electrodes on the LGA side, that is, the lower part of the substrate are connected through pins to be detachable from a mother board. Thus, an electroless gold plated layer is formed on the electrode pad of the LGA substrate by about 10 times the thickness of the conventional BGA method in order to prevent corrosion due to exposure to air and to minimize damage caused by physical contact with the pin.
1A to 1D are cross-sectional views sequentially illustrating a method of manufacturing an LGA substrate according to the prior art.
First, as shown in FIG. 1A, a
Next, the
Next, as shown in FIG. 1B, a portion of the
Next, as shown in FIG. 1C, the conductive
The conductive
In this case, the
Thereafter, as illustrated in FIG. 1D,
However, according to the manufacturing method of the LGA substrate according to the prior art, as described above, the corrosion of the
That is, the
Accordingly, the present invention has been made to solve the above problems, an object of the present invention, the upper plating layer formed on the upper portion of the core layer to be formed to a thickness thinner than the lower plating layer formed on the lower portion of the core layer, The present invention provides an LGA substrate and a method of manufacturing the same, which can improve the bonding reliability of the solder balls formed on the substrate and reduce the cost of materials.
LGA substrate according to an embodiment of the present invention for achieving the above object, the core layer is formed on each of the upper electrode pad and lower electrode pad; A solder resist layer formed on both surfaces of the core layer and having an opening exposing the upper electrode pad and the lower electrode pad; A lower plating layer formed on the lower electrode pads exposed to the openings; And an upper plating layer formed on the upper electrode pad exposed to the opening and having a thickness different from that of the lower plating layer.
Here, the upper plating layer may be formed to a thickness thinner than the lower plating layer.
In addition, the lower plating layer and the upper plating layer may include gold (Au).
In addition, it may further include a solder ball formed on the upper plating layer.
In addition, a conductive adhesive layer interposed between the lower electrode pad and the lower plating layer and between the upper electrode pad and the upper plating layer may be further included.
In addition, the conductive adhesive layer may include nickel (Ni).
According to an aspect of the present invention, there is provided a method of manufacturing an LGA substrate, including: preparing a core layer having upper and lower electrode pads formed on upper and lower surfaces, respectively; Forming an upper solder resist layer covering the upper electrode pad and a lower solder resist layer covering the lower electrode pad on upper and lower surfaces of the core layer; Removing a portion of the lower solder resist layer to form a lower opening exposing the lower electrode pads; Forming a lower plating layer on the lower electrode pad exposed at the lower opening; Removing a portion of the upper solder resist layer to form an upper opening exposing the upper electrode pad; And forming an upper plating layer on the upper electrode pad exposed to the upper opening, the upper plating layer having a different thickness from the lower plating layer.
Here, in the forming of the upper plating layer, the upper plating layer may be formed to a thickness thinner than the lower plating layer.
In addition, the lower plating layer and the upper plating layer may be formed of gold (Au).
In addition, after the forming of the upper plating layer, the method may further include forming a solder ball on the upper plating layer.
In addition, before the forming of the lower plating layer, the method may further include forming a conductive adhesive layer on the lower electrode pad exposed to the lower opening.
In addition, before the forming of the upper plating layer, the method may further include forming a conductive adhesive layer on the upper electrode pad exposed to the upper opening.
As described above, according to the LGA substrate and the method for manufacturing the same according to the present invention, the upper plating layer formed on the upper portion of the core layer is formed to have a thickness thinner than the lower plating layer formed on the lower portion of the core layer, There is an effect that can improve the bonding reliability of the solder ball formed on the.
In addition, the present invention can reduce the thickness of the upper plating layer, thereby reducing the use of expensive gold (Au) to reduce the material cost, it is possible to improve the price competitiveness of the product.
Matters concerning the operational effects including the technical configuration of the LGA substrate according to the present invention and the manufacturing method for the above object will be clearly understood by the following detailed description with reference to the drawings showing preferred embodiments of the present invention.
First, an LGA substrate according to an exemplary embodiment of the present invention will be described in detail with reference to FIG. 2.
2 is a cross-sectional view showing an LGA substrate according to an embodiment of the present invention.
In the LGA substrate according to the embodiment of the present invention, as shown in FIG. 2, an
Here, the
The
An
In addition, a
An
The
In addition, an upper conductive
The upper conductive
In addition, a lower conductive
The lower conductive
In particular, in the LGA substrate according to the embodiment of the present invention, the
Here, the
The
Thus, according to the LGA substrate according to the embodiment of the present invention, by reducing the thickness of the
In addition, according to the embodiment of the present invention, the thickness of the
Hereinafter, a method of manufacturing an LGA substrate according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 3A to 3G.
3A to 3G are cross-sectional views sequentially illustrating a method of manufacturing an LGA substrate according to an exemplary embodiment of the present invention.
First, as shown in FIG. 3A, a
Next, as illustrated in FIG. 3B, upper and lower surfaces of the
Next, as shown in FIG. 3C, a portion of the lower solder resist
The
The
Thereafter, as shown in FIG. 3D, the lower conductive
The lower conductive
Here, the lower conductive
Next, as shown in FIG. 3E, a portion of the upper solder resist
The upper
3F, an upper conductive
The upper conductive
The
Thereafter, as illustrated in FIG. 3G,
In the method of manufacturing the LGA substrate according to the embodiment of the present invention as described above, first, the
Therefore, according to the exemplary embodiment of the present invention, the thicknesses of the
In addition, by forming a thickness of the
Preferred embodiments of the present invention described above are disclosed for the purpose of illustration, and various substitutions, modifications, and changes within the scope without departing from the spirit of the present invention for those skilled in the art to which the present invention pertains. It will be possible, but such substitutions, changes and the like should be regarded as belonging to the following claims.
1A to 1D are cross-sectional views sequentially illustrating a method of manufacturing a LGA substrate according to the prior art.
2 is a cross-sectional view showing an LGA substrate according to an embodiment of the present invention.
3A to 3G are cross-sectional views sequentially illustrating a method of manufacturing an LGA substrate according to an exemplary embodiment of the present invention.
<Description of Symbols for Main Parts of Drawings>
210:
220b:
230b: lower solder resist
231b:
241b: lower
242b: lower plating layer 250: solder ball
Claims (12)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020090052005A KR101075677B1 (en) | 2009-06-11 | 2009-06-11 | LGA substrate and method for manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020090052005A KR101075677B1 (en) | 2009-06-11 | 2009-06-11 | LGA substrate and method for manufacturing the same |
Publications (2)
Publication Number | Publication Date |
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KR20100133225A KR20100133225A (en) | 2010-12-21 |
KR101075677B1 true KR101075677B1 (en) | 2011-10-21 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020090052005A KR101075677B1 (en) | 2009-06-11 | 2009-06-11 | LGA substrate and method for manufacturing the same |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030010092A (en) * | 2001-07-25 | 2003-02-05 | 엘지니꼬동제련 주식회사 | concreat brick & block containing copper slag |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004095972A (en) | 2002-09-03 | 2004-03-25 | Sumitomo Metal Electronics Devices Inc | Manufacturing method for plastic package |
KR100601485B1 (en) | 2004-12-30 | 2006-07-18 | 삼성전기주식회사 | BGA package board and method for manufacturing thereof |
-
2009
- 2009-06-11 KR KR1020090052005A patent/KR101075677B1/en not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004095972A (en) | 2002-09-03 | 2004-03-25 | Sumitomo Metal Electronics Devices Inc | Manufacturing method for plastic package |
KR100601485B1 (en) | 2004-12-30 | 2006-07-18 | 삼성전기주식회사 | BGA package board and method for manufacturing thereof |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030010092A (en) * | 2001-07-25 | 2003-02-05 | 엘지니꼬동제련 주식회사 | concreat brick & block containing copper slag |
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Publication number | Publication date |
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KR20100133225A (en) | 2010-12-21 |
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