KR101068814B1 - a Method of manufacturing Phase Change RAM - Google Patents

Abstract

The present invention discloses a method of manufacturing a phase change memory device. The method includes forming an interlayer insulating film on a substrate on which a lower structure is formed; Anisotropically etching the interlayer insulating layer to form first and second lower electrode contact holes having a rivet shape; Depositing a first conductive layer to gap-fill the first and second lower electrode contact holes, and etching back the first conductive layer gap-filled into the first lower electrode contact hole to form a lower electrode contact; Etching an upper portion of the interlayer insulating layer adjacent to the lower electrode contact to protrude an upper portion of the lower electrode contact; Depositing a phase change material film on the etched surface to gapfill the first lower electrode contact hole and to planarize until an upper surface of the lower electrode contact is exposed; Characterized in that it comprises a. Therefore, according to the present invention, the Joule thermal effect is improved in the contact region between the phase change material film and the lower electrode contact, so that the reset current is reduced and power consumption is reduced.

Description

Method of manufacturing phase change memory device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a phase change memory device. In particular, a phase change memory for increasing resistance of a lower electrode contact by minimizing a contact area between a lower electrode contact and a phase change material film in order to generate high temperature heat in a phase change region. A method for manufacturing a device.

Semiconductor memory devices are generally volatile memory devices such as DRAM and SRAM that lose data after a power failure or a certain time, and non-volatile memory devices that do not lose data even when the power supply is interrupted. Can be distinguished.

Nonvolatile memory devices have an almost indefinite storage capacity, and there is an increasing demand for flash memory that can electrically input and output data. However, a nonvolatile memory device, such as a flash memory device, has a disadvantage in that data processing speed is slower than that of a DRAM device which processes data randomly because a process of writing and reading data is performed in a certain order.

Accordingly, a next generation memory device having both advantages of a flash memory device in which stored data is not erased even when a power supply is cut off and a DRAM device having a high data processing speed have been developed. Such next-generation memory devices may include ferro-electric RAM (FRAM) devices, magnetic RAM (MRAM) devices, phase-change memory devices (PRAM) devices, and the like, depending on materials constituting memory cells. Polymer RAM (PoRAM) devices and the like.

Among the above-described memory devices, the phase change memory device stores information using an electrical conductivity or resistance difference between a crystalline phase and an amorphous phase depending on the temperature of a specific phase-change material. It is a nonvolatile memory device.

A method of storing data in a general structure PRAM is as follows. When a current is applied through an electrode under the phase change layer, heat is generated in the contact region between the lower electrode contact and the phase change material layer by the applied current.

When the heat generated exceeds the recrystallization temperature of the phase change film, the crystal structure of the phase change film is changed. The applied current is appropriately changed to intentionally change the crystal structure of the phase change film to a crystalline state or an amorphous state.

At this time, since the resistance value according to the change of the crystalline state and the amorphous state is changed, it is possible to distinguish the stored previous data value. In order to make the crystal state from the amorphous state, the crystallization takes place for some time at a temperature lower than the melting point.

Then, in order to make the crystal state amorphous, the temperature is raised to a melting point (melting point) and then quenched.

As described above, in order to operate the phase change material film, heat generated by the current flowing into the lower electrode contact and the resistance of the lower electrode contact is important, and the phase change material film contacting the upper portion of the lower electrode contact, that is, the phase change region is small. In order to easily convert to an amorphous or crystalline phase change material film even with a reset current, the contact area between the lower electrode contact and the phase change material film should be small.

In addition, in order to generate a large amount of heat by the same amount of current, the resistance of the lower electrode contact must be large.

However, in manufacturing a conventional phase change memory device, there is a limit in reducing the area of the lower electrode contact due to the limitation of the exposure equipment, thereby reducing the reset current and power consumption by reducing the contact area between the lower electrode contact and the phase change material film. There was a problem with difficulty.

An object of the present invention is to provide a method of manufacturing a phase change memory device in which a phase change material is brought into contact with a side of a lower electrode contact to minimize a contact area, thereby increasing the interface resistance between the phase change material film and the lower electrode contact.

According to another aspect of the present invention, there is provided a method of manufacturing a phase change memory device, the method including: forming an interlayer insulating layer on a substrate on which a lower structure is formed; Anisotropically etching the interlayer insulating layer to form first and second lower electrode contact holes having a rivet shape; Depositing a first conductive layer to gap-fill the first and second lower electrode contact holes, and etching back the first conductive layer gap-filled into the first lower electrode contact hole to form a lower electrode contact; Etching an upper portion of the interlayer insulating layer adjacent to the lower electrode contact to protrude an upper portion of the lower electrode contact; Depositing a phase change material film on the etched surface to gapfill the first lower electrode contact hole and to planarize until an upper surface of the lower electrode contact is exposed; Characterized in that it comprises a.

A method of manufacturing a phase change memory device of the present invention for achieving the above object comprises the steps of depositing a second conductive film on the planarized surface after the planarizing step; Forming a mask pattern on the second conductive layer; And etching the second conductive layer by using the mask pattern as an etch mask to form an upper electrode in contact with a portion of the planarized phase change material layer.

In the method of manufacturing a phase change memory device of the present invention for achieving the above object, the mask pattern is characterized in that the opening having a larger aperture than the second lower electrode contact hole is formed.

In the method of manufacturing a phase change memory device of the present invention for achieving the above object, the step of forming the first and second lower electrode contact holes is anisotropically etched the interlayer insulating film using a dual damascene process to form the head of the rivet The second lower electrode contact hole of the body shape of the rivet is formed on the first lower electrode contact hole and the first lower electrode contact hole of the.

In the method of manufacturing a phase change memory device of the present invention for achieving the above object, the forming of the lower electrode contact may include etching only the first conductive layer that has been gap-filled in the first lower electrode contact hole by adjusting an etching amount, The first conductive layer gap-filled in the second lower electrode contact hole is not etched.

The method of manufacturing a phase change memory device of the present invention for achieving the above object is characterized in that the first conductive film has an etching selectivity with respect to the interlayer insulating film.

In the method of manufacturing a phase change memory device of the present invention to achieve the above object, the step of protruding the upper portion of the lower electrode contact may be performed by selectively etching the upper portion of the interlayer insulating layer using a dry etching process to form an upper portion of the lower electrode contact. It is characterized by exposing the side.

The method of manufacturing a phase change memory device of the present invention for achieving the above object is characterized by using a plasma of any one gas selected from a compound of hydrogen, nitrogen and oxygen and fluorine as an etching gas.

In the method of manufacturing a phase change memory device of the present invention for achieving the above object, the phase change material film is a phase in which a reset current is applied to a portion in contact with the upper side of the exposed lower electrode contact to change the phase of the contact portion. The change region is formed.

In the method of manufacturing a phase change memory device of the present invention for achieving the above object, the planarization may include performing an etching back process or a chemical mechanical polishing process to increase the height of the upper surface of the lower electrode contact. And removing an upper portion and an upper portion of the phase change material layer.

The method of manufacturing a phase change memory device of the present invention for achieving the above object is characterized in that the first conductive film comprises any one of polysilicon, metal and conductive metal nitride doped with impurities.

The method of manufacturing a phase change memory device of the present invention for achieving the above object includes any one of tungsten (W), titanium (Ti), tantalum (Ta), aluminum (Al), and copper (Cu). Characterized in that.

The method of manufacturing a phase change memory device of the present invention for achieving the above object is the conductive metal nitride is tungsten nitride (WN), titanium nitride (TiN), tantalum nitride (TaN), aluminum nitride (AlN) and titanium aluminum nitride ( TiAlN), characterized in that it comprises any.

The method of manufacturing a phase change memory device of the present invention for achieving the above object is characterized in that the first conductive film is formed using any one of a sputtering process, a chemical vapor deposition process, and an atomic layer deposition process.

The method of manufacturing a phase change memory device of the present invention for achieving the above object is characterized in that the second conductive film comprises any one of polysilicon, metal and conductive metal nitride doped with impurities.

In the method of manufacturing the phase change memory device of the present invention, the Joule heat effect is improved in the contact area between the phase change material film and the lower electrode contact, so that the reset current is reduced and power consumption is reduced.

1A through 7A are plan views illustrating processes of manufacturing a phase change memory device according to an exemplary embodiment of the present invention.
1B to 7B are cross-sectional views of processes for describing a method of manufacturing a phase change memory device according to an embodiment of the present invention.

Hereinafter, the manufacturing method of the phase change memory device of the present invention will be described.

1A to 7B are plan and cross-sectional views of processes for explaining a method of manufacturing a phase change memory device according to an exemplary embodiment of the present invention. FIG. 1A through FIG. 7B are cutaway lines A-A in FIG. The cross section cut | disconnected by "is shown.

Hereinafter, only two memory cells are shown for convenience of understanding, but three or more memory cells may be formed in the X-axis and Y-axis directions.

First, as shown in FIG. 1B, after forming the interlayer insulating film 200 on the substrate 100 on which the lower structure 150 is formed, the interlayer insulating film 200 may be formed to have a different diameter by using a dual damascene process. By etching in the form of rivets coupled to the two cylinders having a top and bottom, forming the first and second lower electrode contact holes (200H, 300H) to partially expose the lower structure 150 in the interlayer insulating film (200).

The first and second lower electrode contact holes 200H and 300H are formed under the first lower electrode contact hole and the lower lower electrode contact hole in the shape of a rivet by using an anisotropic etching process in which the etching reaction proceeds only in the vertical direction. The second lower electrode contact hole 300H having a body shape of the rivet is formed.

Here, the damascene process is a pattern formed on the substrate in advance to deposit the metal using an electroplating method, chemical vapor deposition process, etc. and to remove the unnecessary parts by performing a chemical mechanical polishing (CMP) process In the process, the dual damascene process refers to a process of gapfilling holes when there are continuous holes such as vias in the damascene process.

In this embodiment, the above-described process is performed to deposit a phase change material film, which will be described later, on the side of the lower electrode contact, which is a metal component.

Referring to FIG. 1A, an interlayer insulating layer 200 surrounds a circumference of a circular lower structure positioned at the center.

The substrate 100 may include a silicon wafer, a silicon-on-insulator (SOI) substrate, or a metal oxide single crystal substrate, and the lower structure 150 may include contact regions, conductive patterns, pads, plugs, and the like formed on the substrate 100. It may include a contact.

The interlayer insulating film 200 includes at least one oxide film or nitride film.

For example, the oxide film is formed using tetraethly orthosilicate (TEOS), undoped silicate glass (USG), spin on glass (SOG), and oxide, and the nitride film is formed using silicon nitride (SixNy).

The interlayer insulating layer 200 is formed using a chemical vapor deposition (CVD) process, a plasma enhanced chemical vapor deposition (PECVD) process, an atomic layer deposition (ALD) process, and the lower structure 150 positioned on the substrate 100. It is formed at a height sufficient to completely cover it.

As shown in FIG. 2B, a first conductive layer (not shown) is deposited on the interlayer insulating layer 200 and the partially exposed lower structure 150 to form the first and second lower electrode contact holes 200H and 300H. After the gap fill, the etching amount is adjusted to etch back the first conductive layer gap-filled into the first lower electrode contact hole 200H to form the lower electrode contact 300.

The first conductive layer is formed using polysilicon, metal or conductive metal nitride doped with impurities for the lower electrode contact 300. For example, tungsten (W), titanium (Ti), tantalum (Ta), aluminum (Al), copper (Cu), tungsten nitride (WN), titanium nitride (TiN), tantalum nitride (TaN), aluminum nitride (AlN) or titanium aluminum nitride (TiAlN).

In addition, the first conductive film is formed using a sputtering process, a chemical vapor deposition process, and an atomic layer deposition process.

In this case, since the first conductive layer has an etching selectivity with respect to the interlayer insulating layer 200, only the first conductive layer that has been gap-filled in the first lower electrode contact hole 200H is etched and the etching amount is adjusted to control the second lower electrode contact hole 300H. Is not etched.

Referring to FIG. 2A, an interlayer insulating layer 200 surrounds a circumference of a circular lower electrode contact 300 positioned at the center.

As shown in FIG. 3B, the upper portion of the interlayer insulating layer is selectively etched using a dry etching process to protrude the upper portion of the lower electrode contact 300 to form the interlayer insulating layer recess 400H.

The interlayer insulating layer recess 400H is formed to expose the side surface of the lower electrode contact 300 and to gap-fill a phase change material film, which will be described later, to form a phase change region at a portion where the two materials contact each other.

The dry etching process is an etching method using a plasma of one gas selected from the group consisting of hydrogen (H 2), nitrogen (N 2), oxygen (O 2), a fluorine compound, and a chlorine compound as an etching gas.

In the present exemplary embodiment, the etching rate of the interlayer insulating layer 200 is significantly higher than that of the lower electrode contact 300 due to the linearity of gas plasma ions selected from a compound of hydrogen, nitrogen, oxygen, and fluorine. ) Is etched to a certain depth, but the lower electrode contact 300 remains to form a protruding cylindrical lower electrode contact 300.

Referring to FIG. 3A, the interlayer insulating layer 200 surrounds a circumference of a circular lower electrode contact 300 positioned at the center.

As shown in FIG. 4B, a phase change material film 400 is deposited on the etched surface to gap fill the first lower electrode contact hole 200H.

Here, the phase change material film 400 includes a chalcogenide compound, for example, germanium-antimony-tellurium (Ge-Sb-Te), arsenic-antimony-tellurium (As-Sb-Te), tin-antimony -Tellurium (Sn-Sb-Te), tin-indium-antimony-tellurium (Sn-In-Sb-Te), arsenic-germanium-antimony-tellurium (As-Ge-Sb-Te), etc. are mentioned. have.

Referring to FIG. 4A, a phase change material film 400 is formed by deposition.

As shown in FIG. 5B, a stop chemical mechanical polishing (Stop CMP) process is performed until the upper surface of the lower electrode contact 300 is exposed to exceed the height of the surface of the lower electrode contact 300. The upper electrode layer 300 and the phase change material layer 400 formed thereon are removed to separate the lower electrode contact 300.

That is, while performing the chemical mechanical polishing process on the upper surface of the interlayer insulating film 200 and the phase change material film 400, when the surface of the lower electrode contact 300 comes out, the polishing process is stopped.

Referring to FIG. 5A, a ring-shaped phase change material film 400 surrounds a circumference of a circular lower electrode contact 300 positioned in the center, and an interlayer insulating film 200 surrounds a circumference of the phase change material film 400. have.

As shown in FIG. 6B, a second conductive layer (not shown) is formed on the planarized surface by chemical mechanical polishing, and the upper electrode 500 is etched by etching the second conductive layer using a predetermined mask pattern as an etching mask. Form.

The mask pattern may include only a second conductive layer deposited on a portion of the lower electrode contact 300 and the phase change material layer 400 on the planarized surface by forming an opening having a larger aperture than the second lower electrode contact hole 300H. The upper conductive layer 500 is formed by etching the second conductive layer deposited on the remaining portion of the phase change material layer 400.

Here, the second conductive film does not necessarily have to be the same material and the same process because the lower electrode contact 300 and the resistance value are not necessarily uniform for the upper electrode 500.

Accordingly, the type of the second conductive film may include polysilicon, a metal, or a conductive metal nitride doped with impurities, and the forming process may include a sputtering process, a chemical vapor deposition process, and an atomic layer deposition process.

Referring to FIG. 6A, a ring-shaped phase change material film 400 surrounds a circumference of a circular lower electrode contact 300 positioned in the center, and an interlayer insulating film 200 surrounds a circumference of the phase change material film 400. The second conductive film in the form of a line extending in the Y-axis direction is in contact with the right side of the phase change material film 400 of each cell.

As shown in FIG. 7B, the insulating film 600 is deposited to cover all of the interlayer insulating film 200, the phase change material film 400, the lower electrode contact 300, and the upper electrode 500.

Referring to FIG. 7A, an insulating film 600 is deposited.

Assuming that the phase of the phase change material film 400 is a crystalline state, that is, a set state, the phase transition current from the upper electrode 500 to the lower electrode contact 300 via the phase change material film 400. (Irs) is applied.

The phase transition current Irs is a current that changes the phase of the portion in contact with the lower electrode contact 300 of the phase change material film 400 to an amorphous state, and is called a reset current.

Joule heat is generated in the contact area between the lower electrode contact 300 and the phase change material film 400 by the reset current, and the phase change area is in the phase change material film 400 contacting the lower electrode contact 300 of the reset current. (A1) is formed.

In this embodiment, as the phase change material film 400 contacts the side of the lower electrode contact 300, the contact area is reduced compared to the case where the phase change material film 400 is in contact with the upper surface of the lower electrode contact 300. The resistance of 300 is increased. Accordingly, even with a small reset current, the phase change region A1 can be easily converted into an amorphous or crystalline phase change material.

As described above, in the method of manufacturing the phase change memory device of the present invention, the phase change material film 400 is contacted with the side surface of the lower electrode contact 300 to minimize the contact area, thereby making the phase change material film 400 and the lower electrode contact ( By increasing the interfacial resistance between 300, the Joule thermal effect is improved in the contact region between the phase change material film 400 and the lower electrode contact 300, thereby reducing the reset current and reducing power consumption.

Although the above has been described with reference to a preferred embodiment of the present invention, those skilled in the art can be variously modified and modified within the scope of the present invention without departing from the spirit and scope of the present invention described in the claims below. It will be appreciated that it can be changed.

100: substrate 150: lower structure
200: interlayer insulating film 300: lower electrode contact
240: oxide film 400: phase change material film
500: upper electrode 600: insulating film

Claims (15)

Forming an interlayer insulating film on the substrate on which the lower structure is formed;
Anisotropically etching the interlayer insulating layer to form first and second lower electrode contact holes;
Depositing a first conductive layer to gap-fill the first and second lower electrode contact holes, and etching back the first conductive layer gap-filled into the first lower electrode contact hole to form a lower electrode contact;
Etching an upper portion of the interlayer insulating layer adjacent to the lower electrode contact to protrude an upper portion of the lower electrode contact;
Depositing a phase change material film on the etched surface to gapfill the first lower electrode contact hole and to planarize until an upper surface of the lower electrode contact is exposed;
Including,
And the second lower electrode contact hole is formed in the shape of a body of the rivet under the first lower electrode contact hole having a head shape of the rivet.
Claim 2 has been abandoned due to the setting registration fee. The method of claim 1,
After the planarization step
Depositing a second conductive film on the planarized surface;
Forming a mask pattern on the second conductive layer;
And etching the second conductive layer using the mask pattern as an etch mask to form an upper electrode in contact with a portion of the planarized phase change material layer.
Claim 3 was abandoned when the setup registration fee was paid. The method of claim 2,
The mask pattern is
And an opening having a larger aperture than the second lower electrode contact hole is formed.
Claim 4 was abandoned when the registration fee was paid. The method of claim 1,
Forming the first and second lower electrode contact holes
And anisotropically etching the interlayer insulating layer using a dual damascene process.
Claim 5 was abandoned upon payment of a set-up fee. The method of claim 4, wherein
Forming the lower electrode contact
The etching amount is adjusted to etch only the first conductive layer that has been gap-filled in the first lower electrode contact hole,
And the first conductive layer gap-filled in the second lower electrode contact hole is not etched.
Claim 6 was abandoned when the registration fee was paid. The method of claim 5, wherein
The first conductive film is
And a etch selectivity with respect to the interlayer insulating film.
Claim 7 was abandoned upon payment of a set-up fee. The method of claim 1,
Protruding the upper portion of the lower electrode contact
And selectively etching an upper portion of the interlayer insulating layer using a dry etching process to expose an upper side surface of the lower electrode contact.
Claim 8 was abandoned when the registration fee was paid. The method of claim 7, wherein
The dry etching process
A method for manufacturing a phase change memory device, characterized in that a plasma of any one gas selected from hydrogen, nitrogen, oxygen and fluorine is used as an etching gas.
Claim 9 was abandoned upon payment of a set-up fee. The method of claim 7, wherein
The phase change material film
And a reset current is applied to a portion of the exposed lower electrode contact in contact with an upper side of the exposed lower electrode contact to form a phase change region in which the phase of the contacted portion is changed.
Claim 10 was abandoned upon payment of a setup registration fee. The method of claim 1,
The planarization step
A method of manufacturing a phase change memory device comprising performing an etching back process or a chemical mechanical polishing process to remove an upper portion of the interlayer insulating layer and an upper portion of the phase change material layer formed above the upper surface of the lower electrode contact. .
Claim 11 was abandoned upon payment of a setup registration fee. The method of claim 1,
The first conductive film is
A method of manufacturing a phase change memory device comprising any one of polysilicon, a metal, and a conductive metal nitride doped with an impurity.
Claim 12 was abandoned upon payment of a registration fee. The method of claim 11,
The metal is
A method of manufacturing a phase change memory device comprising any one of tungsten (W), titanium (Ti), tantalum (Ta), aluminum (Al), and copper (Cu).
Claim 13 was abandoned upon payment of a registration fee. The method of claim 11,
The conductive metal nitride is
A method of manufacturing a phase change memory device comprising any one of tungsten nitride (WN), titanium nitride (TiN), tantalum nitride (TaN), aluminum nitride (AlN), and titanium aluminum nitride (TiAlN).
Claim 14 was abandoned when the registration fee was paid. The method of claim 1,
The first conductive film is
And a sputtering process, a chemical vapor deposition process, and an atomic layer deposition process.
Claim 15 was abandoned upon payment of a registration fee. The method of claim 2,
The second conductive film is
A method of manufacturing a phase change memory device comprising any one of polysilicon, a metal, and a conductive metal nitride doped with an impurity.

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