KR101043367B1 - Semiconductor Device and Method for Manufacturing the same - Google Patents

Abstract

According to the present invention, a silicon-on-dielectric (SOD) film as well as an insulating film is formed between two silicon layers constituting the semiconductor substrate to further generate stress on the semiconductor substrate, thereby increasing mobility of electrons and improving driving force of the transistor. A semiconductor device and a method of manufacturing the same are provided. According to an embodiment of the present disclosure, a semiconductor and a method of manufacturing the same may include: depositing an oxide film and a spin on dielectric (SOD) film on a lower silicon substrate, and forming an upper silicon substrate on the SOD film; And forming a transistor on the upper silicon substrate.

Description

Semiconductor device and method for manufacturing the same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a semiconductor device capable of increasing a yield in manufacturing a highly integrated semiconductor device and a technology related to the method.

As semiconductor devices are highly integrated, the size of field effect transistors (BFETs) is reduced to bulk silicon, and short channel effects and leakage are well known to those skilled in the art. Problems such as increase of a leakage current occur. In order to overcome these problems, a method of fabricating a semiconductor device for implementing a transistor on a substrate having a silicon on insulator (SOI) structure has been proposed. However, when implementing a transistor on a substrate having an SOI structure, a floating body effect occurs. In the substrate of the SOI structure, since the insulating film exists between the semiconductor substrate and the silicon layer, the substrate itself of the SOI structure has the structure of a capacitor. Therefore, when charge is repeatedly moved through the body of the transistor, charge is accumulated in the capacitor described above through bias, carrier generation, and recombination, and as a result, the operation of the semiconductor device is adversely affected. This is because the threshold voltage of the transistor changes due to the charge accumulated in the capacitor, and thermal energy is generated by repeating the process of accumulating and releasing the charge. The phenomenon of leakage current due to such electric field concentration is continuously occurring.

In the above-described method of manufacturing a semiconductor device, MOSFETs in the semiconductor device are used to reduce the leakage current and the body effect such as the drain-induced barrier lowering (DIBL) caused by the shorter effective channel. It has evolved into Seth Gate. However, as the effective channel is shorter, the recess technology using the trench is approaching its limit. In particular, conventional MOSFETs have been implanted with high concentrations of ion to reduce leakage current such as DIBL, which shortens the effective channel.However, such high concentrations of ion implantation may cause changes in body effects or swings in semiconductor devices. Was generated to reduce the driving force of the semiconductor device. Due to this process change, it is difficult to control characteristics such as the threshold voltage of the MOSFET in response to structural changes or defects, and there is a problem of reducing the mobility of doped ions by various thermal processes.

In order to solve the above-mentioned problems, the present invention provides a silicon on dielectric (SOD) film as well as an insulating film between two silicon layers constituting the semiconductor substrate, thereby generating more stress on the semiconductor substrate, thereby increasing the mobility of electrons ( A semiconductor device and a method of manufacturing the same are provided for increasing mobility and improving driving force of a transistor.

The present invention provides a method of manufacturing a semiconductor device, the method comprising: depositing an oxide film and a spin on dielectric (SOD) film on a lower silicon substrate, and forming an upper silicon substrate on the SOD film; And forming a transistor on the upper silicon substrate.

Preferably, the oxide film is characterized in that it is formed to a thickness of 50 kPa ~ 100 kPa.

Preferably, the SOD film is characterized in that it is formed to a thickness of 50 ~ 100Å.

Preferably, the upper silicon substrate is characterized in that formed to 500 ~ 1000Å thickness.

Preferably, the oxide film is formed using a radical oxidation method.

Preferably, forming a transistor on the upper silicon substrate includes forming an isolation layer defining an active region on the lower silicon substrate, performing a first ion implantation into the active region, and forming the active region. Etching to form a recess, forming a gate on the recess, and performing a second ion implantation into the active regions on both sides of the gate to form a source / drain region.

Preferably, the forming of the recess includes forming a photoresist film on the entire surface including the active region, forming a photoresist pattern by an exposure and development process using a recess mask, and using the photoresist pattern as a mask. Etching the active region to form a recess region, forming an oxide layer in the recess region, embedding a conductive layer, and planarizing etching the oxide layer and the conductive layer until the active region is exposed. Steps.

The forming of the gate may include forming a conductive layer and a hard mask layer over the entire surface including the recess, and etching the hard mask layer and the conductive layer until the active region is exposed. It includes.

Preferably, the first ion implantation is characterized in that the impurity is implanted in the 500 ~ 800Å depth on the active region.

Preferably, the second ion implantation is characterized in that the impurity is implanted into the active region 300 ~ 400Å depth.

In addition, the present invention provides a semiconductor substrate comprising forming an oxide film and an SOD film between two silicon layers.

Preferably, the oxide film is characterized in that it is formed to a thickness of 50 kPa ~ 100 kPa.

Preferably, the SOD film is characterized in that it is formed to a thickness of 50 ~ 100Å.

Preferably, the oxide film is formed using a radical oxidation method.

The present invention also provides a semiconductor device including a semiconductor substrate including an oxide film and an SOD film between upper and lower silicon layers, an active region defined in the upper silicon layer, and a transistor formed in the active region.

Preferably, the transistor comprises a recess gate.

Preferably, the oxide film is characterized in that it is formed to a thickness of 50 kPa ~ 100 kPa.

Preferably, the SOD film is characterized in that it is formed to a thickness of 50 ~ 100Å.

According to the present invention, a silicon-on-dielectric (SOD) film as well as an insulating film is formed between two silicon layers constituting a general SOI semiconductor substrate, thereby generating more stress on the semiconductor substrate and increasing mobility of electrons, thereby driving the driving force of the transistor. Has the advantage of improving.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

In addition, in the drawings, the thicknesses of layers and regions are exaggerated for clarity, and where it is mentioned that the layer is on another layer or substrate, it may be formed directly on another layer or substrate, or A third layer may be interposed between them.

Also, the same reference numerals throughout the specification represent the same components.

1A to 1E are cross-sectional views illustrating a semiconductor device and a method of manufacturing the same according to the present invention.

Referring to FIG. 1A, an oxide film 110 is formed on the lower silicon layer 100. At this time, the oxide film 110 is preferably formed to a thickness of 50 ~ 100 kHz. Here, the oxide film 110 is uniformly formed using a radical oxidation method. A SOD (Spin On Dielectric) 120 film is deposited on the oxide film 110. At this time, it is preferable that the SOD 120 film is formed to have a thickness of 50 mV to 100 mV. Material properties of the SOD 120 film deposited on the oxide film 110 may cause stress of the silicon layer 110, thereby improving mobility of electrons or ions in the active region.

Thereafter, an upper silicon layer 130 is formed on the SOD 120 film. At this time, the upper silicon layer 130 is preferably formed to a thickness of 500 ~ 1000Å. Here, when forming the upper silicon layer 130, it is preferable to form using a lattice structure that greatly increases the movement of electrons or ions.

Referring to FIG. 1B, an isolation layer 150 defining an active region 140 is formed in the upper silicon layer 130. At this time, the active region 140 is formed by etching 500 Å ~ 1000 Å depth. Thereafter, the upper silicon layer 130 is subjected to ion implantation 160 for adjusting the threshold voltage of the channel. In this case, it is preferable that the ion implantation 160 inject impurities at a Rp point (maximum depth into which impurities are implanted during ion implantation) at a depth of 500 kPa to 800 kPa.

Referring to FIG. 1C, after the photoresist film is formed over the entire surface including the active region 140, a photoresist pattern (not shown) is formed by an exposure and development process using a recess mask. The active region 140 is etched using the photoresist pattern as a mask to form a recess region (not shown). Next, after the oxide film 180 is formed in the recess region, the oxide layer 180 and the conductive layer 190 are planarized and etched until the active region 140 is exposed after embedding the conductive layer 190. The set 170 is formed.

Referring to FIG. 1D, a gate 200 including a conductive layer and a hard mask layer is formed on the recess 170. Thereafter, an insulating film (not shown) is formed on the entire surface including the gate 200, and then the gate spacer 210 is formed on the sidewall of the gate 200 through an etchback process.

Referring to FIG. 1E, ion implantation for forming the sources / drains 220 and 230 is performed in the active regions 140 exposed to the lower portions of both sides of the gate 200. In this case, the ion implantation is preferably implanted with impurities in the 300 ~ 400Å depth on the active region 140.

As described above, the present invention further forms a silicon on dielectric (SOD) film as well as an insulating film between two silicon layers constituting a general SOI semiconductor substrate, thereby generating more stress on the semiconductor substrate and improving mobility of electrons. It has the advantage of increasing the driving force of the transistor by increasing.

It will be apparent to those skilled in the art that various modifications, additions, and substitutions are possible, and that various modifications, additions and substitutions are possible, within the spirit and scope of the appended claims. As shown in Fig.

1A to 1E are cross-sectional views illustrating a semiconductor device and a method of manufacturing the same according to the present invention.

Claims (20)

Stacking an oxide film and an insulating film on the lower silicon layer; Forming an upper silicon layer on the insulating film; And Forming an isolation layer defining an active region in the upper silicon layer; Performing a first ion implantation into the active region; Etching the active region to form a recess; Forming a gate on the recess; And Forming a source and a drain region by performing second ion implantation into the active regions on both sides of the gate; Wherein the semiconductor device is a semiconductor device. Claim 2 has been abandoned due to the setting registration fee. The method of claim 1, The oxide film is a method of manufacturing a semiconductor device, characterized in that formed in 50 ~ 100Å thickness. Claim 3 was abandoned when the setup registration fee was paid. The method of claim 1, The insulating film is a manufacturing method of a semiconductor device, characterized in that the SOD (Spin On Dielectric) film. Claim 4 was abandoned when the registration fee was paid. The method of claim 1, The insulating film is a semiconductor device manufacturing method, characterized in that formed to a thickness of 50 ~ 100Å. Claim 5 was abandoned upon payment of a set-up fee. The method of claim 1, Claim 6 was abandoned when the registration fee was paid. The method of claim 1, The oxide film is a method of manufacturing a semiconductor device, characterized in that formed using a radical oxidation method. delete Claim 8 was abandoned when the registration fee was paid. The method of claim 1, Forming the recess Forming a photoresist on an entire surface including the active region; Forming a photoresist pattern by an exposure and development process using a recess mask; Etching the active region using the photoresist pattern as a mask to form a recess region; Forming an oxide film in the recess region, and then filling a conductive layer; And Planarization etching the oxide layer and the conductive layer until the active region is exposed Wherein the semiconductor device is a semiconductor device. Claim 9 was abandoned upon payment of a set-up fee. The method of claim 1, Forming the gate Forming a conductive layer and a hard mask layer over the entire surface including the recess; And Etching the hard mask layer and the conductive layer until the active region is exposed Wherein the semiconductor device is a semiconductor device. Claim 10 was abandoned upon payment of a setup registration fee. The method of claim 1, The first ion implantation method of manufacturing a semiconductor device, characterized in that for implanting impurities in the 500 ~ 800 Å depth on the active region. Claim 11 was abandoned upon payment of a setup registration fee. The method of claim 1, The second ion implantation method of manufacturing a semiconductor device, characterized in that to implant the impurities in the 300 ~ 400Å depth on the active region. delete delete delete delete A semiconductor substrate including an oxide film and an insulating film between upper and lower silicon layers; An isolation layer defining an active region in the upper silicon layer; A recess provided in the active region; A gate provided on the recess; And Source and drain regions provided in the active regions on both sides of the gate Semiconductor device comprising a. Claim 17 has been abandoned due to the setting registration fee. The method of claim 16, The insulating film is a semiconductor device, characterized in that the SOD (Spin On Dielectric) film. delete Claim 19 was abandoned upon payment of a registration fee. The method of claim 16, The oxide film is a semiconductor device, characterized in that formed to a thickness of 50 ~ 100Å. Claim 20 was abandoned upon payment of a registration fee. The method of claim 17, The SOD film is a semiconductor device, characterized in that formed in 50 ~ 100Å thickness.

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