KR101036511B1 - 입/출력 패드 장치 - Google Patents
입/출력 패드 장치 Download PDFInfo
- Publication number
- KR101036511B1 KR101036511B1 KR1020040054297A KR20040054297A KR101036511B1 KR 101036511 B1 KR101036511 B1 KR 101036511B1 KR 1020040054297 A KR1020040054297 A KR 1020040054297A KR 20040054297 A KR20040054297 A KR 20040054297A KR 101036511 B1 KR101036511 B1 KR 101036511B1
- Authority
- KR
- South Korea
- Prior art keywords
- output
- input
- terminal
- enable signal
- pad device
- Prior art date
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/10—Aspects relating to interfaces of memory device to external buses
- G11C2207/105—Aspects related to pads, pins or terminals
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Abstract
Description
Claims (5)
- 리드 모드시 데이타의 출력을 제어하기 위한 인에이블 신호를 활성화시키는 출력 제어수단; 및데이타 출력단에 연결된 전송게이트를 구비하여 상기 인에이블 신호의 활성화시 내부 입력신호를 상기 데이타 출력단으로 출력하는 데이타 출력수단을 구비하며,상기 전송게이트는,입력전압단과 상기 데이타 출력단 사이에 병렬 연결된 PMOS트랜지스터 및 NMOS트랜지스터를 구비하고,상기 PMOS트랜지스터 및 상기 NMOS트랜지스터는,게이트 단자를 통해 입력되는 상기 인에이블 신호의 활성화시 동시에 턴온됨을 특징으로 하는 입/출력 패드 장치.
- 제 1항에 있어서, 상기 데이타 출력수단은 상기 데이타 출력단과 접지전압단 사이에 연결된 로드 캐패시터를 더 구비함을 특징으로 하는 입/출력 패드 장치.
- 제 2항에 있어서, 상기 로드 캐패시터는 상기 인에이블 신호의 활성화시 입력전압단의 전압레벨이 전원전압 레벨일 경우 전하를 차지하고, 상기 입력전압단의 전압레벨이 접지전압 레벨일 경우 차지된 전하를 상기 데이타 출력단에 디스차지함을 특징으로 하는 입/출력 패드 장치.
- 삭제
- 제 1항에 있어서, 상기 데이타 출력수단은 상기 인에이블 신호를 입력받아 반전된 인에이블 신호를 상기 NMOS트랜지스터의 게이트 단자로 출력하는 인버터를 더 구비함을 특징으로 하는 입/출력 패드 장치.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020040054297A KR101036511B1 (ko) | 2004-07-13 | 2004-07-13 | 입/출력 패드 장치 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020040054297A KR101036511B1 (ko) | 2004-07-13 | 2004-07-13 | 입/출력 패드 장치 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20060005488A KR20060005488A (ko) | 2006-01-18 |
KR101036511B1 true KR101036511B1 (ko) | 2011-05-24 |
Family
ID=37117435
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020040054297A KR101036511B1 (ko) | 2004-07-13 | 2004-07-13 | 입/출력 패드 장치 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR101036511B1 (ko) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08251004A (ja) * | 1995-03-07 | 1996-09-27 | Matsushita Electron Corp | 出力回路 |
KR20010004578A (ko) * | 1999-06-29 | 2001-01-15 | 김영환 | 노이즈 감쇄 회로 |
-
2004
- 2004-07-13 KR KR1020040054297A patent/KR101036511B1/ko active IP Right Grant
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08251004A (ja) * | 1995-03-07 | 1996-09-27 | Matsushita Electron Corp | 出力回路 |
KR20010004578A (ko) * | 1999-06-29 | 2001-01-15 | 김영환 | 노이즈 감쇄 회로 |
Also Published As
Publication number | Publication date |
---|---|
KR20060005488A (ko) | 2006-01-18 |
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