KR101034085B1 - Light emitting device and fabrication method thereof - Google Patents

Abstract

PURPOSE: A light emitting device and manufacturing method thereof are provided to form a branched pattern and an air gap, thereby increasing light emitting efficiency by refracting, scattering, or reflecting light of a light emitting structure incident on a substrate. CONSTITUTION: A plurality of branched patterns(120) is formed on a substrate(110). An air gap(121) is formed among the branched patterns. A light emitting structure comprises a first semiconductor layer(130), an active layer(140), and a second semiconductor layer(150). At least three grooves are formed among at least three branches of each branched pattern. One of at least three branches of each branched pattern is arranged on a groove of another adjacent branched pattern.

Description

Light emitting device and manufacturing method thereof

The embodiment relates to a light emitting device and a method of manufacturing the same.

Light emitting diodes (LEDs) are semiconductor light emitting devices that convert current into light. Recently, the light emitting diode is gradually increasing in brightness, and is being used as a light source for a display, an automotive light source, and an illumination light source. A light emitting diode that emits white light having high efficiency by using a fluorescent material or by combining various color light emitting diodes. It is also possible to implement.

How to improve the light extraction structure to further improve the brightness and performance of the light emitting diode, how to improve the structure of the active layer, how to improve the current spreading, how to improve the structure of the electrode, to improve the structure of the light emitting diode package Various methods, including the method, have been tried.

The embodiment provides a light emitting device having a new structure.

The embodiment provides a light emitting device having improved light extraction efficiency and a method of manufacturing the same.

The light emitting device according to the embodiment includes a substrate on which a plurality of patterns are formed; Air gaps formed in the plurality of patterns; And a light emitting structure formed on the substrate and the air gap and emitting light.

The method of manufacturing a light emitting device according to the embodiment includes forming a plurality of patterns on a substrate; And forming a light emitting structure on the substrate, and forming an air gap on the plurality of patterns.

The embodiment can provide a light emitting device having a new structure.

The embodiment can provide a light emitting device capable of improving light extraction efficiency and a method of manufacturing the same.

In the description of an embodiment, each layer (film), region, pattern or structure is formed to be "on" or "under" a substrate, each layer (film), region, pad or pattern. In the case described, "on" and "under" include both being formed "directly" or "indirectly" through another layer. In addition, the criteria for the top or bottom of each layer will be described with reference to the drawings.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not necessarily reflect the actual size.

Hereinafter, a light emitting device and a method of manufacturing the same according to embodiments will be described with reference to the accompanying drawings.

1 is a cross-sectional view of a light emitting element 1 according to an embodiment.

Referring to FIG. 1, the light emitting device 1 may include a substrate 110 on which a plurality of branched patterns 120 are formed, an air gap 121 formed on the plurality of branched patterns 120, and the substrate 110. The first semiconductor layer 130 on, the active layer 140 on the first semiconductor layer 130, the second conductive semiconductor layer 150 on the active layer 140, the second conductive semiconductor layer ( The transparent electrode layer 160 on the transparent electrode layer 160, the first electrode 170 on the transparent electrode layer 160, and the second electrode 180 on the first semiconductor layer 130 are included.

The first semiconductor layer 130, the active layer 140, and the second conductive semiconductor layer 150 form a light emitting structure that emits light.

The substrate 110 and the plurality of branched patterns 120 may be formed of at least one of sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, and Ge.

The plurality of branched patterns 120 form a mask pattern on the substrate 110, and, for example, a dry etching method such as reactive ion etching (RIE) or inductive coupled plasma (ICP) according to the mask pattern. It may be formed by etching, but is not limited thereto.

6 and 9, the plurality of branched patterns 120 may include at least three sides 120a, 120b and 120c, and each of the at least three sides 120a, 120b and 120c The end portion is rounded, and the width of the middle portion may be formed to be thinner than the width of the end portion. On the other hand, various modifications are possible to the shape of the plurality of branched patterns 120, but is not limited thereto.

Each of the at least three sides 120a, 120b, and 120c may have the same length or different lengths. In addition, the smallest angle θ of the angle between two adjacent sides of the at least three sides 120a, 120b, and 120c may be formed to be less than 120 °, but is not limited thereto.

At least three grooves P are formed between the at least three sides 120a, 120b and 120c, and at least one of the at least three sides 120a, 120b and 120c of the branched pattern 120. Since is disposed in the groove (P) of the other adjacent branched pattern 120, the plurality of branched pattern 120 can be densely arranged in columns and rows, having a substantially constant first spacing (D2). You can do that. The first interval D2 may be, for example, 0.1 μm to 1 μm.

However, the arrangement and shape of the plurality of branched patterns 120 are not limited thereto. For example, the plurality of branched patterns 120 may be formed to be connected to each other.

The air gap 121 may be formed between at least three sides 120a, 120b, and 120c of the branched pattern 120, that is, at least one of the at least three grooves P. The air gap 121 may include air.

The plurality of branched patterns 120 are disposed to have the first spacing D2, and at least three sides 120a, 120b, and 120c of the plurality of branched patterns 120 are rounded at the end and are intermediate. Since the width of the portion is formed to be thinner than the width of the end portion, the first semiconductor layer 130 does not easily grow in at least three grooves P of the branched pattern 120. Accordingly, the air gap 121 may be formed in at least one of the at least three grooves P of the branched pattern 120.

The plurality of branched patterns 120 and the air gaps 121 formed on the substrate 110 may refract, scatter, or reflect light incident from the light emitting structure to the substrate 110. The light extraction efficiency of 1) can be improved.

The light emitting structure including the first semiconductor layer 130, the active layer 140, and the second conductivity type semiconductor layer 150 may be formed on the substrate 110.

The light emitting structure may include metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma chemical vapor deposition (PECVD), molecular beam growth (MBE), and molecular beam growth (MBE). Epitaxy), a hydride vapor phase growth method (HVPE; Hydride Vapor Phase Epitaxy), and the like.

The first semiconductor layer 130 may include a first conductivity type semiconductor layer. The first semiconductor layer 130 may include the first conductive semiconductor layer and may include a non-conductive semiconductor layer on the first conductive semiconductor layer, but is not limited thereto.

In addition, a buffer layer (not shown) may be formed between the first semiconductor layer 130 and the substrate 110 to alleviate the lattice constant difference between the two layers.

When the first semiconductor layer 130 or the buffer layer (not shown) is grown on the substrate 110, the plurality of branched patterns 120 are disposed to have the first gap D2, and the plurality of branched patterns 120 are disposed on the substrate 110. At least three sides 120a, 120b, and 120c of the branched pattern 120 have a rounded end portion and a width of the middle portion is formed to be thinner than the width of the end portion. The first semiconductor layer 130 or the buffer layer (not shown) may not easily grow in the grooves P. Accordingly, in the process of growing the first semiconductor layer 130 or the buffer layer (not shown), the air gap 121 may be formed in at least one of the three grooves P of the branched pattern 120. Can be.

The first conductive semiconductor layer, for example, may comprise n-type semiconductor layer, the n-type semiconductor layer is _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0 ≤y≤ 1, 0? X + y? Can be doped.

Since the non-conductive semiconductor layer is not doped with a conductive dopant, and has a significantly lower electrical conductivity than the first and second conductive semiconductor layers, for example, the non-conductive semiconductor layer may be an undoped GaN layer. It is not limited.

The active layer 140 may be formed on the first semiconductor layer 130.

In the active layer 140, electrons (or holes) injected through the first semiconductor layer 130 and holes (or electrons) injected through the second conductive semiconductor layer 150 meet each other, and the active layer ( 140 is a layer that emits light due to a band gap difference of an energy band according to a forming material.

The active layer 140 may be formed of a single quantum well structure or a multi quantum well structure (MQW), but is not limited thereto.

A clad layer (not shown) doped with an n-type or p-type dopant may be formed on and / or under the active layer 140, and the clad layer (not shown) may be implemented as an AlGaN layer or an InAlGaN layer. have.

The second conductivity type semiconductor layer 150 may be formed on the active layer 140. The second conductivity-type semiconductor layer 150 may be implemented as, for example, a p-type semiconductor layer, wherein the p-type semiconductor layer is In _x Al _y Ga _{1 -x- y} N (0 _{≦ x ≦} 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1), for example, may be selected from InAlGaN, GaN, AlGaN, InGaN, AlN, InN, AlInN, etc., Mg, Zn, Ca, Sr, P-type dopants such as Ba may be doped.

The transparent electrode layer 160 may be formed on the second conductive semiconductor layer 150. The transparent electrode layer 160 includes ITO, IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al-ZnO), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), IrOx, RuOx, At least one of RuOx / ITO, Ni / IrOx / Au, and Ni / IrOx / Au / ITO.

Meanwhile, a reflective electrode layer may be formed instead of the transparent electrode layer 160, and the reflective electrode layer may include at least one of silver (Ag), aluminum (Al), platinum (Pt), or paladin (Pd) having high reflection efficiency. Can be.

The first electrode 170 may be formed on the transparent electrode layer 160, and the second electrode 180 may be formed on the first semiconductor layer 130. The first and second electrodes 170 and 180 provide power to the light emitting device 1.

In this case, the second electrode 180 is subjected to mesa etching so that the first semiconductor layer 130 is exposed to the light emitting device 1, and on the exposed first semiconductor layer 130. Can be formed.

Hereinafter, the manufacturing process of the light emitting element 1 will be described in detail.

2-9 is a figure explaining the manufacturing process of the said light emitting element 1. As shown in FIG.

3 and 4, a mask pattern 112 including a plurality of first patterns 114 may be formed on the substrate 110. The plurality of first patterns 114 may be formed to correspond to the shapes of the plurality of branched patterns 120.

The substrate 110 may use at least one of sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge.

The mask pattern 112 may be formed of, for example, a photo resist.

The mask pattern 112 may be formed by, for example, performing a photolithography process including an exposure process and a development process, but is not limited thereto.

Hereinafter, the manufacturing method of the mask pattern 112 will be described.

First, a mask layer 112a having a plurality of second patterns 114a of FIG. 2 is formed on the substrate 110. In this case, unlike the plurality of first patterns 114, the plurality of second patterns 114a may be formed such that the thicknesses of the end portions and the middle portions of the three sides are constant.

Next, an exposure process is performed on the mask layer 112a according to the plurality of second patterns 114a. At this time, in the exposure process, the thickness of the mask layer 112a is, for example, 3 μm to 5 μm, preferably 4 μm, and an exposure time for performing the exposure process is, for example, 250 msec to 350 msec. Preferably, it may be 300msec.

Next, the mask pattern 112 may be provided by performing a development process on the mask layer 112a. In this case, the plurality of first patterns 114 may have a rounded end portion, and the width of the middle portion may be thinner than the width of the end portion by the exposure process.

On the other hand, the mask pattern 112 is not necessarily formed by the exposure process, but is not limited thereto. For example, the mask pattern 112 may be formed by a mask layer on which patterns corresponding to the plurality of first patterns 114 are formed.

5 to 7, the substrate 110 may be etched by a dry etching method such as, for example, reactive ion etching (RIE) or inductive coupled plasma (ICP) according to the mask pattern 112. The plurality of branched patterns 120 may be formed on the substrate.

The plurality of branched patterns 120 include at least three sides 120a, 120b, and 120c, and each of the three sides 120a, 120b, and 120c has a rounded end portion, and a width of the middle portion is It may be formed thinner than the width of the end portion.

The length of each of the at least three sides 120a, 120b, and 120c may be the same or different from each other, and the smallest angle of the angle between two adjacent sides of the at least three sides 120a, 120b, and 120c may be formed. θ) may be formed to be less than 120 °, but is not limited thereto.

At least three grooves P are formed between the at least three sides 120a, 120b, and 120c.

Any one of at least three sides 120a, 120b, and 120c of the branched pattern 120 is disposed in the groove P of the other adjacent branched pattern 120, and thus, the plurality of branched patterns 120. ) May have a substantially constant first spacing D2, and may be densely arranged in columns and rows. The first interval D2 may be, for example, 0.1 μm to 1 μm.

However, the arrangement and shape of the plurality of branched patterns 120 are not limited thereto. For example, the plurality of branched patterns 120 may be formed to be connected to each other.

8 and 9, the light emitting structure may be formed on the substrate 110 and the plurality of branched patterns 120. In this case, the air gap 121 may be formed in the plurality of branched patterns 120 in the process of forming the light emitting structure.

The air gap 121 may be formed in at least three grooves P of the branched pattern 120, and may include, for example, air.

The light emitting structure may include the first semiconductor layer 130, the active layer 140, and the second conductive semiconductor layer 150.

The light emitting structure may include metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma chemical vapor deposition (PECVD), molecular beam growth (MBE), and molecular beam growth (MBE). Epitaxy), a hydride vapor phase growth method (HVPE; Hydride Vapor Phase Epitaxy), and the like.

The first semiconductor layer 130 may include a first conductivity type semiconductor layer. Meanwhile, the first semiconductor layer 130 may include the first conductive semiconductor layer and may include a non-conductive semiconductor layer on the first conductive semiconductor layer, but is not limited thereto.

In addition, a buffer layer (not shown) may be formed between the first semiconductor layer 130 and the substrate 110 to alleviate the lattice constant difference between the two layers.

When the first semiconductor layer 130 or the buffer layer (not shown) is grown on the substrate 110, the plurality of branched patterns 120 are disposed to have the first gap D2. At least three sides 120a, 120b, and 120c of the plurality of branched patterns 120 are formed so that the ends are rounded and the width of the middle portion is thinner than the width of the ends, so that at least the branches of the branched pattern 120 The first semiconductor layer 130 or the buffer layer (not shown) may not easily grow in the three grooves P. Accordingly, in the process of forming the first semiconductor layer 130 or the buffer layer (not shown), the air gap 121 may be formed in at least one of the at least three grooves P of the branched pattern 120. Can be.

The first conductive semiconductor layer, for example, may comprise n-type semiconductor layer, the n-type semiconductor layer is _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0 ≤y≤ 1, 0? X + y? Can be doped.

Since the non-conductive semiconductor layer is not doped with a conductive dopant, and has a significantly lower electrical conductivity than the first and second conductive semiconductor layers, for example, the non-conductive semiconductor layer may be an undoped GaN layer. It is not limited.

The active layer 140 may be formed on the first semiconductor layer 130.

In the active layer 140, electrons (or holes) injected through the first semiconductor layer 130 and holes (or electrons) injected through the second conductive semiconductor layer 150 meet each other, and the active layer ( 140 is a layer that emits light due to a band gap difference of an energy band according to a forming material.

The active layer 140 may be formed of a single quantum well structure or a multi quantum well structure (MQW), but is not limited thereto.

A clad layer (not shown) doped with an n-type or p-type dopant may be formed on and / or under the active layer 140, and the clad layer (not shown) may be implemented as an AlGaN layer or an InAlGaN layer. have.

The second conductivity type semiconductor layer 150 may be formed on the active layer 140. The second conductivity-type semiconductor layer 150 may be implemented as, for example, a p-type semiconductor layer, wherein the p-type semiconductor layer is In _x Al _y Ga _{1 -x- y} N (0 _{≦ x ≦} 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1), for example, may be selected from InAlGaN, GaN, AlGaN, InGaN, AlN, InN, AlInN, etc., Mg, Zn, Ca, Sr, P-type dopants such as Ba may be doped.

8 and 1, the transparent electrode layer 160 may be formed on the second conductive semiconductor layer 150. The transparent electrode layer 160 includes ITO, IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al-ZnO), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), IrOx, RuOx, At least one of RuOx / ITO, Ni / IrOx / Au, and Ni / IrOx / Au / ITO.

Meanwhile, a reflective electrode layer may be formed instead of the transparent electrode layer 160, and the reflective electrode layer may include at least one of silver (Ag), aluminum (Al), platinum (Pt), or paladin (Pd) having high reflection efficiency. Can be.

The first electrode 170 may be formed on the transparent electrode layer 160, and the second electrode 180 may be formed on the first semiconductor layer 130. The first and second electrodes 170 and 180 provide power to the light emitting device 1.

In this case, the second electrode 180 is subjected to mesa etching so that the first semiconductor layer 130 is exposed to the light emitting device 1, and on the exposed first semiconductor layer 130. Can be formed.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

In addition, the above description has been made with reference to the embodiment, which is merely an example, and is not intended to limit the present invention. Those skilled in the art to which the present invention pertains will be illustrated as above without departing from the essential characteristics of the present embodiment. It will be appreciated that various modifications and applications are possible. For example, each component specifically shown in the embodiment can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

1 to 9 are views illustrating a light emitting device and a method of manufacturing the same according to the embodiment.

Claims (17)

A substrate having a plurality of branched patterns each having at least three side branches; An air gap formed between the plurality of branched patterns; And A light emitting structure formed on the substrate and the air gap and emitting light; At least three grooves are formed between at least three sides of the branched pattern. Any one of the three sides of the branched pattern is disposed in the groove of the other adjacent branched pattern, The air gap is formed between the sides of the branched pattern and the groove of the other adjacent branched pattern, The groove has a concave round shape and the side has a convex round shape. delete delete The method of claim 1, The substrate and the plurality of branched patterns are formed of at least one of sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge. The method of claim 1, Each of the at least three sides of the branched pattern has a rounded end portion, the width of the middle portion is thinner than the width of the end portion. The method of claim 1, The smallest of the angle between the two adjacent sides of the at least three sides of the light emitting device is less than 120 °. delete The method of claim 1, The light emitting device having a spacing between the plurality of branched patterns is 0.1μm to 1μm. The method of claim 1, The light emitting structure includes a first semiconductor layer, an active layer on the first semiconductor layer, and a second conductive semiconductor layer on the active layer. The method of claim 1, A light emitting device comprising a buffer layer between the light emitting structure and the substrate. Forming a plurality of branched patterns each having at least three side branches on the substrate; And Forming a light emitting structure on the substrate, and forming an air gap between the plurality of branched patterns; At least three grooves are formed between at least three sides of the branched pattern. Any one of the three sides of the branched pattern is disposed in the groove of the other adjacent branched pattern, The air gap is formed between the sides of the branched pattern and the groove of the other adjacent branched pattern, The groove has a concave round shape and the side has a convex round shape. delete The method of claim 11, Forming the plurality of branched patterns, Forming a mask layer having a plurality of second patterns corresponding to the plurality of branched patterns; Forming a mask pattern including a plurality of first patterns by performing an exposure process and a developing process on the mask layer; And Etching the substrate along the mask pattern to form the plurality of branched patterns; And the first pattern is formed in a shape corresponding to the concave round shape of the groove of the branch pattern and the convex round shape of the side by the exposure process. The method of claim 13, The mask layer has a thickness of 3 μm to 5 μm, and an exposure time for performing the exposure process is 250 msec to 350 msec. 15. The method of claim 14, The width of the end portion and the middle portion of the three sides of the plurality of second patterns is constant. The method of claim 11, The spacing between the plurality of branched patterns is a light emitting device manufacturing method of 0.1μm to 1μm. The method of claim 13, The etching method includes a light emitting device including reactive ion etching (RIE) or inductive coupled plasma (ICP).

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