KR101033987B1

KR101033987B1 - Method of repairing semiconductor device

Info

Publication number: KR101033987B1
Application number: KR1020080097129A
Authority: KR
Inventors: 김상헌
Original assignee: 주식회사 하이닉스반도체
Priority date: 2008-10-02
Filing date: 2008-10-02
Publication date: 2011-05-11
Also published as: KR20100037826A

Abstract

The present invention relates to a repair method of a semiconductor device, and to form a central portion of the fuse in a spaced apart state, and to damage the neighboring fuse by electrically connecting to the fuse corresponding to the normal cell or the defective cell by using a conductive layer. Disclosed is a technique capable of preventing the residue from remaining.

Repair, Fuse

Description

Repair method of semiconductor device {METHOD OF REPAIRING SEMICONDUCTOR DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a repair method for a semiconductor device, and more particularly, to a repair method for a semiconductor device using a fuse.

In general, in the manufacture of a semiconductor device, especially a memory device, if any one of a number of fine cells is defective, the semiconductor device does not function as a memory and thus is treated as a defective product.

However, even though only a few cells in the memory have failed, discarding the entire device as defective is an inefficient method of processing in terms of yield.

Therefore, the current yield is improved by replacing a defective cell in which a defect has occurred by using a redundancy cell previously installed in the memory device.

A repair method using a spare cell typically includes a defective cell in which defects are generated by preliminarily providing a spare word line provided to replace a normal word line and a spare bit line provided to replace a normal bit line for each cell array. The normal word line or the normal bit line is replaced with a spare word line or a spare bit line.

In detail, when a defect cell is selected through a test after wafer processing is completed, a program is executed in an internal circuit to replace an address corresponding to the defective cell with an address of a spare cell. Therefore, when the address signal corresponding to the defective cell is input in actual use, the data of the spare cell replaced in correspondence with the defective cell is accessed.

The most widely used method as described above is to blow a fuse with a laser beam to blow, thereby replacing a path of an address. Therefore, a conventional memory device includes a fuse unit capable of replacing an address path by irradiating a laser with a fuse to blow the laser. Here, the wiring broken by the laser irradiation is called a fuse, and the broken part and the surrounding area are called a fuse box.

The fuse part includes a plurality of fuse sets, and one fuse set may replace one address path. The number of fuse sets provided in the fuse unit is determined corresponding to the number of spare word lines or spare bit lines included in the memory device.

1 is a view showing a method for manufacturing a semiconductor device according to the prior art, (a) is a plan view, (b) and (c) is a cross-sectional view taken along the line AA 'of (a). Here, (b) shows a state before cutting the fuse, and (c) shows a state where the fuse corresponding to the defective cell is cut.

Referring to FIG. 1, a first interlayer insulating layer 12 including a second metal interconnection contact plug 14 is formed on a semiconductor substrate 10 having a predetermined lower structure (not shown). Next, a second metal wiring 22a and a fuse 22b are formed on the first interlayer insulating film 12 to connect with the second metal wiring contact plug 14. Here, the second metal wiring 22a and the fuse 22b include a laminated structure of the first barrier metal layer 16, the conductive layer 18, and the second barrier metal layer 20 (hereinafter, the fuse 22b). ) Is made of the same material as that of the second metal wiring 22a. In this case, the first barrier metal layer 16 and the second barrier metal layer 20 are formed of a titanium nitride (TiN) film or a titanium (Ti) film / titanium nitride (TiN) film, and the conductive layer 18 is made of aluminum. It is formed from an (Al) layer.

Next, a second interlayer insulating film 24 including a third metal wiring contact plug 26 is formed on the second metal wiring 22a and the fuse 22b. Next, a guard ring structure G that surrounds the fuse 22b is formed by forming a third metal wiring 28 connected to the third metal wiring contact plug 26 on the second interlayer insulating film 24.

Subsequently, a passivation layer 30 is formed on the third metal wiring 28 and the second interlayer insulating layer 24, and the passivation layer 30 and the second interlayer insulating layer 24 are etched by a photolithography process using a repair mask. A fuse open region 32 is formed to expose the fuse 22b. Then, a portion of the exposed fuse 22b is selectively further etched to make the thickness of the fuse 22b thin. Here, the etching process of the fuse 22b is to allow the fuse 22b to be easily cut by the laser energy during the subsequent blowing process, and is performed by performing a separate mask process.

Then, a blowing process is performed to irradiate a laser to the fuse 22b corresponding to the defective cell. Then, the fuse 22b absorbs and expands the laser energy at a predetermined pressure, and as a result, the fuse 22b is blown to be physically cut.

2 is a photograph showing a problem of a method of manufacturing a semiconductor device according to the prior art.

Referring to FIG. 2, when the fuse 22b is etched, a crack B may be caused in the fuse 22b, or the fuse 22b may be blown when over-etched. In addition, there is a problem in that the fuse 22b that is not to be cut by applying damage C to the adjacent fuse 22b while the fuse 22b is blown may be cut.

In addition to these problems, when the fuse 22b is not properly cut and residue remains during the blowing process, the fuse 22b is recognized as not being cut.

In addition, as the aluminum 18 is exposed by the etching process of the fuse 22b, the fuse 22b is oxidized, and the fuse 22b corresponding to the normal cell turns into a high resistance, thereby incorrectly recognizing that the fuse 22b is cut. There is this. In addition, in the 300 mm wafer, since the state of the chip, for example, the thickness of the fuse 22b is different for each wafer position, it is difficult to control the laser energy, which may cause a repair failure.

The present invention has the following object.

First, by forming the center portion of the fuse spaced apart, and electrically connected to the fuse corresponding to the normal cell or the defective cell by using a conductive layer to prevent damage to the neighboring fuses or to leave the residue. The purpose is.

Second, by contacting the fuse by depositing the same material as the barrier metal layer of the fuse to minimize the contact resistance, it is possible to prevent the spiking of the junction between silicon and aluminum during the subsequent package process.

Third, there is no need for an additional etching process to make the thickness of the fuse thin, which simplifies the process and prevents the oxidation of the fuse.

Fourth, the repair process can be performed irrespective of the state of the chip in the wafer, and thus the reliability of the process can be improved.

Fifth, the conductive layer deposition process for connecting the fuse is deposited in a desired area by using a nozzle, so that a separate mask process is not required, and thus the process can be simplified.

Repairing method of a semiconductor device according to the invention is formed in the form of a line on the semiconductor substrate, forming a fuse having a spaced portion; And selectively depositing a conductive layer on the spaced portion.

Here, the spacing is located in the center of the fuse, the spacing is located in a zigzag and the spacing of the adjacent fuse, the conductive layer is deposited on the spacing of the fuse corresponding to the normal cell or defective cell And the conductive layer is formed of any one selected from the group consisting of TiN, TiW, and TiAlN, and the conductive layer is formed of WN.

The conductive layer is formed to a thickness of 100 ~ 500Å, the conductive layer deposition process is performed using a nozzle, the conductive layer deposition process is performed using a connection ion beam device, the fuse forming step Thereafter, the method may further include forming a guard ring structure exposing the fuse.

The present invention provides the following effects.

First, by forming the center portion of the fuse in a spaced apart state, and electrically connected to the fuse corresponding to the normal cell or the defective cell by using a conductive layer to damage the neighboring fuse or to prevent the phenomenon that remains. Provide effect.

Second, by contacting the fuse by depositing the same material as the barrier metal layer of the fuse to minimize the contact resistance, it provides an effect to prevent the junction spiking between silicon and aluminum in the subsequent package process.

Third, no additional etching process is required to make the fuse thinner, which simplifies the process and provides an effect of preventing the oxidation of the fuse.

Fourth, the repair process can be performed regardless of the state of the chip in the wafer, thereby providing an effect of improving the process reliability.

Fifth, the conductive layer deposition process for connecting the fuse is deposited in a desired area by using a nozzle, thereby providing an effect of simplifying the process by eliminating a separate mask process.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a view showing a method of manufacturing a semiconductor device according to the present invention, (a) is a plan view, (b) and (c) is a cross-sectional view taken along the cut line D-D 'of (a). Here, (b) shows a state before cutting the fuse, and (c) shows a state where the fuse corresponding to the defective cell is cut.

Referring to FIG. 3, a first interlayer insulating layer 102 including a second metal wiring contact plug 104 is formed on a semiconductor substrate 100 having a predetermined lower structure (not shown). Next, a second metal wiring 112a and a fuse 112b are formed on the first interlayer insulating film 102 to connect with the second metal wiring contact plug 104. Here, the second metal wire 112a and the fuse 112b include a stacked structure of the first barrier metal layer 106, the conductive layer 108, and the second barrier metal layer 110. In this case, the first barrier metal layer 106 and the second barrier metal layer 110 may be formed of any one selected from a titanium nitride (TiN) film, a titanium (Ti) film, and a titanium nitride (TiN) film, and the conductive layer 108 may be formed. ) Is preferably formed of an aluminum (Al) layer.

In addition, the fuse 112b may be formed in a line shape, and the center portion 112 may be cut and spaced apart from each other. Here, for convenience of description, the cut portion of the fuse 112b is illustrated as a spaced portion S. Meanwhile, in the exemplary embodiment of the present invention, for example, the spacer S is positioned at the center of the fuse 112b. However, the present invention is not limited thereto, and as illustrated in FIG. 4, the spacer (S) of the fuse 112b is not limited thereto. S) may be located in a zigzag with the spaced portion (S) of the neighboring fuse (112b). When the fuse 112b is formed as shown in FIG. 4, a margin for the deposition region may be secured during the subsequent conductive layer deposition process, thereby minimizing the influence on the neighboring fuse 112b.

Next, a second interlayer insulating film 114 including a third metal wire contact plug 116 is formed on the second metal wire 112a and the fuse 112b. Next, a guard ring structure G covering the fuse 112b is formed by forming a third metal wire 118 connected to the third metal wire contact plug 116 on the second interlayer insulating film 114.

Subsequently, a passivation layer 120 is formed on the third metal wiring 118 and the second interlayer insulating layer 114, and the passivation layer 120 and the second interlayer insulating layer 114 are etched by a photolithography process using a repair mask. A fuse open region 122 is formed to expose the fuse 112b.

Next, the conductive layer 124 is deposited on the spaced portion S of the fuse 112b corresponding to the normal cell or the defective cell. Here, the conductive layer 124 may be deposited only on the spaced portion S, or may be deposited up to the top of the spaced portion S and the fuse 112b adjacent thereto, as shown in FIG. 3. In addition, the conductive layer 124 may be formed of any one selected from the same material as the second barrier metal layer 110 of the fuse 112b, for example, TiN, TiW, and TiAlN. The conductive layer 124 may be formed of a conductive film, for example, WN. Here, when the conductive layer 124 is formed of the same material as the second barrier metal layer 110, the contact resistance between the conductive layer 124 and the fuse 112b may be minimized, and the step coverage may be excellent. Therefore, it is easy to electrically connect the fuse 112b. In addition, the conductive layer 124 serves as a barrier metal layer in a subsequent package process to prevent junction spiking between silicon (Si) included in the insulating layer and aluminum 108 of the fuse 112b. can do.

In addition, the conductive layer 124 may be formed to a thickness of 100 to 500 kW so that the resistance of the fuse 112b may be lowered from several MΩ to several Ω to several kΩ. In this case, the conductive layer 124 forming process is preferably performed using a focused ion beam (FIB) device. The connected ion beam apparatus may set a specific region and deposit a desired material using a nozzle to form the conductive layer 124 without a separate process such as a mask. On the other hand, in addition to such a connected ion beam apparatus, another apparatus using a nozzle may be used.

As described above, the present invention is to cut the fuse 112b corresponding to the defective cell by electrically connecting only the fuse 112b corresponding to the normal cell or the defective cell in a state in which the fuse 112b is spaced apart. The same effect can be achieved. Therefore, it is not necessary to physically cut the fuse 112b by the laser energy, thereby preventing damage to the adjacent fuse 112b. In addition, since the deposition process of the conductive layer 124 is not a physical cutting, the residue itself does not remain. In addition, since the etching process of the fuse 112b is not necessary, the process may be simplified, and the phenomenon of oxidizing the fuse 112b may be prevented since the aluminum 108 is not exposed by the etching process of the fuse 112b.

It will be apparent to those skilled in the art that various modifications, additions, and substitutions are possible, and that various modifications, additions and substitutions are possible, within the spirit and scope of the appended claims. As shown in Fig.

1 is a view showing a method for manufacturing a semiconductor device according to the prior art.

Figure 2 is a photograph showing a problem of the manufacturing method of a semiconductor device according to the prior art.

3 is a view showing a method of manufacturing a semiconductor device according to the present invention.

4 is a diagram illustrating a method of manufacturing a semiconductor device in accordance with another embodiment of the present invention.

Claims

Forming a fuse on the semiconductor substrate in the form of a line, the fuse having a spacer; And

Selectively depositing a conductive layer on the gap corresponding to the normal cell or the defective cell

Repair method of a semiconductor device comprising a.

Claim 2 has been abandoned due to the setting registration fee.

The method of claim 1, wherein the spacer is located at a central portion of the fuse.

Claim 3 was abandoned when the setup registration fee was paid.

The method of claim 1, wherein the spacer is located in a zigzag fashion with the spacer of a neighboring fuse.

delete

Claim 6 was abandoned when the registration fee was paid.

The method of claim 1, wherein the conductive layer is formed of any one selected from the group consisting of TiN, TiW, and TiAlN.

Claim 7 was abandoned upon payment of a set-up fee.

The method of claim 1, wherein the conductive layer is formed of WN.

Claim 8 was abandoned when the registration fee was paid.

2. The method of claim 1, wherein the conductive layer is formed to a thickness of 100 ~ 500 kPa.

Claim 9 was abandoned upon payment of a set-up fee.

The method of claim 1, wherein the conductive layer deposition process is performed using a nozzle.

Claim 10 was abandoned upon payment of a setup registration fee.

The method of claim 9, wherein the conducting layer deposition process is performed using a connected ion beam apparatus.

Claim 11 was abandoned upon payment of a setup registration fee.

2. The method of claim 1, further comprising forming a guard ring structure for exposing the fuse after the fuse forming step.