KR101015267B1 - 가용 영역이 최대화된 집적 회로 패키지용 스트립 - Google Patents
가용 영역이 최대화된 집적 회로 패키지용 스트립 Download PDFInfo
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- KR101015267B1 KR101015267B1 KR1020087018588A KR20087018588A KR101015267B1 KR 101015267 B1 KR101015267 B1 KR 101015267B1 KR 1020087018588 A KR1020087018588 A KR 1020087018588A KR 20087018588 A KR20087018588 A KR 20087018588A KR 101015267 B1 KR101015267 B1 KR 101015267B1
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Abstract
Description
Claims (14)
- 스트립으로서,상기 스트립 상에는 다수의 집적 회로 패키지 윤곽부가 다수의 공정 툴 내에서 제조될 수 있으며,상기 스트립은, 유전층과;상기 유전층 상에 형성되어 있는 제1 금속층과;상기 제1 금속층의 반대 방향으로 상기 유전층 상에 형성되어 있는 제2 금속층과;상기 스트립의 제1 방향으로 배치되는 둘 이상의 패키지 윤곽부 행(row)과, 상기 제1 방향을 가로지르는 제2 방향으로 배치되는 둘 이상의 패키지 윤곽부 열(column)로 이루어진, 패키지 윤곽부 어레이와;다수의 공정 툴 중 적어도 하나의 공정 툴 내에서 스트립의 위치 기록을 가능하게 하며, 상기 스트립의 외측 가장자리에 형성되어 있는 하나 이상의 노치를 포함하며,상기 하나 이상의 노치는, 기준 구멍이 외측 가장자리에 인접하여 있는 스트립에 비해, 상기 하나 이상의 패키지 윤곽부가 상기 스트립의 외측 가장자리에 더 근접하게 형성하도록 하는 것을 특징으로 하는 스트립.
- 제1항에 있어서,하나 이상의 노치는, 광학 인식 감지기와 함께 작동 가능한 하나 이상의 기준 노치를 포함하는 것을 특징으로 하는 스트립.
- 제1항에 있어서,하나 이상의 노치는 안내 핀과 함께 작동 가능한 하나 이상의 안내 핀 노치를 포함하는 것을 특징으로 하는 스트립.
- 제1항에 있어서,상기 스트립은 스트립의 외측 가장자리로부터 내측으로 이격된 하나 이상의 구멍을 또한 포함하고, 상기 하나 이상의 구멍은 다수의 공정 툴 중 적어도 하나의 공정 툴 내에서 스트립의 위치 기록을 가능하게 하는 것을 특징으로 하는 스트립.
- 제4항에 있어서,하나 이상의 노치를 포함하는 가장자리는 하나 이상의 구멍을 포함하는 가장자리와 대향하는 것을 특징으로 하는 스트립.
- 제4항에 있어서,상기 스트립은 스트립의 적어도 한 면에 집적 회로 패키지를 봉입하는 성형 화합물을 또한 포함하고, 상기 성형 화합물은 스트립 내의 하나 이상의 구멍을 적어도 부분적으로 포위하도록 도포된 것을 특징으로 하는 스트립.
- 제1항에 있어서,하나 이상의 노치는 반원형인 것을 특징으로 하는 스트립.
- 제7항에 있어서,하나 이상의 노치는 반경이 1.5mm인 것을 특징으로 하는 스트립.
- 제7항에 있어서,하나 이상의 노치는 호 길이(arc length)가 180°인 것을 특징으로 하는 스트립.
- 제1항에 있어서,하나 이상의 노치는 형상이 난형, 삼각형, 정방형, 장방형 및 사다리꼴 중에서 적어도 하나인 것을 특징으로 하는 스트립.
- 제1항에 있어서,상기 스트립은 11열과 7행의 집적 회로 패키지 윤곽부를 포함하는 것을 특징으로 하는 스트립.
- 제11항에 있어서,하나 이상의 노치는 집적 회로 패키지 윤곽부의 모든 열마다 하나의 기준 노치를 포함하는 것을 특징으로 하는 스트립.
- 삭제
- 삭제
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/321,426 US20070163109A1 (en) | 2005-12-29 | 2005-12-29 | Strip for integrated circuit packages having a maximized usable area |
US11/321,426 | 2005-12-29 |
Publications (2)
Publication Number | Publication Date |
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KR20080092928A KR20080092928A (ko) | 2008-10-16 |
KR101015267B1 true KR101015267B1 (ko) | 2011-02-18 |
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KR1020087018588A KR101015267B1 (ko) | 2005-12-29 | 2006-12-27 | 가용 영역이 최대화된 집적 회로 패키지용 스트립 |
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US (1) | US20070163109A1 (ko) |
EP (1) | EP1969623A2 (ko) |
KR (1) | KR101015267B1 (ko) |
CN (1) | CN101351876B (ko) |
TW (1) | TWI355694B (ko) |
WO (1) | WO2007079122A2 (ko) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100752011B1 (ko) * | 2006-04-12 | 2007-08-28 | 삼성전기주식회사 | 패키지 기판의 스트립 포맷 및 그 배열 |
US20080079061A1 (en) * | 2006-09-28 | 2008-04-03 | Advanced Micro Devices, Inc. | Flash memory cell structure for increased program speed and erase speed |
CN104380846A (zh) * | 2012-05-30 | 2015-02-25 | 古河电气工业株式会社 | 金属芯基板、金属芯基板的制造方法、以及在所述金属芯基板和所述金属芯基板的制造方法中使用的芯板 |
US10483250B2 (en) * | 2015-11-04 | 2019-11-19 | Intel Corporation | Three-dimensional small form factor system in package architecture |
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JPH0286156A (ja) * | 1988-09-21 | 1990-03-27 | Nec Kansai Ltd | リードフレーム |
JPH02137252A (ja) * | 1988-11-17 | 1990-05-25 | Nec Yamagata Ltd | 半導体装置用リードフレーム |
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US7485501B2 (en) * | 2005-11-02 | 2009-02-03 | Sandisk Corporation | Method of manufacturing flash memory cards |
-
2005
- 2005-12-29 US US11/321,426 patent/US20070163109A1/en not_active Abandoned
-
2006
- 2006-12-27 WO PCT/US2006/049379 patent/WO2007079122A2/en active Application Filing
- 2006-12-27 CN CN2006800500843A patent/CN101351876B/zh not_active Expired - Fee Related
- 2006-12-27 KR KR1020087018588A patent/KR101015267B1/ko active IP Right Grant
- 2006-12-27 EP EP06849132A patent/EP1969623A2/en not_active Withdrawn
- 2006-12-28 TW TW095149585A patent/TWI355694B/zh not_active IP Right Cessation
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EP0069390A2 (en) * | 1981-07-06 | 1983-01-12 | Matsushita Electronics Corporation | Lead frame for plastic encapsulated semiconductor device |
JPH0286156A (ja) * | 1988-09-21 | 1990-03-27 | Nec Kansai Ltd | リードフレーム |
JPH02137252A (ja) * | 1988-11-17 | 1990-05-25 | Nec Yamagata Ltd | 半導体装置用リードフレーム |
Also Published As
Publication number | Publication date |
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CN101351876A (zh) | 2009-01-21 |
TWI355694B (en) | 2012-01-01 |
WO2007079122A2 (en) | 2007-07-12 |
CN101351876B (zh) | 2011-06-08 |
TW200741897A (en) | 2007-11-01 |
EP1969623A2 (en) | 2008-09-17 |
WO2007079122A3 (en) | 2007-09-07 |
US20070163109A1 (en) | 2007-07-19 |
KR20080092928A (ko) | 2008-10-16 |
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