KR100989226B1 - field sequential color LCD - Google Patents

Abstract

A time division color liquid crystal display device according to the present invention comprises: a liquid crystal panel; A gate pad and a data pad formed side by side at the bottom of the liquid crystal panel; A gate driving IC and a data driving IC mounted on a flexible printed circuit (FPC) film; A plurality of gate lines drawn out from the gate pad and arranged vertically in the liquid crystal panel and a plurality of data lines drawn out from the data pad and arranged horizontally in the liquid crystal panel; A gamma voltage generator for applying a gamma voltage having a different magnitude is included in the data driver IC so that a data voltage having a different magnitude is applied to each data line for representing the same gray scale.

Description

Time division color liquid crystal display {field sequential color LCD}

1 is a block diagram schematically illustrating a light source driver of a time division color liquid crystal display;

FIG. 2 is a view illustrating a method of driving each light source to display a color image in the time division color liquid crystal display shown in FIG.

3 is a plan view showing a module of a conventional liquid crystal display device.

4 is a plan view showing a module of a time division color liquid crystal display according to the present invention;

5 is a cross-sectional view of a portion of a liquid crystal panel of a time division liquid crystal display according to the present invention;

6 is a diagram illustrating a circuit configuration of a gamma voltage generator according to the present invention.

<Explanation of symbols for the main parts of the drawings>

44: gate pad 46: data pad

52: gate driving IC 54: data driving IC

55 gamma voltage generator

The present invention relates to a time division color liquid crystal display device, and more particularly, to a time division color liquid crystal display device applied to a small terminal.

In time-division color liquid crystal display, in order to display an image, three primary colors (red, green, blue) provided in the backlight are sequentially used without using a color filter of red, green, and blue. By using the drive method, a driving method capable of displaying colors using the afterimage effect of the human eye is used.

1 is a block diagram schematically illustrating a light source driver of a time division color liquid crystal display.

Referring to FIG. 1, a light source driver of a conventional time division color liquid crystal display device stores a system interface unit 110 receiving RGB data for displaying an image, and RGB data received from the system interface unit 110. Each of red constituting each frame for displaying a screen among the memory 120, the memory controller 130 controlling the operation of the memory 120, and the RGB data stored in the memory 120. ), And a timing controller 140 for extracting data for green (G) and blue (B) colors to drive each of the red (R), green (G), and blue (B) light sources of the backlight.

Next, a driving method of displaying a color image in the time division color liquid crystal display having the above configuration will be described with reference to FIG. 2.

FIG. 2 is a diagram illustrating a method of driving each light source to display a color image in the time division color liquid crystal display shown in FIG. 1.                         

Referring to FIGS. 1 and 2, first, the system interface 110 receives RGB data for displaying an image. In addition, the RGB data received by the system interface unit 110 is stored in the memory 120.

Accordingly, the timing controller 140 controls the red, green, and blue colors of the RGB data stored in the memory 120 to form a frame for displaying a screen. It is possible to display the received color image by extracting the data of the data, adjusting the timing according to each RGB data, and driving each of the red (R), green (G), and blue (B) light sources of the backlight.

That is, the driving timing of the red (R) light source of the backlight is, as shown in FIG. 2, the TFT scanning time (R TFT Scan) time by the red (R) data under the control of the timing controller 140 (t _TFT). ), And timing is adjusted in consideration of the alignment time (t _LC ) of the liquid crystal panel with respect to the red (R) color display, and when the alignment of the liquid crystal panel for the red (R) color display is completed, the red (R) light source is driven. (R light flash).

In this same manner, the driving timing of each green (G) light source and blue (B) light source of the backlight is aligned with the liquid crystal panel for the green (G) color display and the liquid crystal panel for the blue (B) color display, respectively. After that, driving to the green (G) light source and the blue (B) light source is performed, respectively.

As described above, in the time-division color liquid crystal display, as the red (R) / green (G) / blue (B) light source is sequentially driven, the color color may be displayed using the afterimage effect of the human eye.

Also, in recent years, the spread of mobile communication terminals such as mobile phones and PCS (Personal Communication System) has been rapidly expanding, and compared to such mobile communication terminals, a personal digital information device (PDA) or HPC ( Hand Handled PC) is commercially available.

Such portable information terminals are being miniaturized to be convenient for individuals to carry, and according to this miniaturization trend, portable information terminals are used as a means for displaying images (Liquid Crystal Display: hereinafter referred to as 'LCD'). Modules are also emerging as miniaturization.

3 is a plan view illustrating a module of a conventional liquid crystal display device.

However, this is a plan view showing a module of a liquid crystal display device applied to a conventional small terminal.

Referring to FIG. 3, this is a gate driving integrated circuit mounted on a liquid crystal panel 11, a gate pad 14 and a data pad 16, and a flexible printed circuit (FPC) film 18. 22) and the data driver IC 24, and the FPC film 26 for input / output wiring connecting the FPC film 18 and the main board 30 is provided.

In the liquid crystal panel 11, liquid crystal cells are arranged in a matrix at the intersections of the gate lines GL and the data lines DL.

The gate pad 14 and the data pad 16 are formed at a lower edge of the liquid crystal panel 11 as one pad group. The gate pads 14 are positioned at the bottom left of the liquid crystal panel 11 and connected to gate lines arranged horizontally on the panel, and the data pads 16 are parallel to the gate pads 14. Located at the bottom right of the is connected to each of the data lines arranged vertically on the panel.

In addition, the output pads of the FPC film 18 may include gate pads 14 and data pads disposed side by side at the bottom of the liquid crystal panel 11 by an anisotropic conductive film (hereinafter, referred to as an “ACF”). It is bonded to 16. The gate driving IC and the data driving ICs 22 and 24 are mounted on the FPC film 18 in a chip on glass (hereinafter referred to as COG) method.

In addition, the input / output wiring FPC film 26 forms wirings through which signals are transmitted to form a signal transmission path between the main board 30 and the driving FPC film 18. The connector 28 is installed at the end of the FPC film 26 for input / output wiring and connected to the jack of the main board 30.

Assuming that a liquid crystal display module having such a configuration is configured of QVGA level 240 * 320, 320 gate lines GL are horizontally arranged on the liquid crystal panel 11, and 240 * 3, that is, 720 data. Lines DL are arranged vertically of the liquid crystal panel 11.

In this case, as illustrated, the lengths of the gate line GL1 and the gate line GL320 connected to the gate pad 14 are greatly different so that the resistance of the line is different. Since the output signal has a low frequency and a large voltage, the image quality problem due to the resistance difference according to the line length difference does not matter.                         

However, there is a problem when the liquid crystal display device applied to the small terminal is the time division color liquid crystal display device described above.

That is, the length of the data line close to the data pad and the far data line are greatly different, so that the resistance of the line is different. The signal output from the data driver IC has a higher frequency and a higher voltage than the signal output from the gate driver IC. As a result, when the time-division color liquid crystal display device is applied to the liquid crystal display device for a small terminal, the image quality defect is caused by the resistance difference of the data line.

According to the present invention, a gamma voltage generator for providing a gamma voltage to a data driver IC includes a resistance greater than the gamma voltage, thereby applying different voltages to a data line near a data pad and a data line far from the data pad. Accordingly, an object of the present invention is to provide a time division color liquid crystal display device which overcomes poor image quality due to the resistance difference of the data line.

In order to achieve the above object, a time division color liquid crystal display device according to the present invention,

A liquid crystal panel; A gate pad and a data pad formed side by side at the bottom of the liquid crystal panel; A gate driving IC and a data driving IC mounted on a flexible printed circuit (FPC) film; A plurality of gate lines drawn out from the gate pad and arranged vertically in the liquid crystal panel and a plurality of data lines drawn out from the data pad and arranged horizontally in the liquid crystal panel; A gamma voltage generator for applying a gamma voltage having a different magnitude is included in the data driver IC so that a data voltage having a different magnitude is applied to each data line for representing the same gray scale.

In addition, the system interface for receiving red (R), green (G), blue (B) data for displaying the image; A memory storing RGB data received from the system interface unit; From the memory control unit for controlling the operation of the memory and the RGB data stored in the memory, the data for each R, G, B color constituting each frame for displaying a screen is extracted and the respective R, G, A timing control unit for driving the B light source is further included.

In addition, a plurality of data lines arranged on the liquid crystal panel may be drawn out to different lengths from the data pads.

In addition, the gamma voltage generator is characterized in that to provide a gamma voltage to the data lines representing the same gray level, so that a higher voltage is applied to the data line far from the data pad than the data line close to the data pad. .

In addition, the gamma voltage generating unit is characterized in that the resistance is provided than the number of the gamma voltage to be generated.

In addition, the time division color liquid crystal display device is characterized in that it is applied to a small terminal.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. FIG. 4 is a plan view illustrating a module of a time division color liquid crystal display according to the present invention.

However, this is a plan view showing a module of a time division color liquid crystal display device applied to a small terminal.

Although the time division color liquid crystal display includes the components described with reference to FIG. 1, the description of the components will be omitted for convenience.

Referring to FIG. 4, the time-division color liquid crystal display module according to the present invention includes a liquid crystal panel 41, a gate pad 44 and a data pad 46 formed side by side at the bottom of the liquid crystal panel 41, and an FPC ( Flexible Printed Circuit) A gate driving integrated circuit (hereinafter referred to as an 'IC') 52 and a data driving IC 54 mounted on a film 48, an FPC film 48 and a main board 60. It consists of the FPC film 56 for input / output wiring which connects between them.

Here, the gate pad 44 and the data pad 46 are formed at the bottom edge of the liquid crystal panel 41 as one pad group. The gate pads 44 are positioned at one lower end of the liquid crystal panel 41 and connected to gate lines arranged horizontally on the panel, and the data pads 46 are parallel to the gate pads 44. Located on the other side of the bottom of the connected to the data lines arranged vertically on the panel.

In the present invention, the gamma voltage generator 55 providing the gamma voltage to the data driver IC 54 has a larger number of resistors than the gamma voltage, so that the data line DL1 is close to the data pad 46. ) And a different voltage to the data line DL 320... Far from the data pad 46.

In the liquid crystal panel 41, liquid crystal cells are arranged in a matrix form at intersections of the gate lines GL and the data lines DL. The liquid crystal panel 41 bonds an upper substrate on which a common electrode and an alignment layer are sequentially formed, a thin film transistor (hereinafter referred to as TFT), a lower substrate on which a pixel electrode and an alignment layer are sequentially formed, and then liquid crystals. It is completed by forming a, the structure of such a liquid crystal panel will be described briefly below with reference to FIG.

5 is a cross-sectional view of a portion of a liquid crystal panel of the time division liquid crystal display according to the present invention.

Referring to FIG. 5, the lower substrate 500 includes a display area I in which a liquid crystal cell, that is, subpixels are formed in a matrix form, and a non-display area formed outside the active area I. The region includes a thin film transistor T formed of a gate electrode 510, a semiconductor layer 512, and source / drain electrodes 514 and 516, and a pixel electrode formed on the pixel region P connected to the thin film transistor T. A plurality of subpixels having 518 are formed. The semiconductor layer 512 is formed to include an ohmic contact layer.

In addition, a black matrix 522 and a common electrode 524 are formed on the upper substrate 520. Since the present invention is driven in a time division color mode, the color filter is applied to the upper substrate 520 unlike the conventional liquid crystal display. Is not formed, and since the formation area of the black matrix 522 is smaller than that of the conventional liquid crystal display device, the aperture ratio is improved in the present invention.                     

As shown, a liquid crystal layer 540 is formed between the upper and lower substrates 500 and 520, and a spacer for maintaining a constant cell gap between the upper and lower substrates in the liquid crystal layer 540. 542 is positioned, and a seal pattern 550 is formed on the non-display area in order to maintain a cell gap and prevent leakage of the liquid crystal layer.

In addition, in order to connect the external circuit and the liquid crystal display device to the outer region of the seal pattern 550 on the lower substrate, for example, an end of the data line 519 connected to the source electrode 514 forming the thin film transistor T. The data pad portion 530 is formed in the portion.

In this case, although not shown, an alignment layer is formed on each of the inner surfaces of the upper and lower substrates in contact with the liquid crystal layers, and a lower side of the liquid crystal panel includes red (R), green (G), and blue (B) light sources. It is provided.

Referring to FIG. 4 again, the output pads of the FPC film 48 may include gate pads disposed side by side at the bottom of the liquid crystal panel 41 by an anisotropic conductive film (hereinafter, referred to as “ACF”). 44 and a data pad 46. Gate driving ICs and data driving ICs 52 and 54 are mounted on the FPC film 48 in a chip on glass (hereinafter referred to as 'COG') method.

The gate driving ICs 52 generate a scanning signal, that is, a gate signal. The scanning signal is supplied to the gate lines GL via the output pad and the gate pad 44 of the FPC film 48. The liquid crystal panel is sequentially scanned line by line by the scanning signals thus supplied.

Since the liquid crystal display according to the present invention is driven in the time division color mode, the number of the gate lines GL should be small in order to obtain sufficient luminance.

Accordingly, when QVGA is applied, for example, 240 gate lines are needed instead of 320, unlike conventional LCDs.

In addition, since the gate lines GL are applied to the small terminal, the gate lines GL may be connected to the gate pads 44 formed at one side of the lower edge of the liquid crystal panel 41 to be vertical in the liquid crystal panel 41 in the same manner as a conventional data line. Is arranged.

In this case, when the length of the gate line GL is vertically connected to the liquid crystal panel 41, the signal delay problem due to the line resistance does not occur.

Next, the data driving ICs 54 supply video data, that is, data signals, to the data lines DL by one line. The data signal is charged in liquid crystal pixel cells connected to the line to be scanned.

However, since the liquid crystal display according to the present invention is driven in the time division color mode, it is not necessary to include one pixel with three R, G, and B subpixels, so the number of data lines DL is reduced. .

For example, when the QVGA class is applied, unlike the conventional LCD, 240 data lines are required instead of 240 * 3, that is, 720.

However, since the 320 data lines are larger than the number of 240 gate lines mentioned above, they are arranged horizontally in the liquid crystal panel 41 as the conventional gate lines are arranged.

That is, in this case, the lengths of the first data line DL1 and the 320th data line DL320 connected to the data pad 46 are greatly different from each other.

Meanwhile, a timing controller (not shown) for controlling the gate driving ICs 52 and the data driving ICs 54 may be mounted on the FPC film 48. The timing controller supplies a gate start pulse to each of the gate driver ICs 52 implemented as a shift register (not shown), and also red, green, and blue (R, G, B) together with a dot clock to the data driver IC 54. ) Supply data.

In addition, the input / output wiring FPC film 56 forms wirings through which signals are transmitted to form a signal transmission path between the main board 60 and the driving FPC film 48. The connector 58 is installed at the end of the FPC film 56 for input / output wiring and connected to the jack of the main board 60.

The main board 60 supplies a video signal and a control signal to the driving FPC film 58 through the FPC film 56 for input / output wiring, including a microcomputer, a graphic processing circuit, and the like.

According to an exemplary embodiment of the present invention, the lengths of the first data line DL1 and the 320 data line DL320 that are connected to the data pad 46 are greatly different, that is, the data line of a portion close to the data pad 46. In order to prevent the occurrence of signal delay due to the line resistance because the lengths of the distant data lines are different, a different voltage is applied to each data line representing the same gray scale. .

That is, by applying a higher voltage to the data line farther from the data pad 41 than the data line closer to the data pad 41, the signal delay according to the line resistance is compensated for, thereby expressing the same gray scale. It is to be done.                     

6 is a diagram illustrating a circuit configuration of a gamma voltage generator according to the present invention.

The gamma voltage generator is configured to generate the gamma voltages GVH1 to GVHn of positive polarity and negative polarity to generate a gamma voltage Vgamma having an inverted polarity every one horizontal period 1Hs. Although negative polarity parts are provided for generating gamma voltages GVL1 to GVLn of-), only positive polarity parts for generating positive gamma voltages are shown below for convenience of description.

In addition, it will be described as an example that five of the gamma voltage to be generated in the gamma voltage generator.

4 to 6, the gamma voltage generator 55 divides the power voltage VDD1 applied from the outside according to the resistance ratio of the first to eighth resistors R1 to R8 connected in series. The eight nodes are used to generate the first to seventh positive gamma voltages GVH1 to GVH7.

However, the gray scale finally expressed through the liquid crystal panel 41 is based on the first to fifth gamma voltages, which are higher than the desired gray scale to compensate for the line resistance of the data line far from the data pad 46. Because

That is, in the present invention, since the gamma voltage generated by the gamma voltage generator 55 is divided into five levels and applied to the data driver IC 54, five resistors provided in the gamma voltage generator 55 are not formed. And eight more resistors are provided.                     

As described above, in the present invention, the length of the data line near the data pad 46 and the length of the far away data line are different, so that the same gray level is prevented in order to prevent a signal delay phenomenon due to the line resistance. To apply different voltages to each data line to represent.

In other words, by applying a higher voltage to the data line farther from the data pad 46 than the data line closer to the data pad 46, the signal delay according to the line resistance is compensated for to express the same gray scale. It is done.

For example, when the gamma voltage representing the fourth level grayscale GVH4 is applied to the data line, the gamma voltage GVH4 caused by the fourth resistor is applied to the first data line DL1 close to the data pad 46 as it is. The gamma voltage GVH7 caused by the seventh resistor, which is a higher gamma voltage, is applied to the 320 data line DL320 far from the data pad 46.

Here, the 320th data line DL320 has a longer line length than the first data line DL1 and thus has a large line resistance value. Accordingly, a seventh level of gamma voltage GVH7 is applied to the 320th line DL320. Even if is applied, this is compensated by the line resistance so that the displayed gradation becomes the same as the fourth gradation level GVH4.

According to the time-division color liquid crystal display device for a small terminal according to the present invention, a gamma voltage generating portion for providing a gamma voltage to a data driving IC includes a larger number of resistors than the gamma voltage, By applying different voltages to data lines far from the data pad, there is an advantage in that image quality defects due to the resistance difference of the data lines can be overcome.

Claims (6)

LCD panel, A gate pad and a data pad formed side by side at the bottom of the liquid crystal panel; A gate driving IC and a data driving IC mounted on a flexible printed circuit (FPC) film, A plurality of gate lines drawn out from the gate pad and arranged vertically in the liquid crystal panel, and a plurality of data lines drawn out from the data pad and arranged horizontally in the liquid crystal panel; A gamma voltage generator for applying gamma voltages having different magnitudes to the data driver ICs so that data voltages having different magnitudes are applied to each data line for representing the same gray scale; And a plurality of resistors are connected to the gamma voltage generator in series with an external power supply voltage. The method of claim 1, A system interface unit for receiving red (R), green (G), and blue (B) data for displaying an image; A memory storing RGB data received from the system interface unit; From the memory control unit for controlling the operation of the memory and the RGB data stored in the memory, the data for each R, G, B color constituting each frame for displaying a screen is extracted and the respective R, G, And a timing controller for driving the B light source. The method of claim 1, And a plurality of data lines arranged in the liquid crystal panel are drawn to different lengths from the data pads. The method of claim 1, The gamma voltage generator is a time division color liquid crystal, characterized in that the gamma voltage is applied to the data lines representing the same gray scale, so that a higher voltage is applied to a data line far from the data pad than a data line close to the data pad. Display. The method of claim 1, And the gamma voltage generator is provided with more resistance than the number of gamma voltages to be generated. The method of claim 1, And the time division color liquid crystal display device is applied to a small terminal.

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