KR100978703B1 - 디지털 통신 시스템의 dc 오프셋 보상을 위한 방법 및 장치 - Google Patents
디지털 통신 시스템의 dc 오프셋 보상을 위한 방법 및 장치 Download PDFInfo
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- KR100978703B1 KR100978703B1 KR1020057004360A KR20057004360A KR100978703B1 KR 100978703 B1 KR100978703 B1 KR 100978703B1 KR 1020057004360 A KR1020057004360 A KR 1020057004360A KR 20057004360 A KR20057004360 A KR 20057004360A KR 100978703 B1 KR100978703 B1 KR 100978703B1
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- South Korea
- Prior art keywords
- matrix
- vector
- channel
- regression
- regression matrix
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0202—Channel estimation
- H04L25/024—Channel estimation channel estimation algorithms
- H04L25/025—Channel estimation channel estimation algorithms using least-mean-square [LMS] method
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0202—Channel estimation
- H04L25/024—Channel estimation channel estimation algorithms
- H04L25/0242—Channel estimation channel estimation algorithms using matrix methods
- H04L25/0244—Channel estimation channel estimation algorithms using matrix methods with inversion
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/08—Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Dc Digital Transmission (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
Description
Claims (10)
- 다수의 경로를 포함하는 채널에 걸쳐 송신되는 수신 신호(x)의 DC 오프셋()을 보상하는 방법으로서, 상기 수신 신호는 변조된 데이터 신호 및 변조된 알려진 트레이닝 시퀀스 신호 비트를 포함하는, 수신 신호(x)의 DC 오프셋()을 보상하는 방법에 있어서,로부터 도출되는 벡터()이고, 여기서 Ω는 로테이션 벡터(ω) 및 디-로테이션 벡터(ω* )에 의해 발생되는 토플리츠 행렬이고, 는 상기 제 1 회귀 행렬의 대응하는 열이고, n은 상기 트레이닝 시퀀스의 심볼의 수이고, m은 상기 채널의 경로의 수이고,
- 제 1 항에 있어서,상기 제 3 행렬의 원소들의 실수부는 억제 팩터(suppression factor)에 의해 크기조정되는 것을 특징으로 하는 수신 신호의 DC 오프셋을 보상하는 방법.
- 제 3 항에 있어서,상기 채널 추정은 최소-자승 기술을 사용하여 도출되는 것을 특징으로 하는 수신 신호의 DC 오프셋을 보상하는 방법.
- 로부터 도출되는 벡터()이고, 여기서 Ω는 로테이션 벡터(ω) 및 디-로테이션 벡터(ω* )에 의해 발생되는 토플리츠 행렬이고, 는 상기 제 1 회귀 행렬의 대응하는 열이고, n은 상기 트레이닝 시퀀스의 심볼의 수이고, m은 상기 채널의 경로의 수이고,
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Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02256376.1 | 2002-09-16 | ||
EP02256376A EP1401163B1 (en) | 2002-09-16 | 2002-09-16 | Method and apparatus for DC offset compensation in a digital communication system |
US41379802P | 2002-09-25 | 2002-09-25 | |
US60/413,798 | 2002-09-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20050057326A KR20050057326A (ko) | 2005-06-16 |
KR100978703B1 true KR100978703B1 (ko) | 2010-08-30 |
Family
ID=31896960
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020057004360A KR100978703B1 (ko) | 2002-09-16 | 2003-09-15 | 디지털 통신 시스템의 dc 오프셋 보상을 위한 방법 및 장치 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7839956B1 (ko) |
EP (1) | EP1401163B1 (ko) |
KR (1) | KR100978703B1 (ko) |
AT (1) | ATE416544T1 (ko) |
AU (1) | AU2003273880A1 (ko) |
DE (1) | DE60230141D1 (ko) |
WO (1) | WO2004034661A1 (ko) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1401163B1 (en) | 2002-09-16 | 2008-12-03 | Telefonaktiebolaget LM Ericsson (publ) | Method and apparatus for DC offset compensation in a digital communication system |
CN101404518B (zh) * | 2008-11-21 | 2012-07-04 | 北京天碁科技有限公司 | 一种用于无线通信系统的频偏估计方法及装置 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1401163B1 (en) | 2002-09-16 | 2008-12-03 | Telefonaktiebolaget LM Ericsson (publ) | Method and apparatus for DC offset compensation in a digital communication system |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ATE323890T1 (de) * | 1997-11-19 | 2006-05-15 | Imec Vzw | Verfahren und vorrichtung zum empfang von gps/glonass-signalen |
JP2001111465A (ja) * | 1999-10-06 | 2001-04-20 | Fujitsu Ltd | 無線受信機およびダイバーシチ受信機 |
WO2001031867A1 (en) * | 1999-10-27 | 2001-05-03 | Nokia Corporation | Dc offset correction in a mobile communication system |
-
2002
- 2002-09-16 EP EP02256376A patent/EP1401163B1/en not_active Expired - Lifetime
- 2002-09-16 DE DE60230141T patent/DE60230141D1/de not_active Expired - Fee Related
- 2002-09-16 AT AT02256376T patent/ATE416544T1/de not_active IP Right Cessation
-
2003
- 2003-09-15 KR KR1020057004360A patent/KR100978703B1/ko active IP Right Grant
- 2003-09-15 WO PCT/EP2003/010245 patent/WO2004034661A1/en active Application Filing
- 2003-09-15 US US10/527,783 patent/US7839956B1/en not_active Expired - Fee Related
- 2003-09-15 AU AU2003273880A patent/AU2003273880A1/en not_active Abandoned
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1401163B1 (en) | 2002-09-16 | 2008-12-03 | Telefonaktiebolaget LM Ericsson (publ) | Method and apparatus for DC offset compensation in a digital communication system |
Also Published As
Publication number | Publication date |
---|---|
EP1401163B1 (en) | 2008-12-03 |
ATE416544T1 (de) | 2008-12-15 |
US20100284496A1 (en) | 2010-11-11 |
KR20050057326A (ko) | 2005-06-16 |
EP1401163A1 (en) | 2004-03-24 |
AU2003273880A1 (en) | 2004-05-04 |
US7839956B1 (en) | 2010-11-23 |
WO2004034661A1 (en) | 2004-04-22 |
DE60230141D1 (de) | 2009-01-15 |
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