KR100975927B1 - Method of manufacturing package board - Google Patents

Abstract

The present invention relates to a method for manufacturing a package substrate, by producing an asymmetric substrate having a different number of layers stacked on both sides of the core layer, thereby increasing the signal transmission speed of the substrate and reducing the manufacturing cost.

The method for manufacturing a package substrate according to the present invention includes preparing a core layer, stacking a block film on one surface of the core layer, and a surface on which the block film of the core layer is not laminated. And laminating a first insulating layer and a first plating layer on the substrate, removing the block film, and laminating a second insulating layer and a second plating layer on both surfaces of the core layer.

Copper Clad Laminate, Block Film, Build-up, Asymmetric

Description

Package board manufacturing method {Method of manufacturing package board}

The present invention relates to a method for manufacturing a package substrate, and more particularly, a block film is formed on one surface of a core layer, and the number of layers to be built up on both surfaces of the core layer is different from each other. Another method relates to a package substrate manufacturing method.

As electronic products are miniaturized in size, thickness, density, package, and personal portability, multilayer printed circuit boards are also undergoing fine patterns, miniaturization, and packaging simultaneously. Accordingly, in order to increase the fine pattern formation, reliability, and design density of multilayer printed circuit boards, there is a tendency to change to a structure that combines the layer structure of the circuit with the change of raw materials, and the parts also have SMT (Dual In-Line Package) type. As the surface mount technology type is changed, the mounting density is also increasing. In addition to the portableization of electronic devices, high functionalization, the Internet, moving pictures, and high-capacity data transmission and complexity make the design of printed circuit boards complicated and require high-level technology.

The printed circuit board used in the package includes a single-sided printed circuit board with wiring formed only on one side of the insulated substrate, a double-sided printed circuit board with wiring formed on both sides, and a multi-layered printed circuit board (MLB). There is. In the past, single-sided printed circuit boards were used because component elements were simple and circuit patterns were simple. However, in recent years, the demand for high density and miniaturization of circuits has increased, and it is common to use double-sided printed circuit boards or multilayer printed circuit boards.

Multilayer printed circuit boards are formed by additional wiring layers in order to enlarge the wiring area. Specifically, a multilayer printed circuit board is divided into an inner layer and an outer layer, and a thin plate core is used as the inner layer material, and the outer layer and the inner layer are bonded by prepreg, and the wiring of each layer is a via hole. Use to connect.

The multilayer printed circuit board as described above may be manufactured by a build-up method. Here, the build-up method refers to a manufacturing method of forming an inner layer on which a circuit pattern is formed, and additionally stacking outer layers one by one.

That is, an insulating layer for interlayer insulation is simultaneously stacked on both surfaces of a copper clad laminate (CCL), which is a core layer, and a package substrate is formed by repeating vias, circuits, and plating operations.

Such a conventional package substrate has a symmetrical structure in which the number of layers built up on both sides of the core layer is the same.

However, the conventional package substrate has a limitation in coping with the trend of high speed and miniaturization because the entire thickness of the substrate is inevitably increased by forming the same number of buildup layers on both sides of the core layer. There was a problem of cost increase.

Therefore, in recent years, in order to speed up signal transmission and reduce costs, research on fabrication of asymmetric substrates having different numbers of layers built up on both sides of the core layer has been made.

Therefore, the present invention has been made to solve the above problems, an object of the present invention is to form a block film (block film) on one surface of the core layer, the layer being built up (build-up) on both sides of the core layer The present invention provides a method for manufacturing a package substrate that can fabricate asymmetric substrates having different numbers, increase signal transmission speed of the substrate, and reduce manufacturing costs.

Package substrate manufacturing method according to an embodiment of the present invention for achieving the above object comprises the steps of preparing a core layer; Stacking a block film on one surface of the core layer; Stacking a first insulating layer and a first plating layer on a surface on which the block film of the core layer is not laminated; Removing the block film; And laminating a second insulating layer and a second plating layer on both surfaces of the core layer.

Here, in the step of laminating the first insulating layer and the first plating layer on the surface on which the block film of the core layer is not laminated, the first insulating layer and the first plating layer may be repeatedly stacked one or more times in sequence. .

In addition, in the stacking of the second insulating layer and the second plating layer on both surfaces of the core layer, the second insulating layer and the second plating layer may be repeatedly stacked one or more times in sequence.

In addition, the preparing of the core layer may include forming a via hole in a copper foil laminated plate in which copper foils are laminated on both surfaces of the insulating layer; Forming a plating layer on a surface of the copper-clad laminate including the via hole; And filling paste into the via hole.

In addition, the paste may use an insulating paste or a conductive paste.

In addition, the first insulating layer and the second insulating layer may be made of ABF or prepreg.

The method may further include forming a solder resist layer on the second plating layer after laminating a second insulating layer and a second plating layer on both surfaces of the core layer; Removing a portion of the solder resist layer to expose the second plating layer; And forming a bump connected to the exposed second plating layer.

As described above, according to the method of manufacturing a package substrate according to the present invention, a block film is formed on one surface of a core layer, and build-up is performed only on the other surface of the core layer on which the block film is not formed. After the block film is removed, build-up is performed on both sides of the core layer again, thereby producing an asymmetric package substrate having a different number of layers to be built up on both sides of the core layer. Can be.

Therefore, the present invention can reduce the number of layers of the entire substrate compared to the symmetrical package substrate having the same number of layers built up on both sides of the existing core layer, thereby increasing the signal transmission speed of the substrate and reducing the manufacturing cost. It has an effect.

In addition, the present invention has the advantage that the difference in the number of layers to be built up on both sides of the core layer can also be adjusted freely, the design freedom of the substrate is increased.

Matters relating to the operational effects including the technical configuration for the above object of the method for manufacturing a package substrate according to the present invention will be clearly understood by the following detailed description with reference to the drawings in which preferred embodiments of the present invention are shown.

Hereinafter, a method of manufacturing a package substrate according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 to 9.

1 to 9 are cross-sectional views sequentially showing the method for manufacturing a package substrate according to an embodiment of the present invention.

The method of manufacturing a package substrate according to an embodiment of the present invention, as shown in FIG. 1, first provides a copper clad laminate (CCL) in which copper foil 102 is laminated on both surfaces of an insulating layer 101.

The copper clad laminated board is a laminated board in which a copper film 102 is coated on an insulating layer 101, which is generally a printed circuit board, and is made of glass / epoxy copper clad laminate, heat-resistant resin copper clad laminate, and paper / phenolic copper foil according to its use. There are various kinds of laminates, copper foil laminates for high frequency, flexible copper laminates (polyimide films), and composite copper foil laminates, but glass / epoxy copper laminates are mainly used in the production of double-sided printed circuit boards and multilayer printed circuit boards.

The glass / epoxy copper clad laminate is made of a reinforcing base material and copper foil in which an epoxy resin is infiltrated into the glass fiber. Glass / epoxy copper clad laminates are classified according to reinforcement materials. Generally, grades according to reinforcement materials and heat resistance are determined by standards set by the National Electrical Manufacturers Association (NEMA) such as FR-1 to FR-5. have. Among these grades, FR-4 is most commonly used, but in recent years, the demand for FR-5, which has improved the glass transition temperature (Tg) characteristics of resins, has also increased.

Next, as shown in FIG. 2, via holes 103 for interlayer connection are formed in the copper-clad laminate.

The via hole 103 may be formed by mechanical drilling, or may be formed by a YAG laser, a CO ₂ laser, or the like.

3, the copper plating layer 104 is formed on the surface of the copper-clad laminate including the via hole 103.

The copper plating layer 104 may be formed by sequentially performing electroless copper plating and electrolytic copper plating.

Next, as shown in FIG. 4, the via hole 103 is filled with the paste 105 to complete the fabrication of the core layer 100.

In this case, the paste 105 generally uses an insulating ink material, but a conductive paste may be used according to the purpose of using the printed circuit board. In this case, the conductive paste may be a main component of the metal, such as Cu, Ag, Au, Sn and Pb mixed with an organic adhesive in the form of a single or alloy.

Next, as shown in FIG. 5, a block film 200 is laminated on one surface of the core layer 100. Here, an adhesive tape or the like may be used as the block film 200.

Then, as shown in FIG. 6, the first insulating layer 106 and the first plating layer 106a are sequentially stacked on the surface where the block film 200 of the core layer 100 is not laminated.

Although not shown in the drawings, a via hole (not shown) and a plating layer (not shown) on the surface of the via hole for interlayer connection may be formed in the first insulating layer 106.

As the first insulating layer 106, an insulating material that can be processed by a drill process or the like with adhesive force and fluidity, for example, Ajinomoto's ABF (Ajinomoto Build-up Film), or prepreg, etc. may be used. Can be.

The first plating layer 106a may be formed of a copper plating layer or the like.

Here, when building up the first insulating layer 106 and the first plating layer 106a, as illustrated in FIG. 6, the first insulating layer 106 and the first plating layer 106a are sequentially stacked only once. Alternatively, the layers 106 and 106a may be repeatedly stacked two times, three times, four times, or more.

In this case, since the first insulating layer 106 and the first plating layer 106a are not formed on both surfaces of the core layer 100 by the block film 200, they are formed only on one surface, and thus, only one time of lamination is performed. The finally manufactured package substrate is an asymmetric type in which the number of the first insulating layer 106 and the first plating layer 106a, which are built up on both sides of the core layer 100, differs by one layer, respectively. It can be made into a substrate.

In addition, when the first insulating layer 106 and the first plating layer 106a are repeatedly stacked two or more times as described above on one surface of the core layer 100, the finally produced package substrate is the The number of the first insulating layer 106 and the first plating layer 106a, which are built up on both upper and lower surfaces based on the core layer 100, may differ by two or more layers, respectively.

Then, as shown in FIG. 7, the block film 200 is removed.

Next, as shown in FIG. 8, the second insulating layer 107 and the second plating layer 107a are sequentially stacked on both surfaces of the core layer 100 from which the block film 200 is removed.

The second insulating layer 107 may be formed of ABF or prepreg in the same manner as the first insulating layer 106. The second plating layer 107a may also be formed of the same copper plating layer as the first plating layer 106a.

In this case, the second insulating layer 107 and the second plating layer 107a which are simultaneously stacked on both surfaces of the core layer 100 may also be stacked only once as shown in FIG. 8, but these layers 107 and 107a may be stacked. ) May be repeated two times, three times, four times, or more times, as desired.

Thereafter, as shown in FIG. 9, a solder resist layer 108 is formed on the second plating layer 107a. The solder resist layer 108 may be formed on both upper and lower portions of the core layer 100.

Then, a portion of the solder resist layer 108 corresponding to a surface on which a chip (not shown) is to be die attached is removed to expose a portion of the second plating layer 107a.

Then, a bump 109 connected to the second plating layer 107a is formed. After that, a chip or the like is die-attached on the bump 109 as described above.

As described above, in the method of manufacturing a package substrate according to the exemplary embodiment of the present invention, the block film 200 is formed on one surface of the core layer 100 before the build-up, and thus the block film 200 is not formed. After the buildup layer is formed only, the block film 200 is removed, and then the buildup layer is formed on both surfaces of the core layer 100 again.

Therefore, an asymmetrical package substrate having different numbers of layers to be built up on both surfaces of the core layer 100 may be manufactured.

Such an asymmetric package substrate can reduce the number of layers of the entire substrate, compared to a symmetric substrate having the same number of layers built up on both sides of the existing core layer 100, thereby increasing the signal transmission speed of the package substrate and manufacturing cost There is an effect to reduce the.

In addition, according to the manufacturing method of the package substrate according to the present embodiment, since it is possible to freely control the difference in the number of layers to be built up on both sides of the core layer 100, there is an advantage that the design freedom of the substrate is increased have.

Meanwhile, the package substrate manufactured according to the embodiment of the present invention may be used as a printed circuit board such as a flip chip ball grid array, a ball grid array, and a chip size package.

Preferred embodiments of the present invention described above are disclosed for the purpose of illustration, and various substitutions, modifications, and changes within the scope without departing from the spirit of the present invention for those skilled in the art to which the present invention pertains. It will be possible, but such substitutions, changes and the like should be regarded as belonging to the following claims.

1 to 9 is a cross-sectional view sequentially showing the method for manufacturing a package substrate according to an embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

100: core layer 101: insulating layer

102: copper foil 103: via hole

104: copper plating layer 105: paste

106: first insulating layer 106a: first plating layer

107: second insulating layer 107a: second plating layer

108: solder resist layer 109: bump

200: block film

Claims (7)

Preparing a copper clad laminate by laminating copper foils on both sides of the core layer; Forming a via hole in the copper clad laminate; Forming a plating layer on the copper-clad laminate in which the via holes are formed; Filling paste into the via hole; Stacking a block film on one surface of the core layer after the paste is filled in the via hole; Stacking a first insulating layer and a first plating layer on the other surface of the core layer opposite to the one surface; After the laminating the first insulating layer and the second plating layer, removing the block film to expose the one surface; And Stacking a second insulating layer and a second plating layer on the one surface and the other surface of the core layer from which the block film is removed; Package substrate manufacturing method comprising a. The method of claim 1, In the step of laminating a first insulating layer and a first plating layer on the other surface of the core layer, Method of manufacturing a package substrate for laminating the first insulating layer and the first plating layer repeatedly one or more times in sequence. The method of claim 1, In the step of laminating a second insulating layer and the second plating layer on the one surface and the other surface of the core layer, The second substrate and the second plating layer sequentially laminated one or more times a method of manufacturing a package substrate. delete The method of claim 1, The paste is a package substrate manufacturing method using an insulating paste or a conductive paste. The method of claim 1, The first insulating layer and the second insulating layer is a package substrate manufacturing method of the ABF or prepreg. The method of claim 1, After laminating a second insulating layer and a second plating layer on the one surface and the other surface of the core layer, Forming a solder resist layer on the second plating layer; Removing a portion of the solder resist layer to expose the second plating layer; And Forming a bump connected to the exposed second plating layer; Package substrate manufacturing method further comprising.

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