KR100958721B1 - Rf amplifier - Google Patents

Abstract

An RF amplifier according to the present invention comprises: an amplifier circuit for amplifying an RF signal, a bias voltage generator circuit for providing a bias voltage of the amplifier circuit, and connected between the amplifier circuit and the bias voltage generator circuit, And a first bias resistor having a resistance value determined such that the bias voltage is affected.

RF Amplifier, Linear, Bias Circuit

Description

RF Amplifier {RF AMPLIFIER}

The present invention relates to an RF amplifier, and more particularly to an RF amplifier having a bias circuit for changing the amount of current in accordance with the level of the output power.

The present invention is derived from the research conducted as part of the IT growth engine technology development project of the Ministry of Information and Communication and the Ministry of Information and Telecommunication Research and Development. [Task Management Number: 2005-S-017-03, Task Name: Super-Power RF / HW / SW Integrated SoC].

For high quality communication at a long distance, a method of increasing the output of the transmitter or improving the sensitivity of the receiver may be used. However, the method of increasing the output of the transmitter is not preferable due to the limitation of the power capacity of the transmitter, the effect on the equipment, and the economics, and the method of improving the sensitivity of the receiver is preferred. The sensitivity of the receiver can be characterized by a noise figure (NF) that indicates the degree of separation of the received signal from the noise. The smaller the noise index, the better the sensitivity.

Recently, with the rapid development of various portable communication technologies utilizing the frequency bandwidth of 400MHz ~ 2.5GHz, the development of RF (RadioFrequency) device and circuit technology becomes important. RF amplifiers are generally higher than compound devices (GaAs, InGaP, InP, etc.) due to problems such as silicon substrates, parasitic capacitors, and low breakdown voltages with high signal loss. There is a limit to the application of linearity or high output power to the required system. Therefore, in the direction of the current technology development, which requires an extended time of use of the terminal by optimizing power consumption at a low output power level and a high output power level, the conventional RF amplifier driven by a constant current regardless of the output power level. No change is necessary.

There are two main ways to improve the linearity of RF amplifiers. Firstly, nonlinear components such as 3rd InterModulation Distortion (IMD3) can be canceled. Second, the maximum power point (1dB Gain Compression Point: P1dB) of the output of the same circuit can be determined. How to raise Here, the third-order intermodulation distortion (IMD3) refers to the magnitude of the distortion signal caused by intermodulation, and the maximum power point (P1dB) is assumed to be not saturated, and the difference between the power actually assumed to be saturated and the curve that starts to be saturated is 1dB. Output voltage.

The conventional RF amplifier includes a bias circuit of a current mirror structure or a structure having a large resistance value to prevent leakage of the RF signal. This bias circuit keeps the gate-source voltage Vgs of the input transistor constant.

The bias circuit of a conventional RF amplifier provides a constant bias voltage and current regardless of input / output power. However, the current ratio between the current flowing in the main circuit of the RF amplifier and the current provided in the bias circuit varies depending on the power level. For this reason, the conventional RF amplifier has a nonlinear characteristic as the output signal power increases. In addition, the maximum output power of transistors used in RF amplifiers is also reduced.

It is an object of the present invention to provide an RF amplifier having a bias circuit in which the amount of current varies according to the level of output power.

Another object of the present invention is to increase the linearity of the RF amplifier even if the output power is increased.

An amplifier according to the present invention comprises: an amplifier circuit for amplifying an RF signal; A bias voltage generating circuit for providing a bias voltage of the amplifying circuit; And a first bias resistor connected between the amplifying circuit and the bias voltage generating circuit, the first bias resistor having a resistance value determined such that the bias voltage is affected by the RF signal.

The amplifier circuit may include: a first transistor having a gate connected to the bias voltage and the RF signal and a source connected to ground; And a second transistor having a drain to which a power supply voltage is applied, a gate to which a gate voltage is applied, and a source connected to the drain of the first transistor, wherein the bias voltage causes the first transistor to be in a saturation region state, The gate voltage is characterized in that the second transistor is in a saturation region state.

In an embodiment, the bias voltage generation circuit has a drain and a gate commonly connected to one end of the first bias resistor, and a source connected to ground.

The bias voltage generating circuit may include: a second bias transistor having a drain connected to a voltage and a source connected to the one end of the first bias resistor; And a load coupled between the gate of the second bias transistor and the ground.

In an embodiment, the load may include: a third bias transistor having a drain and a gate commonly connected to the gate of the second bias transistor; A fourth bias transistor having a drain and a gate commonly connected to a source of the third bias transistor, and a source connected to the ground; And a second bias resistor coupled between the reference voltage and the drain of the third bias transistor.

In example embodiments, the load further includes a bias capacitor or the like connected between the gate and the ground of the second bias transistor and performing a function of reducing impedance at a corresponding frequency.

According to the present invention, the linearity of the RF amplifier is increased by implementing the variable current provided by the bias circuit as the output power level changes.

In addition, the RF amplifier of the present invention has a high maximum power point (P1dB) or no additional current is required for linear operation.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .

The RF amplifier according to the present invention increases its linearity by changing the current of the bias circuit according to the change of the current of the main circuit which amplifies the RF signal.

1 shows an RF amplifier 100 according to the present invention. Referring to FIG. 1, the RF amplifier 100 may include a main circuit 120 for amplifying an RF signal RFIN and a bias circuit 140 for setting bias conditions (eg, voltage and current) of the main circuit 120. ) Is included. The bias circuit 140 of the present invention is configured to be affected by the input RF signal RFIN. To this end, the bias circuit 140 includes a bias resistor RB1 configured to transfer the RF voltage v_rf from the input RF signal RFIN.

 Referring back to FIG. 1, the main circuit 120 includes an input capacitor CIN for removing a DC voltage component of an RF signal RFIN, an amplifier circuit 121 for amplifying an RF signal from which a DC voltage component is removed, And an output capacitor COUT which removes and outputs a DC voltage component from the amplified RF signal.

In addition, the bias circuit 140 may include a bias voltage generator circuit 141 for providing a bias voltage of the amplifier circuit 121, and a bias resistor RB1 connected between the bias voltage generator circuit 141 and the amplifier circuit 121. ) Is included. The bias resistor RB1 is configured such that the input RF signal RFIN is affected by the bias voltage generating circuit 141 with a predetermined voltage v_rf. For example, if the RF signal from which the DC voltage component is removed from the input capacitor CIN is '100', the bias signal RB1 may affect the amplification circuit 121. The RF signal corresponding to 1 ′ may be configured to affect the bias voltage generator circuit 141.

FIG. 2 is a first embodiment of the RF amplifier 100 shown in FIG. Referring to FIG. 1, the RF amplifier 100 includes a main circuit 120 having a cascode structure and a bias circuit 140 having a current mirror structure. The RF amplifier 100 of the present invention is implemented such that the bias current I _B of the bias circuit 140 also changes when the amplification current I _A of the main circuit 120 changes. That is, when the amplification current I _A of the main circuit 120 increases, the bias current I _B of the bias circuit 140 also increases, and when the amplification current IA of the main circuit 120 decreases, the bias circuit ( The bias current I _B of 140 is also reduced. In other words, the bias circuit 140 may be implemented such that the ratio of the amplification current I _A of the main circuit 120 to the bias current I _B of the bias circuit 140 is kept constant.

The main circuit 120 receives the RF signal RFIN and inverts and amplifies the output RFOUT. The main circuit 120 shown in FIG. 1 has a cascode structure composed of two transistors M1 and M2. Although the main circuit 120 shown in FIG. 1 is implemented in a cascode structure, it is apparent to those skilled in the art that the main circuit 120 of the present invention does not need to be limited to the cascode structure. The first transistor M1 performs the amplification function of the RF signal, and the second transistor M2 performs the function of withstanding the high drain voltage. The gate voltage V_Gate input to the second transistor M2 may be applied to operate the second transistor M2 in a saturation region.

Meanwhile, the input and output capacitors CIN and COUT of the main circuit 120 pass through a high frequency signal and are used to remove a DC voltage component.

The amplification operation of the main circuit 120 is as follows. The input RF signal RFIN is transmitted to the gate of the first transistor M1 through the capacitor CIN. The transistor M1 is turned on according to the bias voltage applied from the bias circuit 140, and the second transistor M2 is turned on by the gate voltage V_Gate. At this time, both the first and second transistors M1 and M2 will operate in the saturation region. Therefore, in response to the RF signal input to the first transistor M1, the current of the main circuit is pulled to ground GND, thereby generating an inverted output signal RFOUT. At this time, the output signal RFOUT is changed based on the power supply voltage VDD to amplify the input signal RFIN. As a result, the main circuit 120 inverts and amplifies the input RF signal RFIN.

The bias circuit 140 not only provides a bias condition of the main circuit 120 but is also implemented to be affected by the RF signal RFIN. Here, the degree of influence of the RF signal RFIN in the bias circuit 140 is relatively small compared to that of the RF signal RFIN in the main circuit 120. In particular, the bias circuit 140 of the present invention is implemented such that the amplification current I _A of the main circuit 120 is changed at the same time as the input of the RF signal RFIN, and the bias current I _B is also changed.

Referring again to FIG. 2, the bias circuit 140 includes first to fourth bias transistors MB1 to MB4, first and second bias resistors RB1 and RB2, and a bias capacitor C1. have. The first bias resistor RB1 is connected between the first node N1 and the second node N2. The second bias resistor RB2 is connected between the reference voltage V_ref and the third node N3. The first bias transistor MB1 includes a gate and a source commonly connected to the second node N2, and a source connected to the ground GND. The second bias transistor MB2 includes a drain connected to the reference voltage V_ref, a source connected to the second node N2, and a gate connected to the third node N3. The third bias transistor MB3 includes a drain and a gate commonly connected to the third node N3, and a source connected to the fourth node N4. The fourth bias transistor MB4 includes a drain and a gate commonly connected to the fourth node, and a source connected to the ground GND. The bias capacitor C1 is connected between the third node N3 and the ground GND.

The first bias resistor RB1 of the present invention has a resistance value determined such that the bias voltage is affected by the RF signal RFIN. As a result, the RF voltage v_rf is generated at the second node N2 by the RF signal RFIN. As a result, in the bias circuit 140 of the present invention, the gate-source voltage Vgs_MB2 of the second bias transistor MB2 is changed by the RF signal RFIN. Therefore, the bias current I _B also changes according to the change of the gate-source voltage Vgs_MB2.

The RF amplifier 100 of the present invention is implemented such that the current ratio of the main circuit 120 and the bias circuit 140 is kept constant with respect to the output power level. As a result, nonlinear operation of the RF amplifier 100 is suppressed, and the maximum power point (P1dB) is improved.

FIG. 3 is a diagram illustrating a current change of the bias circuit 140 shown in FIG. 2. Referring to FIG. 3, the bias circuit 140 includes a load 142. Here, the load 142 is composed of a second bias resistor RB2 and bias transistors MB1, MB2, MB3 and MB4. Here, the RF voltage v_rf is a component that is influenced by the bias circuit 140 by the input RF signal.

4 is a diagram illustrating an equivalent circuit of the bias circuit 140 illustrated in FIG. 3. Referring to FIG. 4, the bias circuit 140 includes a capacitor Cgs_MB2 between the RF voltage v_rf and the load 142. The capacitor Cgs_MB2 is a parasitic capacitor of the transistor MB2. Therefore, the voltage v_Load of the signal transferred to the node N2 through the capacitor Ggs_MB2 is expressed by the following equation.

Here, the value of the capacitor Cgs_MB2 is determined by the gate area of the transistor MB2 of the bias circuit 140. At this time, the gate voltage of the transistor MB2 is affected by the impedance Z_Load of the load 142 as shown in the following equations.

Therefore, when the RF signal is applied to the main circuit 120, the gate-source voltage VGS_MB2 of the second bias transistor MB2 of the bias circuit 140 satisfies the following equation.

The bias circuit 140 of the present invention is implemented in a current mirror structure. It is apparent to those skilled in the art that the bias circuit of the present invention does not need to be limited to the current mirror structure. The bias circuit of the present invention may be a circuit implemented to have an equivalent circuit as shown in FIG.

The bias circuit 140 of the present invention includes a bias capacitor C1 to reduce the impingement Z_Load of the load. However, the bias circuit of the RF amplifier of the present invention is not necessarily limited to having a bias capacitor. The bias circuit of the present invention may be added other than a capacitor capable of performing the function of lowering the impedance at the RF frequency.

5 is a view comparing the amount of amplification current according to the output power level of the conventional amplifier and the amplifier of the present invention. Referring to FIG. 5, both the conventional RF amplifiers and the RF amplifiers of the present invention have an increased amount of amplification current as the maximum power value increases.

6 is a diagram comparing current ratios of the amplification current of the main circuit and the bias current of the bias circuit according to the output power level. Referring to FIG. 6, in the conventional RF amplifier, a constant bias current flows regardless of the amplification current of the main circuit. Therefore, in the conventional RF amplifier 20, the current ratio supplied by the bias circuit and the current of the main amplifier change according to the output power level. This change in current ratio reduces the amplifier's maximum power point (P1dB) by operating nonlinearly as the transistor of the RF amplifier increases its output power. On the other hand, in the RF amplifiers according to the present invention, the current ratio of the amplifying current and the bias current is kept constant according to the output power level. Whether the RF amplifier in which the bias capacitor C1 is present or the RF amplifier in which the bias capacitor is not present, the current ratio of the amplifying current and the bias current is kept constant.

7 is a diagram comparing gains of RF amplifiers according to output power levels. Referring to FIG. 7, in the RF amplifier 200 of the present invention, a 1dB gain compression point (PIdB) of an amplifier having a constant current ratio has a higher value than conventional RF amplifiers. .

If there is no capacitor C1 for lowering the impedance of the input RF signal in the bias circuit of the present invention, the maximum power point P1dB of the RF amplifier is reduced even if a constant current ratio is provided. This is because the RF signal flowing to the bias circuit due to the reduction of the resistance value RB1 between the bias circuit and the main circuit has little effect on the gate-source voltage VGS of the bias transistor MB2 and is lost.

In the detailed description, specific embodiments have been described, but various modifications may be made without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the above-described embodiments, but should be defined by the equivalents of the claims of the present invention as well as the following claims.

1 shows an RF amplifier according to the present invention.

FIG. 2 is a diagram illustrating a first embodiment of the RF amplifier illustrated in FIG. 1.

3 is a view for explaining the operation of the RF amplifier shown in FIG.

FIG. 4 illustrates an equivalent circuit for the bias circuit shown in FIG. 3.

5 is a diagram comparing current amounts of main amplifiers according to output power levels of conventional RF amplifiers and the RF amplifiers of the present invention.

6 is a diagram comparing current ratios of amplified current and bias current according to the output power level.

7 is a diagram comparing gains of RF amplifiers according to output power levels.

* Description of the symbols for the main parts of the drawings *

100: amplifier amplifier 120: main circuit

140: bias circuit 121: amplification circuit

141: bias voltage generation circuit 142, 142: load

MB1 ~ MB4, M1, M2: Transistors CIN, COUT, C1: Capacitors

Claims (5)

delete An amplifier circuit for amplifying the RF signal; A bias voltage generating circuit for providing a bias voltage of the amplifying circuit; And A first bias resistor coupled between the amplifying circuit and the bias voltage generating circuit, the first bias resistor having a resistance value determined such that the bias voltage is affected by the RF signal, The amplification circuit, A first transistor having a gate connected to the bias voltage and the RF signal and a source connected to ground; And A second transistor having a drain to which a power supply voltage is applied, a gate to which a gate voltage is applied, and a source connected to the drain of the first transistor, And wherein said bias voltage causes said first transistor to be in a saturation region and said gate voltage allows said second transistor to be in a saturation region. An amplifier circuit for amplifying the RF signal; A bias voltage generating circuit for providing a bias voltage of the amplifying circuit; And A first bias resistor coupled between the amplifying circuit and the bias voltage generating circuit, the first bias resistor having a resistance value determined such that the bias voltage is affected by the RF signal, The bias voltage generation circuit, A first bias transistor having a drain and a gate commonly connected to one end of the first bias resistor, and a source connected to ground; A second bias transistor having a drain connected to a reference voltage, and a source connected to the one end of the first bias resistor; And And a load coupled between the gate of the second bias transistor and the ground. The method of claim 3, wherein The rod is, A third bias transistor having a drain and a gate commonly connected to the gate of the second bias transistor; A fourth bias transistor having a drain and a gate commonly connected to a source of the third bias transistor, and a source connected to the ground; And And a second bias resistor coupled between the reference voltage and the drain of the third bias transistor. The method of claim 4, wherein The rod is, And a bias capacitor connected between the gate and the ground of the second bias transistor and performing a function of reducing impedance at a corresponding frequency.

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