KR100933904B1 - Manufacturing method of micro thermoelectric energy conversion module with improved bonding characteristics - Google Patents

Abstract

The present invention relates to a method of manufacturing a micro thermoelectric energy conversion module having improved bonding characteristics capable of increasing bonding efficiency by inserting a dummy pattern around a thermoelectric element part.

The method of manufacturing a micro thermoelectric energy conversion module having improved bonding characteristics according to the present invention includes placing a first substrate on which an n-type semiconductor pattern is formed and a second substrate on which a p-type semiconductor pattern is formed to face each other, A method of manufacturing a micro thermoelectric energy conversion module in which a n-type semiconductor pattern is bonded in series with a π-type to form a thermoelectric element portion, the method comprising: improving bonding characteristics in a region around the thermoelectric element portion of the first substrate or the second substrate. To form more dummy patterns.

Micro, thermoelectric energy conversion, dummy pattern, bonding

Description

METHOD FOR MANUFACTURING THERMOELECTRIC ENERGY CONVERSION MODULE HAVING IMPROVED BONDING CHARACTERISTICS}

The present invention relates to a method for manufacturing a micro thermoelectric energy conversion module, and more particularly, to a method for manufacturing a micro thermoelectric energy conversion module having improved bonding characteristics capable of increasing a debonding load by inserting a dummy pattern around a thermoelectric element part.

Physical phenomena in which heat flow and current affect each other, such as the Seebeck and Peltier effects, are collectively called "thermoelectric effects."

The thermoelectric effect is generated in a circuit in which dissimilar metals or dissimilar semiconductors having different thermoelectric properties are bonded.

When there is a temperature difference in the junction of dissimilar metals or dissimilar semiconductors, a current is generated in this circuit. This is called a Seebeck effect, and the Seebeck effect is used in various power generation apparatuses that use thermal energy as electrical energy. .

When a direct current is applied to a dissimilar metal circuit or a circuit in which dissimilar semiconductors are bonded, one side of the junction generates heat and the other endothermic occurs. This phenomenon is referred to as a Peltier effect and is a Peltier effect. The effect is used for thermoelectric cooling of various chips, devices, etc. including a central processing unit (CPU).

The thermoelectric power generation device using the Seebeck effect and the thermoelectric cooling device using the Peltier effect are collectively called a thermoelectric energy conversion module.

1 is a perspective view illustrating a general thermoelectric energy conversion module.

Referring to FIG. 1, the p-type semiconductor 1 and the n-type semiconductor 2 are alternately arranged in the thermoelectric energy conversion module.

The p-type semiconductor 1 and the n-type semiconductor 2 are connected to the electrode 3, respectively, and the externally connected electrode 4 is connected to the lower end surface of the p-type semiconductor 1 disposed at one end side. The external electrode 5 is connected to the lower end surface of the n-type semiconductor 2 arranged on the other end side.

The p-type semiconductor 1 and the n-type semiconductor 2 are connected in series in a π type between the electrode 4 and the electrode 5.

A good thermally conductive substrate 6 is in contact with the electrode 3 connected to the upper end surfaces of the p-type semiconductor 1 and the n-type semiconductor 2.

The thermally conductive substrate 7 is in contact with the electrodes 3, 4, 5 connected to the lower end surfaces of the p-type semiconductor 1 and the n-type semiconductor 2.

Then, a DC power source is connected between the electrode 4 and the electrode 5, the current flows through the thermoelectric conversion module with the electrode 5 on the positive (+) side and the electrode 4 on the negative (-) side. When the p-type semiconductor 1 and the n-type semiconductor 2 are joined to each other, the heat conductive substrate 6 absorbs and cools the heat, depending on the current direction, and the heat conductive substrate 7 releases and heats the heat. do.

In this configuration, when a current is passed through the thermoelectric energy conversion module, the thermoelectric energy conversion module is used as the thermoelectric cooling module.

On the other hand, a load is connected between the electrode 4 and the electrode 5 to form a closed circuit, the thermally conductive substrate 6 is at the low temperature side, and the thermally conductive substrate 7 is at the high temperature side. When a temperature difference is provided between the thermally conductive substrates 7, electric current flows in the closed circuit to obtain power.

According to this configuration, when thermoelectric energy is applied to the thermoelectric energy conversion module, the thermoelectric energy conversion module is used as the power generation module.

Such a thermoelectric cooling module manufacturing method of the thermoelectric energy conversion module has been disclosed under the title of "micro thermoelectric cooling module" in Korean Patent Application No. 10-2008-0022641 filed by the present applicant.

Patent application 10-2008-0022641 manufactures a thermoelectric cooling module in which a p-type semiconductor pattern connected in a π-type and an n-type semiconductor pattern are connected in series as shown in FIGS. 2A to 2H.

First, as shown in FIG. 2A, the insulating layer 110 and the electrode layer 120 are sequentially formed on the substrate 100, and the first photoresist pattern 130 is formed on the electrode layer 120.

As shown in FIG. 2B, the first electrode layer 120 is etched using the first photoresist pattern 130 as an etching mask to expose a portion of the insulating layer 110.

Subsequently, as shown in FIG. 2C, a lift-off photoresist (LOR) 140 and a second photoresist pattern 150 are sequentially formed on the resultant portion of the insulating layer 110 exposed. .

Next, as illustrated in FIG. 2D, the lift-off-only photoresist 140 is etched through an etching process using the second photoresist pattern 150 as an etching mask to expose the upper surface of one side of the electrode layer 120.

Referring to FIG. 2E, a first semiconductor pattern 160a formed of an n-type impurity type is formed on the exposed electrode layer 120, and an electroplating process is performed on the first semiconductor pattern 160a. Proceeding to form a nickel layer (Ni) 170.

Subsequently, a tin layer (Sn; 180), which is a bonding layer, is formed on the nickel layer 170 by an electroplating process.

Then, as shown in FIG. 2F, the first pattern 200 is completed by removing the second photoresist pattern 150 and the lift-off dedicated photoresist 240.

Meanwhile, a second pattern 300 is formed as in FIG. 2G by performing the same process as the process of FIGS. 2A to 2F, but a second type of p-type impurity type opposite to the first semiconductor pattern 160a is formed. The second pattern 300 having the semiconductor pattern 160b is formed.

Thereafter, as shown in FIG. 2H, the second pattern 300 is inverted on the first pattern 200 to be positioned so that the first pattern and the second pattern face each other, and then the upper side of the other side of the electrode layer 120 of the first pattern 200. The thermoelectric cooling module is completed by bonding the tin layer (Sn; 180), which is a bonding layer of the second pattern 300, to the surface to be connected.

However, according to the method of manufacturing a micro thermoelectric energy conversion module including the conventional micro thermoelectric cooling module, there is a disadvantage in that bonding characteristics are poor.

In other words, since the substrate on which the n-type semiconductor pattern is formed and the substrate on which the p-type semiconductor pattern is formed are bonded to each other and bonded through a high temperature thermal process, the bonding is performed by using a small bonding area. There is a disadvantage that the bonding properties are poor.

An object of the present invention for solving the problems of the prior art, by further inserting a dummy pattern having the same height as the thermoelectric element portion around the thermoelectric element portion to further secure the bonding area, to secure a high debonding load bonding The present invention provides a method for manufacturing a micro thermoelectric energy conversion module having improved characteristics.

In order to solve the above problems, a method of manufacturing a micro thermoelectric energy conversion module having improved bonding characteristics of the present invention includes: placing a first substrate on which an n-type semiconductor pattern is formed and a second substrate on which a p-type semiconductor pattern are formed to face each other, and then p A method of manufacturing a micro thermoelectric energy conversion module in which a thermoelectric element portion is formed by bonding a type semiconductor pattern and an n type semiconductor pattern to be connected in series in a π type, the method being bonded to a region around the thermoelectric element portion of the first substrate or the second substrate. It is to form a dummy pattern for improving the characteristics.

In the micro thermoelectric energy conversion module, by further forming a bonding dummy pattern around the thermoelectric element part, the debonding load can be increased to increase the bonding characteristics, thereby improving the reliability of the device.

3 is a plan view of a method of manufacturing a micro thermoelectric energy conversion module having improved bonding characteristics according to the present invention.

The present invention forms a first substrate having an n-type semiconductor pattern and a second substrate having a p-type semiconductor pattern connected in a π-type, and placing the first substrate and the second substrate so as to face each other up and down. A method of manufacturing a micro thermoelectric energy conversion module in which a layer is bonded through high pressure to form a thermoelectric element portion, and particularly, a dummy pattern for improving bonding characteristics in a region around a thermoelectric element portion of a first substrate or a second substrate. To form more.

Hereinafter, a method of manufacturing a micro thermoelectric energy conversion module having improved bonding characteristics of the present invention will be described.

4A to 4T are cross-sectional views sequentially illustrating a method of manufacturing a micro thermoelectric energy conversion module having improved bonding characteristics according to a first embodiment of the present invention.

Referring to FIG. 4A, an insulating layer 410 and an electrode layer 420 are sequentially formed on the substrate 400.

In this case, the substrate 400 uses a silicon wafer having a thickness of 550 μm, and the insulating layer 410 uses a silicon oxide film (SiO ₂ ) formed through a thermal oxidation process.

Here, before the insulating layer 410 is formed on the substrate 400, the cleaning process may be further performed to prevent the deterioration of the characteristics of the device due to pattern defects caused by foreign substances remaining on the substrate 400. Can be.

The washing process is carried out in a boiling H ₂ SO ₄ : H ₂ O ₂ = 1: 1 solution for 8 to 12 minutes, preferably 10 minutes, and dipped in 50: 1 hydrofluoric acid solution for 6 to 8 minutes, preferably 7 minutes It can be carried out.

In addition, the electrode layer 420 preferably uses gold (Au) having excellent thermal conductivity and electrical conductivity, and may further form titanium (Ti) having excellent adhesive properties in order to improve adhesion between the gold and the substrate.

That is, as shown in the drawing, the electrode layer 420 may be formed in a structure in which titanium (Ti) having a thickness of 20 nm and gold (Au) having a thickness of 500 nm are stacked.

Referring to FIG. 4B, a first photoresist 430 is formed on the electrode layer 420. In this case, the first photoresist 430 may be formed through a prebake process after deposition by spin coating.

Referring to FIG. 4C, a first photoresist pattern 430a is formed through an exposure process and a development process for the first photoresist 430. In this case, the first photoresist pattern 430a exposes not only a portion of the thermoelectric element portion A but also a boundary portion between the thermoelectric element portion A and the dummy pattern portion B. FIG.

Referring to FIG. 4D, a portion of the thermoelectric element portion and the first electrode layer 420 between the thermoelectric element portion A and the dummy pattern portion B are etched and insulated using the first photoresist pattern 430a as an etching mask. A portion of layer 410 is exposed.

Referring to FIG. 4E, a lift-off photoresist (LOR) 440 and a second photoresist 450 are sequentially formed on the resultant portion of the insulating layer 410.

In this case, the lift-off-only photoresist 440 is formed by spin coating.

In addition, the second photoresist 450 is deposited by spin coating.

Referring to FIG. 4F, a photolithography process is performed on the second photoresist 450 to form a second photoresist pattern 450a defining a semiconductor pattern region, which will be described later.

Referring to FIG. 4G, the lift-off-only photoresist 440 is etched through an etching process using the second photoresist pattern 450a as an etching mask to expose one side surface of the electrode layer 420.

At this time, exposing the electrode layer 420 exposes only a part of the electrode layer of the thermoelectric element part A without exposing the electrode layer of the dummy pattern part B.

After the formation of the electrode layer 420, the plasma cleaning process may be further performed to improve adhesion characteristics with the first semiconductor pattern 460a which will be described later.

Referring to FIG. 4H, a first semiconductor pattern 460a formed of an n-type impurity type is formed on the exposed electrode layer 420.

Here, the first semiconductor pattern 460a may be formed through a co-sputtering process or a co-evaporating process that can control the composition ratio of the two materials by adjusting the RF power, and the co-sputtering process or the co-evaporating process may be performed. It can carry out under the temperature of 100-110 degreeC.

For example, pure Bi and Te targets can be used to form a Bi ₂ Te ₃ film, which is a Bi-Te thin film.

Referring to FIG. 4I, a nickel layer (Ni) 470 is formed by performing an electroplating process on the first semiconductor pattern 460a.

Here, when the bonding process is performed at a high temperature after directly forming a bonding tin layer (Sn, 480) to be described later on the first semiconductor pattern 460a, the tin may be diffused into the first semiconductor pattern 460a due to the high temperature. As such, the nickel layer 470 is formed to prevent diffusion of the bonding layer.

Accordingly, in order to prevent the bonding layer from diffusing into the semiconductor pattern, a diffusion barrier layer other than nickel may be formed, or this process may be omitted through other modified embodiments.

A tin layer (Sn) 480, which is a bonding layer, is formed on the nickel layer 470 by an electroplating process.

Referring to FIG. 4J, the first pattern 500 is completed by removing the second photoresist pattern 450a and the lift-off-only photoresist 240.

 Meanwhile, after the first pattern having the first semiconductor pattern 460a is formed, a second pattern is formed, and detailed description of the same process as the above-described first pattern forming process will be omitted.

As shown in FIG. 4K, a third photoresist pattern 430b is formed on the electrode layer 420. Here, the third photoresist pattern 430b not only exposes a portion of the thermoelectric element portion A but also exposes a boundary portion between the thermoelectric element portion A and the dummy pattern portion B. FIG.

Referring to FIG. 4L, a portion of the thermoelectric element portion and the first electrode layer 420 between the thermoelectric element portion A and the dummy pattern portion B are etched using the third photoresist pattern 430b as an etching mask. A portion of layer 410 is exposed.

Referring to FIG. 4M, a lift-off photoresist (LOR) 440 and a second photoresist 450 are sequentially formed on a resultant portion of the insulating layer 410.

Referring to FIG. 4N, the second photoresist 450 is patterned such that an upper portion of the lift-off resistor 440 in the region where the second semiconductor pattern 460b to be described later is formed is exposed. .

 Referring to FIG. 4O, the lift-off-only photoresist 440 is etched through an etching process using the second photoresist pattern 450b as an etching mask to expose an upper surface of one side of the electrode layer 420.

At this time, exposure of the electrode layer 420 exposes not only one side of the thermoelectric element part B but also all of the electrode layers of the dummy pattern part B. FIG.

Referring to FIG. 4P, a second semiconductor pattern 460b formed of a p-type impurity type is formed on the exposed electrode layer 420.

Referring to FIG. 4Q, a nickel layer (Ni) 470 is formed on the first semiconductor pattern 460a, and a tin layer Sn 480, which is a bonding layer, is electroplated on the nickel layer 470. To form).

Referring to FIG. 4R, the second pattern 600 is completed by removing the fourth photoresist pattern 450b and the lift-off-only photoresist 240.

Referring to FIG. 4S, the second pattern 600 is turned over on the first pattern 500 so that the first pattern and the second pattern face each other.

Referring to FIG. 4T, a thermoelectric having a dummy pattern D may be bonded to the other upper surface of the electrode layer 420 of the first pattern 500 so as to be connected to the tin layer Sn 480, which is a bonding layer of the second pattern 600. Complete the energy conversion module.

However, each semiconductor pattern usually has the best thermoelectric performance at a temperature of 250 to 300 ° C., and a patterning process is performed using a photoresist pattern, which makes it difficult to form a semiconductor pattern at a high temperature.

That is, since the photoresist is weak in heat, it is difficult to form a semiconductor pattern at a high temperature of 250 to 300 ° C., so that the photoresist is formed through a co-sputtering process at a temperature of 100 to 110 ° C. Further annealing process is carried out.

Thus, the further annealing process, but proceeds to about 200 ~ 250 ℃ to prevent damage to the nickel layer 470 and tin layer 480.

In the first embodiment, in order to prevent damage to the nickel layer 470 and the tin layer 480, the annealing process is performed at a temperature of 200 ~ 250 ℃, the second embodiment of the present invention at a temperature of 250 ~ 300 ℃ We propose a method of carrying out the annealing process.

In the first embodiment of the present invention, the nickel layer 470 and the tin layer 480 are used as the bonding layer to prevent diffusion, but the second embodiment of the present invention uses the nickel layer 470 as shown in FIG. Instead of the tin layer 480, gold layers (Au, 490) formed by a sputtering process are used as the bonding layer, and the rest of the rest of the configuration is the same as in the first embodiment.

Since the gold layer 490 has excellent resistance to heat, it forms a condition under which an annealing process for the semiconductor pattern can be performed at 250 to 600 ° C.

That is, by enabling the annealing process at a temperature of 250 ~ 300 ℃, the temperature at which the semiconductor pattern exhibits the best thermoelectric performance, it is possible to ultimately increase the performance of the micro thermoelectric energy conversion module.

Accordingly, the second embodiment of the present invention enables the annealing process at a temperature of 250 to 300 ° C., in which the thermoelectric performance of the semiconductor pattern is best obtained by using gold having high heat resistance and good electrical properties as a bonding layer. Improves module performance by reducing electrical resistance across the energy conversion module.

As described above, in the exemplary embodiments of the present invention, the insulating layer 410 and the metal layer 420 are formed on the first pattern 500, and the insulating layer 410, the metal layer 420, and the second pattern 600 are formed on the first pattern 500. After forming the two semiconductor patterns 460b and the bonding layers 470, 480 and 490, the dummy patterns D by the bonding of the first pattern and the second pattern were formed.

In addition, according to another exemplary embodiment, the insulating layer 410, the metal layer 420, the first semiconductor pattern 460a, and the bonding layers 470, 480, and 490 are formed on the first pattern 500, and the second pattern 500 is formed on the first pattern 500. After the insulating layer 410 and the metal layer 420 are formed in the pattern 600, a dummy pattern D may be formed by bonding the first pattern and the second pattern.

1 is a perspective view illustrating a thermoelectric conversion module using a general heterogeneous semiconductor.

Figure 2a to 2h is a sequential process cross-sectional view showing a method of manufacturing a micro thermoelectric cooling module according to the prior art.

3 is a plan view showing a micro thermoelectric energy conversion module with improved bonding characteristics according to the present invention.

4A to 4T are cross-sectional views sequentially illustrating a method of manufacturing a micro thermoelectric energy conversion module having improved bonding characteristics according to a first embodiment of the present invention.

Figure 5 is a cross-sectional view of the result produced by the method of manufacturing a micro thermoelectric energy conversion module according to a second embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

400: substrate 410: insulating layer

420: electrode layer 430: first photoresist

440 lift-only photoresist 450 second photoresist

460a: first semiconductor pattern 460b: second semiconductor pattern

470: nickel layer 480: tin layer

490: gold layer

500: first pattern 600: second pattern

Claims (8)

Micro to form the thermoelectric element by bonding the first substrate having the n-type semiconductor pattern and the second substrate having the p-type semiconductor pattern are mutually opposite and then bonded the p-type semiconductor pattern and the n-type semiconductor pattern in series with the π-type In the method of manufacturing a thermoelectric energy conversion module, The method of claim 1, further comprising forming a dummy pattern in the peripheral region of the first substrate or the second substrate to improve bonding characteristics. The method of claim 1, Forming the thermoelectric element portion and the dummy pattern; Sequentially forming an insulating layer, an electrode layer, and a photoresist pattern on the first substrate; Etching a metal layer in a region excluding the thermoelectric element portion and the dummy pattern portion by using the photoresist pattern to expose a portion of the insulating layer; Exposing an upper surface of one side of the electrode layer of the thermoelectric element part and forming a first impurity semiconductor pattern on the exposed electrode layer; Forming a first pattern by forming a bonding layer on the first semiconductor pattern of the first impurity type; Sequentially forming an insulating layer, an electrode layer, and a photoresist pattern on a substrate separate from the first substrate; Etching a metal layer in a region excluding the thermoelectric element portion and the dummy pattern portion by using the photoresist pattern to expose a portion of the insulating layer; Exposing an upper surface of one side of the electrode layer of the thermoelectric element part and an upper surface of the electrode layer of the dummy pattern part and forming a second impurity semiconductor pattern of a type opposite to the first impurity on the exposed electrode layer; Forming a second pattern by forming a bonding layer on the second impurity semiconductor pattern; Bonding the first and second patterns to each other so that the bonding layers face each other with the electrode layers having opposite patterns to form dummy pattern portions in the peripheral region of the thermoelectric element portion. Method for manufacturing energy conversion module. The method of claim 2, The electrode layer is formed of a gold (Au) or titanium / gold (Ti / Au) laminated structure characterized in that the micro thermoelectric energy conversion module with improved bonding characteristics. The method of claim 2, The first semiconductor pattern and the second semiconductor pattern is a co-sputtering process or a co-evaporating process, characterized in that the bonding characteristics improved micro thermoelectric energy conversion module manufacturing method. The method of claim 2, The bonding layer is formed of gold (Au), the method of manufacturing a micro thermoelectric energy conversion module with improved bonding characteristics. The method of claim 2, The bonding layer may be formed of tin (Sn), the method of manufacturing a micro thermoelectric energy conversion module with improved bonding characteristics. The method of claim 2, The diffusion preventing nickel (Ni) layer is further formed between the first semiconductor pattern and the second semiconductor pattern and the bonding layer. The method according to any one of claims 2 to 7, After the bonding layer is formed, the thermal process is further carried out, the micro thermoelectric energy conversion module manufacturing method with improved bonding characteristics.

Images