KR100930573B1 - Thin film transistor manufacturing method and display device manufacturing method using same - Google Patents

Abstract

Disclosed is a method of manufacturing a thin film transistor capable of improving the aperture ratio. In order to manufacture the thin film transistor, the gate insulating film and the active film are sequentially formed on the substrate on which the gate electrode is formed. The formed active film is patterned and formed into an active pattern covering the gate electrode. Thereafter, a data metal film is formed on the substrate on which the active pattern is formed. A photoresist pattern having a first thickness in the source and drain regions and a second thickness smaller than the first thickness in the channel region of the thin film transistor is formed on the data metal film. Thereafter, a source electrode and a drain electrode spaced apart from the source electrode are formed through a wet etching process and a dry etching process using a photoresist pattern. As described above, by performing the etching of the data metal film in a dry etching process, the aperture ratio can be improved.

Description

METHOD OF MANUFACTURING THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING DISPLAY APPARATUS BY USING THE SAME}

The present invention relates to a method of manufacturing a thin film transistor and a method of manufacturing a display device for displaying an image using the same.

In general, a liquid crystal display device, which is one of display devices for displaying an image, has a structure in which a thin film transistor substrate on which a thin film transistor and a pixel electrode are formed, and a color filter substrate on which a color filter and a common electrode are formed are coupled with a liquid crystal interposed therebetween.

The process of forming a thin film transistor on a substrate such as glass or plastic is performed through a photolithography process using a plurality of masks. In general, a thin film transistor is manufactured using five or four masks.

The conventional photolithography process for forming the source electrode and the drain electrode in the thin film transistor manufacturing process is performed through a wet etching process. However, due to the wet etching characteristic of isotropic etching, it is difficult to implement a fine pattern, and thus, there is a limit in reducing the channel length between the source electrode and the drain electrode, which makes it difficult to improve the aperture ratio.

Accordingly, the present invention has been made in view of such a problem, and provides a method of manufacturing a thin film transistor which can improve the aperture ratio of a display device.

In addition, the present invention provides a display device manufacturing method using the above-described thin film transistor manufacturing method.

According to one or more exemplary embodiments, a thin film transistor manufacturing method includes: sequentially forming a gate insulating layer and an active layer on a substrate on which a gate electrode is formed, and patterning the active layer to cover the gate electrode. Forming a data metal film on the substrate on which the active pattern is formed; a second thickness having a first thickness in the source and drain regions on the data metal film and less than the first thickness in the channel region of the thin film transistor; And forming a source electrode and a drain electrode spaced apart from the source electrode by patterning the data metal layer through a wet etching process and a dry etching process using the photoresist pattern.

The thin film transistor manufacturing method may further include forming the source electrode and the drain electrode by forming a data metal pattern by wet etching the data metal layer using the photoresist pattern as an etch stop layer. Ashing the photoresist pattern to expose the channel region and dry etching the data metal pattern of the channel region using the ashed photoresist pattern as an etch stop layer to form the source electrode and the drain electrode. It is preferable to include.

The thin film transistor manufacturing method may further include dry etching the ohmic contact layer of the active pattern of the channel region after the dry etching of the data metal pattern.

According to an aspect of the present invention, a method of manufacturing a display device includes sequentially forming a gate insulating layer and an active layer on a substrate on which a gate electrode is formed, and patterning the active layer to cover an active pattern covering the gate electrode. Forming a data metal film on the substrate on which the active pattern is formed; forming a data metal film on the data metal film, the second thickness having a first thickness in the source and drain regions and a smaller thickness than the first thickness in the channel region of the thin film transistor; Forming a photoresist pattern having the photoresist pattern and forming a source electrode and a drain electrode spaced apart from the source electrode by patterning the data metal film through a wet etching process and a dry etching process using the photoresist pattern; Drain electrode Forming a passivation layer and a pixel electrode on the substrate.

The method of manufacturing the display device may include forming the source electrode and the drain electrode by wet etching the data metal layer using the photoresist pattern as an etch stop layer to form a data metal pattern. Ashing the photoresist pattern to expose the channel region and dry etching the data metal pattern of the channel region using the ashed photoresist pattern as an etch stop layer to form the source electrode and the drain electrode. It is preferable to include.

According to another aspect of the present invention, a thin film transistor manufacturing method includes sequentially forming a gate insulating film, an active film, and a data metal film on a substrate on which a gate electrode is formed. Forming a photoresist pattern on the data metal pattern having a first thickness in the source and drain regions and having a second thickness smaller than the first thickness in the channel region of the thin film transistor; Forming an active pattern by patterning the active layer through an etching process and forming a source electrode and a drain electrode spaced apart from the source electrode by patterning the data metal pattern through a dry etching process using the photoresist pattern Include.

The thin film transistor manufacturing method may further include forming the source electrode and the drain electrode, by ashing the photoresist pattern to expose the channel region of the data metal pattern, and etching the ashed photoresist pattern. And etching the data metal pattern of the channel region to form the source and drain electrodes.

The thin film transistor manufacturing method may further include dry etching the ohmic contact layer of the active pattern of the channel region, followed by dry etching of the data metal pattern.

According to another aspect of the present invention, a method of manufacturing a display device includes sequentially forming a gate insulating layer, an active layer, and a data metal layer on a substrate on which a gate electrode is formed. Forming a photoresist pattern on the data metal pattern having a first thickness in the source and drain regions and having a second thickness smaller than the first thickness in the channel region of the thin film transistor; Forming an active pattern by patterning the active layer through an etching process; patterning the data metal pattern through a dry etching process using the photoresist pattern to form a source electrode and a drain electrode spaced apart from the source electrode; and Source electrode and Group is on the substrate, a drain electrode are formed and forming a protective film and a pixel electrode.

In the method of manufacturing a display device, the forming of the source electrode and the drain electrode may include: ashing the photoresist pattern to expose the channel region of the data metal pattern and etching the ashed photoresist pattern. The method may further include dry etching the data metal pattern of the channel region to form the source electrode and the drain electrode.

According to the method of manufacturing the thin film transistor and the method of manufacturing the display device using the same, the secondary etching of the data metal film for etching the channel region may be performed by the dry etching process, thereby reducing the channel length and improving the aperture ratio. In addition, by removing the active pattern under the data line, the aperture ratio can be improved, and quality defects such as afterimages and flicker can be suppressed.

As the inventive concept allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to the specific disclosed form, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention. In describing the drawings, similar reference numerals are used for similar elements.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.

In the drawings, the thickness of each device or film (layer) and regions has been exaggerated for clarity of the invention, and each device may have a variety of additional devices not described herein. When (layer) is mentioned as being located on another film (layer) or substrate, it may be formed directly on the other film (layer) or substrate or an additional film (layer) may be interposed therebetween.

Hereinafter, with reference to the accompanying drawings, it will be described in detail a preferred embodiment of the present invention.

1 to 8 are process diagrams illustrating a manufacturing process of a display device according to an exemplary embodiment of the present invention.

Referring to FIG. 1, after forming a gate metal layer on a substrate 110, the gate metal layer is patterned through a photolithography process using a first exposure mask to form a gate electrode 120. A gate line electrically connected to the gate electrode 120 may be simultaneously formed by patterning the gate metal layer. The gate metal film is formed on the substrate 110 through, for example, a sputtering process. In addition, the patterning of the gate metal layer is performed through, for example, a wet etching process.

The substrate 110 may be formed of a transparent insulating material, for example, glass or plastic.

For example, the gate metal layer may include aluminum (Al), molybdenum (Mo), neodymium (Nd), chromium (Cr), tantalum (Ta), titanium (Ti), tungsten (W), copper (Cu), and silver ( Ag) or a single metal or an alloy thereof. In addition, the gate metal film may be formed of two or more metal layers having different physical properties. For example, the gate metal film may be formed in an Al / Mo two-layer film structure in which aluminum (Al) and molybdenum (Mo) are stacked for low resistance wiring.

For example, the gate line extends in the horizontal direction to define an upper side and a lower side of each pixel. The gate electrode 120 is electrically connected to the gate line and constitutes a gate terminal of a thin film transistor, which is a switching element formed in each pixel.

Referring to FIG. 2, the active layer 140 including the gate insulating layer 130, the semiconductor layer 141, and the ohmic contact layer 142 is sequentially formed on the substrate 110 on which the gate electrode 120 is formed. . The gate insulating layer 130 and the active layer 140 are formed by, for example, a plasma enhanced chemical vapor deposition (PECVD) method.

The gate insulating layer 130 is an insulating layer for protecting and insulating the gate wiring 120, and is formed of, for example, silicon nitride (SiNx) or silicon oxide (SiOx). For example, the gate insulating layer 130 is formed to a thickness of about 4000 ~ 4500Å.

The active layer 140 includes a semiconductor layer 141 and an ohmic contact layer 142. For example, the semiconductor layer 141 is formed of amorphous silicon (a-Si), and the ohmic contact layer 142 is formed of amorphous silicon (hereinafter, n + a-) doped with a high concentration of n-type impurities. Si).

2 and 3, the active layer 140 is patterned through a photolithography process using a second exposure mask to form an active pattern 144 covering the gate electrode 120. The patterning of the active layer 140 is performed through, for example, a dry etching process. The active pattern 144 includes a semiconductor pattern 145 and an ohmic contact pattern 146.

Referring to FIG. 4, the data metal film 150 is formed on the substrate 110 on which the active pattern 144 is formed. The data metal film 150 is formed through, for example, a sputtering process.

The data metal film 150 may be formed of, for example, aluminum (Al), molybdenum (Mo), neodymium (Nd), chromium (Cr), tantalum (Ta), titanium (Ti), tungsten (W), or copper (Cu). It may be formed of a single metal such as silver (Ag) or an alloy thereof. In addition, the data metal layer 150 may be formed of two or more metal layers having different physical properties. For example, the data metal film 150 may be formed of a Mo / Al / Mo two-layer film structure in which lower molybdenum (Mo), aluminum (Al), and upper molybdenum (Mo) are sequentially stacked for low resistance wiring. have.

Thereafter, after the photoresist film is formed on the data metal film 150, the photoresist film is patterned by a photolithography process using a third exposure mask such as a halftone mask or a slit mask. The resist pattern 160 is formed. The photoresist pattern 160 is formed to have a first thickness in the source and drain electrode regions where the source electrode and the drain electrode are to be formed, and to have a second thickness smaller than the first thickness in the channel region of the thin film transistor. Meanwhile, the photoresist pattern 160 may be formed to the first thickness in the data line region where the data line is electrically connected to the source electrode.

4 and 5, the data metal layer 150 is etched using the photoresist pattern 160 as an etch stop layer to form the data metal pattern 152. The etching process of the data metal layer 150 may be, for example, a wet etching process. Meanwhile, data lines may be simultaneously formed through etching of the data metal layer 150. The data line is insulated from the gate line through the gate insulating layer 130, and is formed to extend in a direction crossing the gate line. For example, the data line is formed in a vertical direction to vertically cross the gate line.

Thereafter, the photoresist pattern 160 is ashed to expose the channel region of the data metal pattern 152.

5 and 6, the channel region of the data metal pattern 152 is etched using the ashed photoresist pattern 162 as an etch stop layer. In the present embodiment, the etching of the data metal pattern 152 is performed through a dry etching process. Through dry etching of the data metal pattern 152, the source electrode 154 and the drain electrode 156 spaced apart from the source electrode 154 by a predetermined distance are formed. The source electrode 154 is electrically connected to the data line to form a source terminal of the thin film transistor, and the drain electrode 156 is spaced apart from the source electrode 154 to form a drain terminal of the thin film transistor.

As such, when the etching of the data metal pattern 152 is performed by a dry etching process, a fine pattern may be realized, and thus, a channel length between the source electrode 154 and the drain electrode 156 may be about 3 μm or less. It is possible to improve the aperture ratio.

Thereafter, the ohmic contact pattern 146 in the channel region is dry-etched using the ashed photoresist pattern 162 as an etch stop layer to form an ohmic contact pattern 146 'in which the channel region is etched to form an active pattern 144'. ). Accordingly, the semiconductor pattern 145 is exposed in the channel region between the source electrode 154 and the drain electrode 156 to complete the manufacture of the thin film transistor. Thereafter, the ashed photoresist pattern 162 is stripped. For example, the ashed photoresist pattern 162 is removed through a strip process using strip solution.

On the other hand, when the active metal 140 is patterned first, and then the data metal film 150 is patterned, unlike the conventional four-mask process, the active pattern 144 is disposed below the data line. This will not exist. Therefore, quality defects such as aperture ratio reduction, afterimage and flicker caused by the active pattern existing under the data line can be suppressed.

In addition, although the active pattern 144 presented as an embodiment of the present invention includes the semiconductor pattern 145 and the ohmic contact pattern 146, the active pattern 144 includes only the semiconductor pattern 145. Would also be possible. Accordingly, in the following drawings and descriptions, an active pattern refers to an active pattern 144 'including an ohmic contact pattern 146' with an etched channel region and an active pattern not including ohmic contact patterns 146 and 146 '. 144) were used to include all of them.

Referring to FIG. 7, a passivation layer 170 is formed on the substrate 110 on which the source electrode 154 and the drain electrode 156 are formed. The passivation layer 170 is an insulating layer for protecting and insulating the thin film transistor and the data line. For example, the passivation layer 170 is formed of silicon nitride (SiNx) or silicon oxide (SiOx). do.

Thereafter, the passivation layer 170 is patterned through a photolithography process using a fourth exposure mask to form a contact hole 172 exposing a part of the drain electrode 156.

Referring to FIG. 8, after forming a transparent conductive film on the passivation layer 170 on which the contact hole 172 is formed, the transparent conductive film is patterned through a photolithography process using a fifth exposure mask to form the pixel electrode 180 in each pixel. ).

The pixel electrode 180 is electrically connected to the drain electrode 156 through the contact hole 172 formed in the passivation layer 170. The pixel electrode 180 is formed of, for example, indium zinc oxide (IZO) or indium tin oxide (ITO).

In the display device including the pixel electrode 180, for example, in the case of a TFT-LCD, a liquid crystal is inserted between an upper electrode (not shown) that opposes the pixel electrode 180, and then the pixel electrode 180 and the upper part. It is used as a display device by adjusting the potential difference between the electrodes to operate the liquid crystal. Also, in the case of AMOLED, the organic light emitting layer is inserted between the pixel electrode 180 and the upper electrode (not shown), and then the pixel electrode 180 and The organic light emitting layer is made to emit light by flowing a current between the upper electrodes, which can be used as a display device.

9 to 14 are process diagrams illustrating a manufacturing process of a display device according to another exemplary embodiment of the present invention.

Referring to FIG. 9, as described with reference to FIG. 1, after the gate electrode 220 is formed on the substrate 210 through a photolithography process using a first exposure mask, the substrate on which the gate electrode 220 is formed ( The gate insulating layer 230, the active layer 240, and the data metal layer 250 are sequentially formed on the 210. In this case, the active layer 240 includes a semiconductor layer 241 and an ohmic contact layer 242. For example, the gate insulating layer 230 and the active layer 240 may be formed through a plasma enhanced chemical vapor deposition (PECVD) method, and the data metal layer 250 may be formed through a sputtering method.

9 and 10, the data metal layer 250 is patterned through a photolithography process using a second exposure mask to form a data metal pattern 252. Data lines may be formed through the patterning of the data metal layer 250. The patterning of the data metal layer 250 is performed through, for example, a wet etching process.

Referring to FIG. 11, after forming a photoresist film on the data metal pattern 252, the photoresist is formed by a photolithography process using a third exposure mask such as a halftone mask or a slit mask. The film is patterned to form a photoresist pattern 260. The photoresist pattern 260 has a first thickness in the source and drain electrode regions where the source and drain electrodes are to be formed, and has a second thickness smaller than the first thickness in the channel region of the thin film transistor. On the other hand, the photoresist pattern 260 may be formed to the first thickness in the data line region where the data line is electrically connected to the source electrode.

Referring to FIGS. 11 and 12, the active layer 240 is etched using the photoresist pattern 260 as an etch stop layer to form an active pattern 244 covering the gate electrode 220. The etching of the active layer 240 is performed through, for example, a dry etching process. The active pattern 244 includes a semiconductor pattern 245 and an ohmic contact pattern 246.

Thereafter, the photoresist pattern 260 is ashed to expose the channel region of the data metal pattern 252.

12 and 13, the channel region of the data metal pattern 252 is etched using the ashed photoresist pattern 262 as an etch stop layer. In the present embodiment, the etching of the data metal pattern 252 is performed through a dry etching process. Through dry etching of the data metal pattern 252, the source electrode 254 and the drain electrode 256 spaced apart from the source electrode 254 by a predetermined distance are formed.

As such, when the etching of the data metal pattern 252 is performed by a dry etching process, a fine pattern may be realized, and thus, a channel length between the source electrode 254 and the drain electrode 256 may be about 3 μm or less. It is possible to improve the aperture ratio.

Thereafter, the ohmic contact pattern 246 in the channel region is dry-etched using the ashed photoresist pattern 262 as an etch stop layer to form an ohmic contact pattern 246 'in which the channel region is etched, thereby forming an active pattern 244'. ). Accordingly, the semiconductor pattern 245 is exposed in the channel region between the source electrode 254 and the drain electrode 256 to complete the manufacture of the thin film transistor. Thereafter, the ashed photoresist pattern 262 is stripped. For example, the ashed photoresist pattern 262 is removed through a strip process using strip solution.

In addition, although the active pattern 244 presented as an embodiment of the present invention includes the semiconductor pattern 245 and the ohmic contact pattern 246, the active pattern 244 including only the semiconductor pattern 245 is described. It is also possible. Accordingly, in the following drawings and descriptions, an active pattern is defined as an active pattern 244 'including an ohmic contact pattern 246' etched from a channel region and an active pattern not including ohmic contact patterns 246 and 246 '. 244) were used to include all.

Referring to FIG. 14, as described with reference to FIG. 7, a protective film 270 is formed through a photolithography process using a fourth exposure mask, and a photolithography process using a fifth exposure mask as described with reference to FIG. 8. Through the pixel electrode 280 is formed.

In the display device including the pixel electrode 280, for example, in the case of a TFT-LCD, a liquid crystal is inserted between the pixel electrode 280 and an upper electrode (not shown), and then the pixel electrode 280 and the upper part. It is used as a display device by adjusting the potential difference between the electrodes to operate the liquid crystal. In the case of AMOLED, the organic light emitting layer is inserted between the pixel electrode 280 and the upper electrode (not shown), and then the pixel electrode 280 and The organic light emitting layer is made to emit light by flowing a current between the upper electrodes, which can be used as a display device.

In the detailed description of the present invention described above with reference to the preferred embodiments of the present invention, those skilled in the art or those skilled in the art having ordinary skill in the art will be described in the claims to be described later It will be understood that various modifications and variations can be made in the present invention without departing from the scope of the present invention.

1 to 8 are process diagrams illustrating a manufacturing process of a display device according to an exemplary embodiment of the present invention.

9 to 14 are process diagrams illustrating a manufacturing process of a display device according to another exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

110 substrate 120 gate electrode

130: gate insulating film 144: active pattern

145 semiconductor pattern 146 ohmic contact pattern

150: data metal film 152: data metal pattern

154: source electrode 156: drain electrode

160: photoresist pattern 170: protective film

180 pixel electrode

Claims (10)

Sequentially forming an active film including a gate insulating film, a semiconductor layer, and an ohmic contact layer on a substrate on which the gate electrode is formed; Patterning the active layer to cover the gate electrode and forming an active pattern including a semiconductor pattern and an ohmic contact pattern; Forming a data metal film on the substrate on which the active pattern is formed; Forming a photoresist pattern on the data metal film, the photoresist pattern having a first thickness in a source and a drain region and a second thickness less than the first thickness in a channel region of a thin film transistor; Forming a data metal pattern by removing the data metal layer outside the photoresist pattern through wet etching using the photoresist pattern as an etch stop layer; Ashing the photoresist pattern to expose the channel region of the data metal pattern; And And etching the data metal pattern on the channel region and the ohmic contact pattern through dry etching using the ashed photoresist pattern as an etch stop layer. delete delete delete delete delete delete delete Sequentially forming a gate insulating film, an active film, and a data metal film on the substrate on which the gate electrode is formed; Patterning the data metal film to form a data metal pattern; Forming a photoresist pattern on the data metal pattern, the photoresist pattern having a first thickness in a source and a drain region and a second thickness less than the first thickness in a channel region of a thin film transistor; Forming an active pattern by patterning the active layer through a dry etching process using the photoresist pattern; Patterning the data metal pattern through a dry etching process using the photoresist pattern to form a source electrode and a drain electrode spaced apart from the source electrode; And Forming a passivation layer and a pixel electrode on the substrate on which the source electrode and the drain electrode are formed. The method of claim 9, wherein the forming of the source electrode and the drain electrode comprises: ashing the photoresist pattern to expose the channel region of the data metal pattern; And And dry-etching the data metal pattern of the channel region using the ashed photoresist pattern as an etch stop layer to form the source electrode and the drain electrode.

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