KR100912594B1 - Printed circuit board embedded with passive component chip and manufacturing method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board manufacturing technology, and more particularly, to a board manufacturing technology in which a passive element chip such as a capacitor or an inductor is embedded inside a printed circuit board. The present invention can solve the problem of lengthening the wiring length for power supply by increasing the thickness of the board by processing the cavity in the circuit of the inner layer core and inserting the passive element chip into the cavity. As a result, the present invention makes it possible to speed up the operation of the device in a printed circuit board.

Printed circuit board, passive element, embedded board.

Description

Printed circuit board incorporating passive element in chip form and manufacturing method therefor {PRINTED CIRCUIT BOARD EMBEDDED WITH PASSIVE COMPONENT CHIP AND MANUFACTURING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board manufacturing technology, and more particularly, to a substrate manufacturing technology for embedding a passive element chip such as a capacitor or an inductor inside a printed circuit board.

A printed circuit board contains a large number of passive elements such as resistors, inductors or capacitors to form a circuit. In general, in order to implement a passive element on a printed circuit board, a chip-type passive element is surface mounted (SMT) on an outer layer of the substrate. However, in recent years, as electronic products become smaller and lighter, techniques for embedding passive elements in a substrate have been applied in order to increase and decrease the density of the substrate. In general, in order to embed a resistor or a capacitor inside the substrate, a method of patterning and molding passive elements is used in the step of laminating the substrate using a film, carbon paste, or other dielectric.

Such a passive element-embedded printed circuit board manufacturing technology has a disadvantage in that tolerance control of an embedded resistor or capacitor is not easy and tuning within a tolerance is not easy. Furthermore, when the passive element chip is mounted on the surface of the substrate according to the prior art, the wiring distance between the elements becomes long, and in particular, when the thickness of the test board is increased, a power supply problem occurs, and the parasitic inductance is increased due to the increased wiring distance. There is a technical problem that occurs such as parasitic components.

Accordingly, an object of the present invention is to provide a printed circuit board manufacturing technology capable of mounting a passive element including a resistor, a capacitor, or an inductor in the form of a chip, and blocking tolerances and minimizing parasitic component generation by embedding it inside the substrate. It is.

In order to achieve the above object, in the method of manufacturing a printed circuit board, (a) laser drilling the insulating layer until the copper foil layer appears on the selected portion of the surface of the inner layer core composed of a plurality of insulating layers and copper foil circuit layer. Forming a cavity by processing removal; (b) forming a selected insulating material comprising a non-conductive paste or non-conductive tape on the inner exposed copper foil surface of the cavity formed in step (a); (c) mounting a passive element chip in the cavity; And (d) stacking a prepreg and an outer layer circuit on the inner layer circuit, forming a laser via hole for supplying power to a capacitor electrode inserted into the cavity, and performing copper plating to form a power supply line. to provide.

The present invention is characterized by securing a power supply line by processing a laser via hole after mounting a passive element chip by processing a cavity in an inner layer circuit, stacking an outer layer, and processing a laser via hole, and having a relatively small chip size of 0402 (4 mm × 2 mm). In this case, it is preferable to apply the first embodiment and to apply the second embodiment when the chip size is 0603 (6 mm x 3 mm) or 1005 (10 mm x 5 mm).

The present invention can solve the problem of lengthening the wiring length for power supply by increasing the thickness of the board by processing the cavity in the circuit of the inner layer core and inserting the passive element chip into the cavity. As a result, the present invention makes it possible to speed up the operation of the device in a printed circuit board.

Hereinafter, a manufacturing method of a printed circuit board with a passive element chip according to the present invention will be described in detail with reference to the accompanying drawings. In addition, in the following detailed description, the capacitor chip is described as an embodiment, but an extension to a resistor or an inductor chip is possible.

1A to 1D are views illustrating a method of embedding a capacitor chip in a substrate according to the first embodiment of the present invention.

Referring to FIG. 1A, a cavity is formed on one surface of an inner core composed of a conductive copper foil layer of L1, L2, L3, L4, and L5 and an interlayer insulating layer. At this time, the cavity can be processed by laser drilling, and since the rectangular passive element chip will be inserted into the cavity to be formed, the diameter of the cavity to be processed is preferably processed to fit the diagonal size of the chip. Description of the shape of the cavity formed in the inner layer circuit according to the present invention will be described later with reference to FIG.

Referring back to FIG. 1A, a first embodiment of the present invention is characterized in that the cavity 100 is made on copper foil L4 of the inner layer. That is, when irradiating a laser beam from one surface of the inner layer circuit, there is an L4 copper foil layer on the opposite side so that the cavity is formed only between the L4 layer and the L5 layer. Once the cavity 100 is formed, the passive element chip is inserted into the cavity 100. According to a preferred embodiment of the present invention, a non-conductive tape or a non-conductive paste may be applied to the inner copper foil surface L4 of the exposed cavity prior to embedding the passive element chip.

FIG. 1B is a view showing a capacitor chip inserted into a cavity according to the first embodiment of the present invention. Referring to FIG. 1B, an insulating layer 110 is formed on an inner copper foil surface (L4 layer) of a cavity, and a capacitor chip 200 is inserted therein. Here, the insulating layer 110 may be the aforementioned nonconductive tape or nonconductive paste.

FIG. 1C is a view showing a state in which an outer layer is stacked on an inner layer circuit in which a capacitor chip is inserted and mounted in a cavity according to the first embodiment of the present invention. Referring to FIG. 1C, the prepreg 210 and the outer layer circuit L6 are stacked on the inner layer circuits L1 to L5 in which the capacitor chip 200 is inserted into the cavity. Subsequently, the outer layer L6 is patterned to form a power supply line in the capacitor chip 200.

1D is a view showing a state in which a power supply line is formed on an electrode of a capacitor chip inserted into a cavity according to a first embodiment of the present invention. Referring to FIG. 1D, when lamination is completed, holes 220 and 230 are formed in the prepreg layer as an active part of the capacitor chip 200 using a laser drill. Subsequently, when copper plating is performed, the copper foil of the L6 layer and the electrode of the capacitor chip are energized with each other through copper plating formed on the wall surface of the laser via hole LVH.

2 is a view showing a cross-sectional shape of a cavity formed in the inner layer circuit according to the first embodiment of the present invention. In the case of applying the 0402 standard product according to a preferred embodiment of the present invention, since a rectangular chip having a width and length of 4 mm × 2 mm is mounted, the diagonal length of the chip is about 4.5 mm, and the diameter of the cavity is about 1.1 φ. .

At this time, it is more preferable to form corner holes 55 in addition to drilling the main hole 50 in order to mount the capacitor chip firmly without moving tightly in the cavity. That is, the main hole 50 for the cavity space processing of 1.1φ diameter is formed, and the corner hole 55 to which the rectangular chip is to be fixed may be additionally formed on the circumference of the main hole 50 with a 0.25φ size. have.

3A to 3D are views showing a method of embedding a capacitor chip in a substrate according to the second embodiment of the present invention. The second embodiment of the present invention is a method in the case where the copper foil layer does not exist on both sides of the cavity formed in the inner layer circuit.

Referring to FIG. 3A, a cavity 320 is formed in an inner layer circuit by using a laser drill. At this time, in the second embodiment of the present invention, there is no copper foil layer on both sides of the cavity 320. Subsequently, the second embodiment of the present invention is characterized by attaching a non-conductive tape 330 to one side of the formed cavity 320 to finish one side of the cavity.

That is, referring to FIG. 3B, the non-conductive tape 330 is partially attached to one side of the cavity 320, that is, the L4 layer. Subsequently, the capacitor chip is inserted into the cavity 320, and then the outer layers are stacked, and the laser via hole LVH is formed to supply power. In the second embodiment of the present invention, the chip size can be applied to 0603 (6 mm x 3 mm) and 1005 standard (10 mm x 5 mm).

 The foregoing has somewhat broadly improved the features and technical advantages of the present invention to better understand the claims that follow. Additional features and advantages that make up the claims of the present invention will be described below. It should be appreciated by those skilled in the art that the conception and specific embodiments of the invention disclosed may be readily used as a basis for designing or modifying other structures for carrying out similar purposes to the invention.

In addition, the inventive concepts and embodiments disclosed herein may be used by those skilled in the art as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. In addition, such modifications or altered equivalent structures by those skilled in the art may be variously evolved, substituted and changed without departing from the spirit or scope of the invention described in the claims.

The present invention does not form a resistor or a capacitor by embedding a carbon paste or film in a substrate, but directly mounts a passive element component manufactured in the form of a chip in a cavity inside the substrate and stacks an outer layer. It can significantly reduce the parasitic inductance caused by the wire length while blocking the source. The technique proposed in the present invention can be widely applied to passive device chips including resistors, capacitors, and inductors.

1A to 1D are views showing a method of embedding a capacitor chip in a substrate according to the first embodiment of the present invention.

2 is a cross-sectional view of the cavity formed in the inner layer circuit according to the first embodiment of the present invention;

3A to 3D show a method of embedding a capacitor chip in a substrate according to a second embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

      50: main hall

      55: corner hole

100, 320: cavity

     110: insulation layer

     200: capacitor chip

     210: prepreg

     330: non-conductive tape

Claims (4)

In the method for manufacturing a printed circuit board containing a chip, (a) Laser drilling the exposed insulating layer surface of the inner core consisting of a plurality of insulating layers and a copper foil circuit layer, and forming a cavity by drilling and removing the exposed insulating layer until the bottom copper foil surface is reached, or a base copper foil If there is no surface, the exposed insulating layer is drilled and removed to the end to form a through hole, and a cavity is formed by covering one opening of the through hole with a non-conductive tape, and the cross section of the cavity space is configured to mount a rectangular chip. Forming a hole with a diameter larger than the diagonal length of the chip, and having additional corner holes in the four areas where the corners of the rectangular chip meet.

Cavity forming step, characterized in that the form; (b) applying a selected bonding material comprising a non-conductive paste or non-conductive tape to the inner exposed copper foil surface of the cavity formed in step (a); (c) mounting a chip on the bonding material; And (d) stacking an insulating layer and an outer layer circuit on the inner layer circuit, forming a laser via hole for power supply to a chip electrode inserted into the cavity, and performing copper plating to form a power supply line Manufacturing method comprising a. delete delete A chip embedded printed circuit board manufactured according to claim 1.

Images