KR100896848B1

KR100896848B1 - Method for monitoring defect of semiconductor device

Info

Publication number: KR100896848B1
Application number: KR1020070137124A
Authority: KR
Inventors: 김선주
Original assignee: 주식회사 동부하이텍
Priority date: 2007-12-26
Filing date: 2007-12-26
Publication date: 2009-05-12

Abstract

The present invention relates to a method for monitoring defects in semiconductor devices, and by accurately monitoring which processes have defects by using a chemical solution that can only etch silicon when defects occur in the analysis of DLP family devices. Therefore, the cause of the defect can be easily found and the occurrence of the same defect can be suppressed to stabilize the yield of the semiconductor device.

Monitoring, DUF, Chemicals, Defects

Description

Fault monitoring method of semiconductor device {METHOD FOR MONITORING DEFECT OF SEMICONDUCTOR DEVICE}

The present invention relates to a method for monitoring defects using a chemical solution that can only etch silicon when defects occur in the analysis of the DLP (Digital Light Process) family. will be.

As is well known, in manufacturing semiconductor devices for the DLP family, circuit CDs are gradually reduced as the design rules of the devices become very high, and semiconductor layers and layers, and patterns and pattern structures are complicated. consist of.

In the semiconductor device for the DLP family, a manufacturing method for forming a device may form an N-Well and a DUF layer through the vertical cross-sectional view of each process of FIGS. 1A to 1D.

That is, referring to FIG. 1A, a photoresist film (hereinafter referred to as PR) is completely coated on a semiconductor substrate (P-Substrate) (for example, a silicon substrate) 101, and a part of the applied PR is selectively applied. After removing the PR pattern 103 for forming the DUF region, the etching process is performed using the formed PR pattern 103 as a mask to form the DUF region, and the DUF 105 is formed in the formed DUF region. do. Thereafter, the streaming process is performed to remove the remaining PR patterns 103.

Next, an epitaxial layer 107 is formed on the substrate 101 on which the DUF 105 is formed, as shown in FIG. 1B as an example.

Thereafter, a PR pattern 109 for forming an N-well region on the formed EPI layer 107 is formed as shown in FIG. 1C as an example.

Finally, an N-well region is formed by performing an etching process using the formed PR pattern 109 as a mask, and an N-well implant process is performed on the formed N-well region, for example, as shown in FIG. 1D. -Form a well (111). At this time, the portion not undergoing the N-well implant can be made into a P-well. Thereafter, the streaming process is performed to remove the remaining PR pattern 109.

However, in the vertical cross-sectional view of each process as described above, since two processes exist on the same line as the DUF 105 of FIG. 1B and the N-well 111 of FIG. 1D, the DUF ( If the defect (S1) in the 105 and the N-well 111 occurs, there is a problem that cannot be distinguished in what process.

Accordingly, the technical problem of the present invention is to solve the problems described above, when a defect occurs in the analysis of the DLP family device, a process in which defects are generated using a chemical solution that can only etch silicon The present invention provides a defect monitoring method of a semiconductor device capable of accurately monitoring which process.

In the defect monitoring method of a semiconductor device according to the present invention, a DUF is formed on a semiconductor substrate, an epitaxial layer is formed on the substrate on which the DUF is formed, and the N-well is formed on the EPI layer formed on the EPI layer. Forming vertically; vertical grinding of the formed DUF and N-well specimens; dipping the vertically ground specimen into a chemical solution for a predetermined time; and Identifying the specimens.

The chemical solution is characterized by mixing at a mixing ratio of HNO ₃ : CH ₃ COOH: HF: CuSO ₄ .

The mixing ratio is HNO ₃ : CH ₃ COOH: HF: CuSO ₄ = 180ml: 126ml: 27ml: 4.5ml.

The CuSO ₄ is characterized by dissolving 1.6 g of the CuSO ₄ in 10 ml of water (H ₂ O).

Excluding CuSO ₄ from the mixing ratio, the N-well layer can be inspected (Inspection), but the DUF layer is characterized in that it is impossible to identify.

The predetermined time period is characterized in that the range of 6 to 8 seconds.

In the analysis of the DLP family of devices, the present invention accurately monitors the process where the defect occurs by using a chemical solution that can only etch silicon when defects occur, so that the cause of the defect can be easily found and the same. It is possible to suppress the occurrence of defects and to stabilize the yield of the semiconductor device.

Hereinafter, the operating principle of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, when it is determined that a detailed description of a known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. Terms to be described later are terms defined in consideration of functions in the present invention, and may be changed according to intentions or customs of users or operators. Therefore, the definition should be made based on the contents throughout the specification.

3 is a view illustrating vertical grinding of a DUF layer formed by a manufacturing method for forming a device in a semiconductor device for a DLP family according to a preferred embodiment of the present invention and an N-well thereon, wherein the DUF The manufacturing method in which the layer and the N-well are formed thereon may be formed through a vertical cross-sectional view of each process of FIGS. 1A to 1D.

Here, in the vertical grinding state shown in FIG. 3, only an element and a wiring process can be confirmed on the silicon substrate, and the DUF 105 of FIG. 1B and the N-well 111 of FIG. 1D are formed on the silicon substrate. ) Can not be confirmed.

Thus, the present invention uses a chemical solution to etch only the silicon of a specific site in order to monitor the DUF 105 of FIG. 1B and the N-well 111 of FIG. 1D as described above.

That is, the mixing ratio of the chemical solution is HNO ₃ : CH ₃ COOH: HF: CuSO ₄ = 180 ml: 126 ml: 27 ml: 4.5 ml. Here, since the CuSO ₄ of the above four materials is in a solid state, it is preferable to make 1.6 g of CuSO ₄ dissolved in 10 ml of water (H ₂ O).

Except for CuSO ₄ , the N-well 111 layer of FIG. 1D may be inspected, but the DUF 105 layer of FIG. 1B may not be identified.

Next, dip (or Etch) the vertically ground specimen in the chemical solution thus formed as shown in FIG. 3 in the range of 6 to 8 seconds, and as shown in FIG. 4A, above the DUF 105 layer of FIG. 1B. Although the N-well 111 layer of 1d is well formed, the N-well 111 layer of FIG. 1d is not well formed on the DUF 105 layer of FIG. 1b as shown in FIG. 4b. have.

Here, based on the experimental results, if the vertically ground specimen in the chemical solution as shown in FIG. 3 has a shorter or longer deep time than the range of 6 to 8 seconds, the DUF 105 layer of FIG. Identification of the well 111 layer is not possible.

In addition, since the state of FIG. 4 is a state in which a step (bending) is generated on the silicon surface through silicon etching, the state of FIG. 4 can be observed in a SEM (Secondary Electron Microscope), and the result of the optical observation as shown in FIG. You can make it more clear.

As described above, the present invention accurately monitors the process of defects by using a chemical solution that can only etch silicon when defects occur in the analysis of DLP family devices. It is easy to find and the occurrence of the same defect can be suppressed to stabilize the yield of the semiconductor device.

Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined not only by the scope of the following claims, but also by those equivalent to the scope of the claims.

1A to 1D are vertical cross-sectional views for each process of a manufacturing method for forming a device in a semiconductor device for a DLP family;

2 is a view showing a defect in the DUF and the N-well,

3 is a view illustrating vertical grinding of a DUF layer formed by a manufacturing method for forming a device in a semiconductor device for a DLP family according to a preferred embodiment of the present invention and an N-well thereon;

4 is a view showing a step (bending) is generated on the silicon surface through silicon etching.

101 semiconductor substrate 103 PR pattern

105: DUF 107: epitaxial layer

109: PR pattern 111: N-well

Claims

Forming a DUF on the semiconductor substrate, forming an epitaxial layer on the substrate on which the DUF is formed, and forming an N-well on the formed EPI layer in accordance with the DUF;

Performing vertical grinding of the specimens on the formed DUF and N-well;

Dipping the vertically ground specimen into a chemical solution for a predetermined time;

Identifying the dip specimen

Defect monitoring method of a semiconductor device comprising a.

The method of claim 1,

The chemical solution is a defect monitoring method of a semiconductor device, characterized in that the mixture of HNO ₃ : CH ₃ COOH: HF: CuSO ₄ mixed.

The method of claim 2,

The mixing ratio _{is, HNO 3: CH 3 COOH:} HF: CuSO 4 = 180ml: 126ml: 27ml: defect monitoring method of a semiconductor device, characterized in that 4.5ml.

The method of claim 3, wherein

The CuSO _4, water (H ₂ O) defect monitoring method of the semiconductor device of the CuSO ₄ in 10ml characterized in that to create the dissolve 1.6g.

The method of claim 2,

Excluding CuSO ₄ from the mixing ratio, the N-well layer can be inspected (Inspection), but the DUF layer can not be identified defect monitoring method of a semiconductor device.

The method of claim 1,

The predetermined time period is in the range of 6 to 8 seconds.