KR100896845B1 - Method for forming photo resist pattern for manufacturing a semiconductor device - Google Patents

Method for forming photo resist pattern for manufacturing a semiconductor device Download PDF

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Publication number
KR100896845B1
KR100896845B1 KR1020070133755A KR20070133755A KR100896845B1 KR 100896845 B1 KR100896845 B1 KR 100896845B1 KR 1020070133755 A KR1020070133755 A KR 1020070133755A KR 20070133755 A KR20070133755 A KR 20070133755A KR 100896845 B1 KR100896845 B1 KR 100896845B1
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KR
South Korea
Prior art keywords
mask
exposure
pattern
photoresist
photoresist layer
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KR1020070133755A
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Korean (ko)
Inventor
전영두
Original Assignee
주식회사 동부하이텍
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Priority to KR1020070133755A priority Critical patent/KR100896845B1/en
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70466—Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

The present invention relates to a method of forming a photoresist pattern for fabricating a semiconductor device, the method comprising: firstly exposing a photoresist layer coated on a wafer using a mask on which an exposure pattern is formed; Differential development to remove the non-exposed areas, moving the mask to align the exposure pattern so as to be located on the exposure area of the photoresist layer after the primary development, and second exposure to the photoresist layer using the mask And forming a photoresist pattern on the wafer by secondary development of the photoresist layer after the secondary exposure to remove the non-exposed areas. Therefore, the present invention can accurately form a fine photoresist pattern using a single mask, reduce the manufacturing cost of the semiconductor device by reducing the cost of manufacturing the mask, compensation and control for the accuracy of the photoresist pattern Not only is easy to have, but also has the effect of easy maintenance and repair of the mask.

Photoresist pattern, exposure pattern, exposure area, non-exposed area, development

Description

Method for forming photo resist pattern for manufacturing a semiconductor device

The present invention relates to a method of forming a photoresist pattern for the manufacture of a semiconductor device to accurately form a fine photoresist pattern using a single mask, and to reduce the cost of manufacturing the mask.

In general, semiconductor devices are manufactured by various unit processes, for example, in order to form a pattern of a thin film on a wafer, a process of applying a photoresist, an exposure process, and a developing process may be performed in combination, and patterned on a wafer. An ion implantation process for implanting impurities having predetermined characteristics into a wafer through a photoresist pattern, an etching process for etching and patterning a semiconductor thin film already formed, a deposition process for adding a predetermined thin film to the wafer, and a circuit pattern of a fine thin film The metal process to connect, etc. are performed.

Meanwhile, a mask is required to form a patterned photoresist pattern on a wafer in a process for manufacturing a semiconductor device, and a double exposure using a phase-shift mask (PSM) is used to improve the resolution. mask).

Referring to the accompanying drawings, a process for forming a photoresist pattern using a conventional double exposure is described as follows.

1A and 1B are process diagrams sequentially illustrating a method of forming a photoresist pattern for manufacturing a semiconductor device according to the related art. As shown, a method of forming a photoresist pattern for manufacturing a semiconductor device according to the related art is shown in FIG. 1A, wherein the first and second exposures are performed on a wafer W on which the photoresist layer 1 is formed. Two first and second masks 2 and 3 on which patterns 2a and 3a are formed are positioned up and down, respectively, so that the first exposure pattern 2a is located between the second exposure patterns 3a. And second masks 2,3.

Then, the first and second masks 2 and 3 are irradiated with light so that the photoresist layer 1 is exposed to the first and second non-exposed regions 1a and 1 by the first and second exposure patterns 2a and 3a. 1b).

Once the inverses 1a and 1b are formed, as shown in Fig. 1B, the photoresist layer 1 is developed to remove the exposure area 1c in the case of the positive photoresist as in the present embodiment, thereby removing the first region. And photoresist patterns 1a and 1b including the second non-exposed regions 1a and 1b. Alternatively, in the case of negative photoresist, the first and second non-exposed regions 1a and 1b are formed. By removing, the photoresist pattern which consists of exposure area | region 1c can be formed.

The conventional method of forming a photoresist pattern using the double exposure as described above is advantageous for forming a fine pattern, but not only two masks are required but also such a mask is not a binary mask but a phase shift mask (PSM). As a result, the manufacturing cost of the semiconductor device is increased due to the high manufacturing cost, and since the mask is positioned up and down, compensation is required due to the difference in the size of the photoresist pattern generated by the distance between the mask and the photoresist layer. In addition to the need for precise control, if any one of the masks is contaminated, the photoresist pattern generates defects, and thus, a lot of effort and time are required to prevent the problem.

According to the present invention, it is possible to precisely form a fine photoresist pattern using a single mask and to reduce the manufacturing cost of the semiconductor device by reducing the cost of manufacturing the mask.

In the method of forming a photoresist pattern for manufacturing a semiconductor device according to the present invention, in the method of forming a photoresist pattern on a wafer, a step of firstly exposing a photoresist layer coated on a wafer using a mask on which an exposure pattern is formed Firstly developing the first exposed photoresist layer to remove the non-exposed areas, and moving the mask so that the exposure pattern is aligned on the exposed area of the photoresist layer that has undergone the first development; And secondly exposing the photoresist layer to the photoresist layer using a mask, and forming the photoresist pattern on the wafer by secondarily developing the photoresist layer after the second exposure to remove the non-exposed areas.

According to the present invention, it is possible to precisely form a fine photoresist pattern using a single mask, and to reduce the manufacturing cost of the semiconductor device by reducing the cost of manufacturing the mask, and to easily compensate and control for the accuracy of the photoresist pattern. In addition, it has the effect of making it easy to maintain and repair the mask.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In addition, in describing the present invention, when it is determined that the detailed description of the related known configuration or function may obscure the gist of the present invention, the detailed description thereof will be omitted.

2A through 2E are flowcharts sequentially illustrating a method of forming a photoresist pattern for manufacturing a semiconductor device according to the present invention. As shown, the method of forming a photoresist pattern for manufacturing a semiconductor device according to the present invention comprises the steps of first exposing the photoresist layer 20 with a mask 10 and the first photoresist layer 20 exposed first. Is developed to remove the non-exposed areas 21 and the mask 10 is aligned so that the exposure pattern 11 is positioned on the exposed area 22 of the photoresist layer 20 which has undergone the primary development. And performing a second exposure of the photoresist layer 20 with the mask 10, and removing the non-exposed areas 23 of the photoresist layer 20 after the second exposure.

As shown in FIG. 2A, the mask 10 is aligned so as to be spaced apart from the wafer W having the photoresist layer 20 formed thereon by coating the photoresist, and then irradiated with light to the mask 10. The non-exposed areas 21 are formed in the photoresist layer 20 by the exposure pattern 11 formed on the mask 10. In this case, a negative photoresist may be used as the photoresist, and a binary mask may be used as the mask 10.

As shown in FIG. 2B, the photoresist layer 20 transfers the first exposed wafer W to a developing apparatus, and applies a developer to the first exposed photoresist layer 20 to develop the photoresist. The non-exposed areas 21 of the layer 20 are removed, the developer is removed by a cleaning and rinsing process, and the wafer W is dried.

As shown in FIG. 2C, the wafer W from which the non-exposed areas 21 are removed from the photoresist layer 20 by the primary development is transferred to the exposure equipment, and then the mask 10 positioned on the upper side is moved. The exposure pattern 11 is moved in the horizontal direction so that the exposure pattern 11 is aligned on the exposure area 22 of the photoresist layer 20 after the first development.

On the other hand, it is preferable to align the mask 10 so that the center O 1 of the exposure pattern 11 coincides with the center O 2 of the exposure area 22 during alignment. Therefore, when forming the same width photoresist pattern at the same interval can be usefully applied.

As shown in FIG. 2D, when the mask 10 is aligned such that the exposure pattern 11 is positioned above the exposure area 22 of the photoresist layer 20, the mask 10 is irradiated with light to form a photoresist layer. Secondary exposure is performed at 20.

As shown in FIG. 2E, the wafer W having undergone secondary exposure is transferred to a development apparatus to secondaryly develop the photoresist layer 20 after secondary exposure, thereby non-exposed regions formed by secondary exposure. By removing the (23), the non-exposed areas 21 and 23 are removed by the primary and secondary phenomena so that the fine photoresist pattern 30 is formed on the wafer (W).

The photoresist pattern forming method for manufacturing a semiconductor device according to the preferred embodiment of the present invention is double exposure even with a single mask 10 by using an offset value of an overlay in an exposure process. It is possible to expose as well as to accurately form the fine photoresist pattern 30, thereby saving the cost or effort required to manufacture and maintain the mask (10).

In addition, even when the mask 10 is used as a single binary mask, it is possible to form a fine photoresist pattern 30 to reduce the manufacturing cost of the mask 10 to reduce the manufacturing cost of the semiconductor device Contribute.

In addition, since the mask 10 is made of a single, alignment and compensation are simple, and the control for the accuracy of the photoresist pattern is not only simple, but also easy to be applied to the equipment used in the existing photo process.

As described above, specific embodiments have been described in the detailed description of the present invention, but it is obvious that the technology of the present invention can be easily modified by those skilled in the art, and such modified embodiments are defined in the claims of the present invention. It will be included in the technical spirit described.

1A and 1B are process diagrams sequentially illustrating a method of forming a photoresist pattern for manufacturing a semiconductor device according to the related art.

2A through 2E are flowcharts sequentially illustrating a method of forming a photoresist pattern for manufacturing a semiconductor device according to the present invention.

<Explanation of symbols for the main parts of the drawings>

10 mask 11 exposure pattern

20: photoresist layer 21, 23: non-exposed area

22 exposure area 30 photoresist pattern

Claims (2)

In the method of forming a photoresist pattern on a wafer, Firstly exposing the photoresist layer coated on the wafer using a mask having an exposure pattern formed thereon; First developing the first exposed photoresist layer to remove non-exposed areas; Moving the mask to align the exposure pattern so as to be positioned on an exposure area of the photoresist layer which has undergone primary development; Second exposure to the photoresist layer using the mask; Forming a photoresist pattern on the wafer by second developing the photoresist layer after the second exposure to remove non-exposed areas Photoresist pattern forming method for manufacturing a semiconductor device comprising a. The method of claim 1, Aligning the mask, Aligning the center of the exposure pattern to coincide with the center of the exposure area Photoresist pattern forming method for manufacturing a semiconductor device characterized in that.
KR1020070133755A 2007-12-18 2007-12-18 Method for forming photo resist pattern for manufacturing a semiconductor device KR100896845B1 (en)

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KR1020070133755A KR100896845B1 (en) 2007-12-18 2007-12-18 Method for forming photo resist pattern for manufacturing a semiconductor device

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960012332A (en) * 1994-09-08 1996-04-20 김주용 Method of forming fine pattern of semiconductor device
KR970007173B1 (en) * 1994-07-14 1997-05-03 현대전자산업 주식회사 Fine patterning method
JP2002258462A (en) * 2001-02-27 2002-09-11 Mitsubishi Materials Corp Mask, method, and device for exposure
US6696227B2 (en) 2001-02-26 2004-02-24 Nanya Technology Corporation Shift multi-exposure method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970007173B1 (en) * 1994-07-14 1997-05-03 현대전자산업 주식회사 Fine patterning method
KR960012332A (en) * 1994-09-08 1996-04-20 김주용 Method of forming fine pattern of semiconductor device
US6696227B2 (en) 2001-02-26 2004-02-24 Nanya Technology Corporation Shift multi-exposure method
JP2002258462A (en) * 2001-02-27 2002-09-11 Mitsubishi Materials Corp Mask, method, and device for exposure

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