KR100887996B1 - Thin Film Transistor for Liquid Crystal Display Device with driving circuit and method of fabricating the same - Google Patents

Abstract

Cracks are generated on the gate electrode and the gate insulating layer by heat absorbed by the molybdenum (Mo) forming the gate electrode during laser activation of the semiconductor layer of the pixel unit switching element and the driving unit CMOS element of the driving circuit integrated liquid crystal display device. The breakdown phenomenon occurs at low voltage.

In the present invention, in order to solve the above-mentioned problem, a multi-layered gate electrode is formed by adding aluminum-neodymium (AlNd) having good thermal conductivity and ductility and conductivity in the gate electrode structure of the thin film transistor to form a laser on the gate insulating film and the gate electrode Provided is a thin film transistor of a liquid crystal display device with an integrated driving circuit capable of suppressing crack generation during activation and thereby preventing breakdown at low voltage.

Polysilicon, multiple gate electrodes, laser activation, breakdown

Description

Thin film transistor for liquid crystal display device with integrated driving circuit and manufacturing method therefor {Thin Film Transistor for Liquid Crystal Display Device with driving circuit and method of fabricating the same}             

1 is a schematic diagram of a general liquid crystal display device integrated with a driving circuit unit;

2A and 2B are sectional views of a thin film transistor of a conventional pixel portion switching element and driving circuit portion CMOS.

3 shows a gate electrode after laser activation.

4 is a cross-sectional view of a thin film transistor of a liquid crystal display integrated with a driving circuit according to a first embodiment of the present invention.

5A to 5F and process cross-sectional views of manufacturing thin film transistors of the liquid crystal display device with integrated driving circuit according to the first embodiment of the present invention.

6 is a cross-sectional view of a thin film transistor of a liquid crystal display integrated with a driving circuit according to a second embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

100: insulating substrate 105: buffer layer                 

110a: active channel layer 110b: LDD layer

110c: ohmic contact layer 115: gate insulating film

120: gate electrode having a triple structure 130: interlayer insulating film

133a and 133b semiconductor layer contact hole 140a source electrode

140b: drain electrode 150: protective layer

155 drain electrode contact hole 160 pixel electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a thin film transistor and a method of manufacturing the liquid crystal display device integrated with a driving circuit.

Recently, liquid crystal displays have been spotlighted as next generation advanced display devices having low power consumption, good portability, technology-intensive, and high added value.

The liquid crystal display device injects a liquid crystal between an array substrate including a thin film transistor (TFT) and a color filter substrate to obtain an image effect by using a difference in refractive index of light according to the anisotropy of the liquid crystal. Means an image display device by a non-light emitting element.

Currently, an active matrix liquid crystal display (AM-LCD) in which the thin film transistor and the pixel electrode are arranged in a matrix manner is attracting the most attention due to its excellent resolution and ability to implement a moving image. Amorphous silicon (a-Si) is mainly used as a device because low-temperature processing is possible, so that a low-cost insulating substrate can be used.

However, because hydrogenated amorphous silicon has disordered atomic arrangements, weak Si-Si bonds and dangling bonds exist, which are converted into a quasi-stable state when irradiated with light or applied with an electric field, and used as a thin film transistor device. It is difficult to use as a driving circuit due to poor stability and low electrical characteristics (low field effect mobility: 0.1 to 1.0 cm2 / V · s).

Therefore, in general, a driving device manufactured separately is connected to the liquid crystal panel, and as a representative example, the driving device is manufactured in TCP (Tape Carrier Package) and attached to the liquid crystal panel.

On the other hand, since polysilicon has a greater field effect mobility than amorphous silicon, a driving circuit can be made on a substrate, thereby reducing costs and simplifying mounting compared to a liquid crystal display device using TCP or the like.

1 is a schematic diagram of a general liquid crystal display device integrated with a driving circuit unit.

As shown, the driving circuit portion 5 and the pixel portion 3 are formed on the insulating substrate 1 together. The pixel portion 3 is positioned at the center of the substrate 1, and the gate and data driving circuit portions 5a and 5b are positioned at one side of the pixel portion 3 and the other side not parallel thereto. The pixel portion 3 includes a plurality of gate wires 7 connected to the gate driving circuit part 5a and a plurality of data wires 9 connected to the data driving circuit part 5b intersect with each other. The pixel electrode 10 is formed in the pixel region P defined by the pixel region, and the thin film transistor T connected to the pixel electrode 10 is positioned at the intersection of the two wires.

In addition, the gate and data driving circuit unit are connected to an external signal input terminal 12. The gate and data driver circuits 5a and 5b internally adjust an external signal input through the external signal input terminal 12 to control the display to the pixel unit 3 through the gate and data lines 7 and 9, respectively. Apparatus for supplying signals and data signals.

Accordingly, the gate and data driver circuits 5a and 5b are formed with a complementary metal-oxide semiconductor (CMOS) structure thin film transistor (not shown), which is an inverter, to properly output an input signal. It is.

The CMOS is a semiconductor technology used in a thin film transistor for driving circuits requiring high-speed signal processing. The CMOS uses extra electrons (n-type semiconductor) and negatively charged holes (p-type semiconductor) charged with negative electricity. It is used as a complementary method for forming a conductor and forming a current gate by effective electrical control of the two kinds of semiconductors.

2A and 2B are cross-sectional views respectively showing cross-sections of a pixel portion thin film transistor and a driving circuit portion CMOS structure thin film transistor of a driving circuit integrated liquid crystal display device.                         

As shown in FIG. 2A, a buffer layer 25 made of an inorganic insulating material such as silicon oxide (SiO ₂ ) is formed on an entire surface of the substrate 20 on the insulating substrate 20, and is disposed on the buffer layer 25. The semiconductor layer 30 is formed, and the gate insulating layer 45 is formed on the entire surface of the semiconductor layer 30. In addition, a gate electrode 50 of molybdenum (Mo) is formed on the gate insulating layer 45, and an interlayer insulating layer 70 is formed on the gate electrode 50. Semiconductor layer contact holes 73a and 73b for contacting the semiconductor layer 30 are formed in the gate insulating layer 45 and the interlayer insulating layer 70, and the semiconductor layer contact hole 73a is disposed on the interlayer insulating layer 70. , 73b), and the source and drain electrodes 80a and 80b are formed to be spaced apart from the gate electrode 50 by a predetermined distance. A protective layer 90 including a drain electrode contact hole 95 is formed on the drain electrode 80b, and the drain electrode 80 is formed on the protective layer 90 through the drain electrode contact hole 95. ) Is connected to the pixel electrode 97.

In the semiconductor layer 30, a portion of the lower region of the gate insulating layer 45 corresponding to the gate electrode 50 forms an active channel layer 30a, and a portion of the semiconductor layer 30 contacting the source and drain electrodes 80a and 80b is n. ⁺ Doped to form an n-type ohmic contact layer 30c, and an n ⁻ doped Lightly Doped Drain (LDD) layer 30b is formed between the active layer 30a and the n-type ohmic contact layer 30c. The LDD layer 30b is doped to a low concentration for the purpose of dispersing hot carriers, thereby preventing an increase in leakage current and preventing a loss of current in an on state.

Next, referring to FIG. 2B, which is a cross-sectional view of the CMOS structure thin film transistor of the driving circuit portion. In this case, the CMOS driving device of the driving circuit unit may include an n-type thin film transistor (II) including a semiconductor layer 35 doped with n + and a p-type thin film transistor (III) including a semiconductor layer 40 doped with p +. It is composed.

As illustrated, the n-type semiconductor layer 35 and the p-type semiconductor layer 40 are formed on the transparent insulating substrate 20 having the buffer layer 25 spaced apart from each other by a predetermined distance, and the n-type and p-type semiconductor layers The gate insulating layer 45 is formed on the entire surface of the upper portion 35 and 40, and the gate electrodes 55 and 60 are formed on the gate insulating layer 45. An interlayer insulating layer 70 including semiconductor layer contact holes 75a, 75b, 77a, and 77b is formed over the gate electrode 55 and 60, and the semiconductor layer contact is formed on the interlayer insulating layer 70. Source and drain electrodes (83a, 87a, 83b, 87b) are formed in contact with the n-type and p-type semiconductor layers 35, 40 through holes 75a, 75b, 77a, 77b, respectively. A protective layer 90 is formed over the entire surface of the source and drain electrodes 83a, 87a, 83b, 87b.

A region of the n-type semiconductor layer 35 corresponding to the gate electrode 55 and formed under the gate insulating layer 45 forms an active channel layer 35a and contacts the source and drain electrodes 83a and 83b. The semiconductor layer including the region constituting the n ⁺ doped n-type ohmic contact layer 35c is formed of n ^- doped LDD layer 35b between the active channel layer 35a and the n-type ohmic contact layer 35c. Is fulfilling. In addition, since the p-type semiconductor layer 40 uses holes as carriers, since the deterioration of the carrier and the leakage current are less affected than the n-type thin film transistors, the pD semiconductor layer 40 does not form an LDD layer. The semiconductor layer region under the corresponding gate insulating layer 45 forms the active channel layer 40a, and the outer region of the active channel layer 40a forms the p-type ohmic contact layer 40c.

However, in the above-described thin film transistor element of the liquid crystal display device integrated with a driving circuit, when the metal layer constituting the gate electrode is doped with n-, n + and p + by using molybdenum (Mo), the semiconductor layer is laser activated. A crack is generated on the gate insulating layer due to a difference in thermal expansion coefficient between molybdenum (Mo), a material forming a gate electrode, and a material forming a gate insulating layer under the gate electrode. When the excimer laser annealing having the wavelength of 308 nm is carried out, this is due to thermal shock caused by a high temperature rise using molybdenum (Mo) having a high absorption coefficient for energy of 308 nm as a gate electrode. cracks and cracks will occur.

3 is a view showing a gate electrode when the laser is activated by an excimer laser having a wavelength of 308 nm having an energy density of 230 mJ / cm 2. As shown in the figure, it can be seen that cracks are generated on the surface of molybdenum (Mo) constituting the gate electrode. At this time, if the energy density is lowered, the occurrence of the crack is reduced, but the energy density should be maintained at 220 mJ / cm 2 or more when the laser is activated due to the reliability of the hot carrier of the n-type thin film transistor device among CMOS devices. do. When the laser is activated at an energy density of 220 mJ / cm 2 or more, cracks occur in the gate electrode and the gate insulating layer of molybdenum (Mo).

The above-mentioned cracks in the gate insulating film generate a floating phenomenon between the gate insulating film and the gate electrode, and such structural defects cause breakdown at an abnormally low voltage.

In order to solve the above problems, in the present invention, the gate electrode structure of the conventional molybdenum (Mo) single layer is formed using a ductile metal material to form a gate electrode having a double or triple structure, followed by a laser activation process. SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor of a liquid crystal display device integrated with a driving circuit which prevents breakdown between a gate and an active layer due to structural defects.

In order to achieve the above object, the thin film transistor of the driving circuit-integrated liquid crystal display device according to the embodiment of the present invention comprises an insulating substrate; A buffer layer on the insulating substrate; A semiconductor layer on the buffer layer; A gate insulating film on the semiconductor layer; A gate electrode having a multilayer structure on the gate insulating film; An interlayer insulating film formed over the gate electrode of the multilayer structure; And a source and a drain electrode formed on the interlayer insulating film.

In this case, the gate electrode of the multi-layer structure is characterized in that the double or triple structure, the gate structure of the double structure is formed of aluminum-neodymium (AlNd) / molybdenum (Mo), the gate structure of the triple structure. Is characterized in that it is formed of molybdenum (Mo) / aluminum-neodymium (AlNd) / molybdenum (Mo).                     

A thin film transistor manufacturing method of a driving circuit-integrated liquid crystal display device according to an exemplary embodiment of the present invention includes forming a buffer layer on an insulating substrate; Forming an amorphous silicon layer over the buffer layer; Crystallizing the amorphous silicon layer with a polysilicon layer; Patterning the polysilicon layer to form a semiconductor layer of polysilicon; Forming a gate insulating film on the semiconductor layer; Forming a double structure gate electrode of aluminum-neodymium (AlNd) / molybdenum (Mo) or a triple structure gate electrode of molybdenum (Mo) / aluminum-neodymium (AlNd) / molybdenum (Mo) on the gate insulating film; Doping is performed on the entire surface of the substrate on which the gate structure of the double structure or the triple structure is formed, and the doping is performed by the ohmic contact layer in which the doping is performed on the semiconductor layer of the polysilicon and the gate electrode of the double structure or the triple structure. Forming an unactivated active channel layer; Laser activating a semiconductor layer of the polysilicon on which the ohmic contact layer and the active channel layer are formed; Forming an interlayer insulating film having a semiconductor layer contact hole exposing the ohmic contact layer over the double or triple structure gate electrode; Forming a source and a drain electrode on the interlayer insulating layer, the source and drain electrodes contacting the ohmic contact layer of the semiconductor layer through the semiconductor layer contact hole; Forming a protective layer on the entire surface of the substrate on which the source and drain electrodes are formed.

In this case, the double-structured gate electrode deposits aluminum-neodymium (AlNd) on the gate insulating layer, and subsequently, molybdenum (Mo) is deposited on the aluminum-neodymium (AlNd), and subsequently etched by a mask process. It is made to have a double structure of aluminum-neodymium (AlNd) / molybdenum (Mo), or the gate electrode of the triple structure deposits molybdenum (Mo) on the gate insulating film, and successively the aluminum- on the molybdenum (Mo) Neodymium (AlNd) is deposited, molybdenum (Mo) is sequentially deposited on the aluminum-neodymium (AlNd), and the mask process is performed, followed by batch etching to molybdenum (Mo) / aluminum-neodymium (AlNd) / molybdenum (Mo). It is characterized by having a three-layer structure of.

In this case, the aluminum-neodymium (AlNd) / molybdenum (Mo) of the double structure of the gate electrode is aluminum-neodymium (AlNd) is deposited to 2000 ~ 3500 Å, the molybdenum (Mo) is deposited to 300 Å to 1500Å, the molybdenum The gate electrode having a triple structure of (Mo) / aluminum-neodymium (AlNd) / molybdenum (Mo) is 300 kV to 1500 kPa for the first and second molybdenum (Mo), and 2000 kPa to 3500 kPa for aluminum-neodymium (AlNd). It is characterized by being deposited.

delete

In addition, the laser activation of the semiconductor layer is characterized in that it proceeds with XeCl excimer laser of 308nm wavelength.

Hereinafter, a thin film transistor of a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

<First Embodiment>

FIG. 4 is a cross-sectional view of an n-type thin film transistor which is a switching element or driving element of the liquid crystal display integrated with a driving circuit according to the first embodiment of the present invention. The p-type thin film transistor, which is one of the driving elements, is almost similar to the n-type thin film transistor, and only the structure of the semiconductor layer is not shown in the drawings because only the structure of the p-type ohmic contact layer and the active channel layer is different.

As shown, a buffer layer 105 made of an inorganic insulating material, for example, silicon oxide (SiO ₂ ), is formed on the entire surface of the substrate 100 on the insulating substrate 100, and an n-type is formed on the buffer layer 105. A semiconductor layer 110 including three portions of an ohmic contact layer 110c, an LDD layer 110b, and an active channel layer 110a is formed, and a gate insulating layer over the active channel layer 110a of the semiconductor layer 110 is formed. A gate electrode 120 having a triple structure of 115 and a molybdenum (Mo) layer 120a / aluminum-neodymium (AlNd) layer 120b and a molybdenum (Mo) layer 120c are formed. An interlayer insulating layer 130 including semiconductor layer contact holes 133a and 133b is formed on the electrode 120, and the semiconductor layer contact holes 133a and 133b are disposed on the interlayer insulating layer 130, respectively. The source and drain electrodes 140a and 140b are formed in contact with the semiconductor layer 110 and spaced apart from each other at regular intervals. A protective layer 150 including a drain electrode contact hole 155 is formed on the drain electrode 140b, and the drain electrode 140b is formed on the protective layer 150 through the drain electrode contact hole 155. ) Is connected to the pixel electrode 160. In this case, the semiconductor layer 110, the lower region of the gate insulating layer 115 corresponding to the gate electrode 120, forms the active channel layer 110a, and a portion of the semiconductor layer 110 contacting the source and drain electrodes 140a and 140b is n ^+. A doped n-type ohmic contact layer 110c is formed, and a low concentration of n- is doped between the active channel layer 110a and the n-type ohmic contact layer 110c to prevent hot carrier dispersion and leakage current increase. LDD (Lightly Doped Drain) layer 110b is formed.

As described above, a method of manufacturing a thin film transistor which is a switching element or a driving element of a drive circuit-integrated liquid crystal display device according to the present invention will be described.                     

5A through 5F are cross-sectional views illustrating manufacturing steps of a thin film transistor that is a switching element of a pixel unit and a driving element of a driving circuit unit according to a first exemplary embodiment of the present invention.

First, as shown in FIG. 5A, the buffer layer 105 is formed of an inorganic insulating material such as silicon oxide (SiO ₂ ) over the transparent insulating substrate 100. In the buffer layer 105, when the amorphous silicon layer is crystallized into a polysilicon layer, alkali ions such as sodium ions (Na +), etc., present in the substrate 100 may be generated by heat. This is to prevent the film quality of the layer from deteriorating. Thereafter, amorphous silicon is deposited on the buffer layer 105 over the entire surface, and the amorphous silicon is crystallized using a laser to form a polysilicon layer. Thereafter, a mask process is performed to pattern the polysilicon layer to form the semiconductor layer 110.

Next, as illustrated in FIG. 65, silicon oxide (SiO ₂ ) is deposited on the entire surface of the substrate 100 on which the semiconductor layer 110 is formed, and then the gate insulating layer 115 is formed. The molybdenum (Mo) layer 120a is formed to a thickness of 300 kPa to 1500 kPa using sputtering equipment. Subsequently, aluminum-neodymium (AlNd) is successively deposited on the molybdenum (Mo) layer 120a to a thickness of about 2000 kW to 3500 kW to form an aluminum-neodymium (AlNd) layer 120b, and then continuously to 300 kW to 1500 kW of thickness. A molybdenum (Mo) layer 120c is formed on the aluminum-neodymium (AlNd) layer 120b. Thereafter, a photoresist is applied on the triple metal layer and a mask process is performed to pattern the photoresist, and the molten densities are collectively etched using an etching solution capable of simultaneously etching the molybdenum (Mo) and aluminum-neodymium (AlNd). A gate electrode 120 having a triple structure of a ribbed (Mo) layer 120a / aluminum-neodymium (AlNd) layer 120b / molybdenum (Mo) layer 120c is formed.

Next, n-doping by ion implantation is performed on the entire surface of the substrate 100 on which the gate electrode 120 having the triple structure is formed. The n-doped semiconductor layer is n-doped. At this time, the semiconductor layer 110a corresponding to the gate electrode 120 is not doped.

After the PR pattern 122 is formed on a portion of the n-doped substrate 100 corresponding to a part of the semiconductor layer, the semiconductor layer 110 is formed by performing a high concentration of n + doping with a dose of 1E15 / cm 2 to 9E15cm 2. ) N-type ohmic contact layer (110c) is formed in a portion. In this case, a part of the semiconductor layer in which n− and n + doping is blocked by the triple-structured gate electrode 120 forms an active channel layer 110a, and between the n + doped ohmic contact layer 110c and the active channel layer. The semiconductor layer consisting of only n-doping forms the LDD layer 110b.

Although not shown, in the p-type thin film transistor of the driving circuit portion, p ⁺ doping is performed by ion implantation in which 2E15 / cm 2 to 1E16cm 2 have a dose amount without n + doping. The semiconductor layer except for the portion blocked by the gate electrode is p + doped to form a p-type ohmic contact layer. The semiconductor layer doped off by the gate electrode forms an active channel layer.

Next, as shown in FIG. 5C, an excimer laser annealing (Excimer) using an 308 nm wavelength excimer laser using XeCl in a semiconductor layer in which the n-, n + doping or p + doping (in the case of a p-type thin film transistor of a driver) is used. Laser Annealing (ELA) is performed to activate the semiconductor layer. The activation process is to recrystallize the semiconductor layer region amorphous by doping, and to perform electrical activation of the dopant implanted during doping. Molybdenum (Mo) surface temperature is high because the absorption coefficient of molybdenum (Mo) for the wavelength of 308nm XeCl laser is large. The advantage of laser activation means that the temperature of the polysilicon is instantaneously raised to make the ion implanted element electrically active. However, since the gate electrode is also exposed to the laser during the activation process, the temperature rises due to this, causing thermal shock to the silicon oxide, which is the gate insulating layer, and thus destroying the silicon oxide (SiO 2). The thermal shock is proportional to the difference between the initial temperature and the increased temperature. Therefore, it is necessary to find an energy density that can be activated while reducing thermal shock of silicon oxide.

Therefore, in order to suppress the above-mentioned temperature rise, the molybdenum (Mo) layer 120a / aluminum-neodymium (AlNd) layer 120b / molybdenum (Mo) to which the aluminum-neodymium (AlNd) layer 120b having high thermal conductivity is further applied. The gate electrode 120 having a triple structure of the) layer 120c was formed. Energy absorbed by the upper molybdenum (Mo) layer 120c is released by the heat conduction of the aluminum-neodymium (AlNd) layer 120b, and thus heat applied to the gate insulating film 115 of silicon oxide (SiO ₂ ). Shock can be suppressed. In addition, since the aluminum-neodymium (AlNd) layer 120b having excellent malleability and ductility is absorbed by the thermal energy due to thermal shock, cracking of the gate insulating film 115 or the gate electrode 120 is suppressed to cause breakdown at a low voltage. Suppress it.

Next, as shown in FIG. 5D, an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiO ₂ ) is deposited on the entire surface of the substrate 100 where laser activation of the semiconductor layer 110 is performed. 130 is formed. Subsequently, the mask process is performed, and the interlayer insulating layer 130 and the gate insulating layer 115 are etched together to expose the semiconductor layer contact holes 133a and 133b exposing a portion of the ohmic contact layer 110c of the semiconductor layer 110 to the outside. Form.

Next, as shown in FIG. 5E, a metal material such as aluminum-neodymium (AlNd) and molybdenum (Mo) on the entire surface of the substrate 100 over the interlayer insulating layer 130 on which the semiconductor layer contact holes 133a and 133b are formed. Are continuously deposited, a mask process is performed, and batch etching is performed to form the source and drain electrodes 140a and 140b.

Next, as shown in FIG. 5F, a water insulating material such as silicon nitride (SiNx) is entirely deposited on the substrate 100 on which the source and drain electrodes 140a and 140b are formed, and the silicon nitride ( SiNx is patterned to form a protective layer 150 having a drain contact hole 155. In this case, the drain contact hole 155 is formed only in the thin film transistor which is a switching element of the pixel portion. Thereafter, a hydrogenation heat treatment process is performed to improve device characteristics.

The following is a process corresponding to the pixel portion thin film transistor, which belongs to the array substrate manufacturing process, not the thin film transistor manufacturing process, but is briefly mentioned since it is associated with the thin film transistor manufacturing process. Indium-Tin-Oxide (ITO) or Indium-Zinc-Oxide (IZO), which is a transparent conductive material, is deposited on the entire surface of the substrate 100 on which the drain contact hole 155 is formed. The mask process is performed to form the pixel electrode 160 in contact with the drain electrode 140b through the drain contact hole 155.

Second Embodiment

A second embodiment of the present invention provides a thin film transistor having the gate electrode 220 having a double structure of an aluminum-neodymium (AlNd) layer 120a / molybdenum (Mo) layer 120b.

Except for the configuration of the double gate electrode 220, since it is manufactured in the same manner as in the first embodiment, a brief description will be given.

As shown in FIG. 6, a buffer layer 205 of silicon oxide on the insulating substrate 200, a semiconductor layer 210 of polysilicon, and a gate insulating film 215 of silicon oxide (SiO ₂ ) are formed on the buffer layer 205. Are formed sequentially. A double gate electrode 220 having an aluminum-neodymium (AlNd) layer 220a and a molybdenum (Mo) layer 220b is formed on the gate insulating layer 215. At this time, the aluminum-neodymium (AlNd) layer 220a constituting the double gate electrode 220 has a thickness of about 2000 kPa to 3500 kPa and a molybdenum (Mo) layer 220b to 300 kPa to 1500 kPa. Next, an interlayer insulating film 230 is formed on the double structure gate electrode 220, and a portion of the interlayer insulating film 230 and the gate insulating film 215 are patterned to form semiconductor layer contact holes 233a and 233b. The ohmic contact layer 210c is exposed through the semiconductor layer contact holes 233a and 233b. In addition, source and drain electrodes 240a and 240b made of a metal material such as aluminum-neodymium (AlNd) or molybdenum (Mo) are formed on the interlayer insulating layer 230 in contact with the exposed ohmic contact layer 210c. A passivation layer 250 is formed on the source and drain electrodes 240a and 240b. In the case of the thin film transistor, which is a switching element of the pixel unit, a portion of the protective layer 250 is patterned to form a drain electrode contact hole 255 exposing the drain electrode 240b and a drain electrode through the drain electrode contact hole 255. The pixel electrode 260 in contact with 240b is formed.

As in the second embodiment of the present invention, even when a gate electrode having a double structure of a molybdenum (Mo) layer / aluminum-neodymium (AlNd) layer is formed, an activation process of a doped semiconductor layer by a XeCl excimer laser of 308 nm wavelength is performed. The thermal energy is diffused by the aluminum-neodymium (AlNd) layer formed on the lower part of the molybdenum (Mo) layer to suppress the rapid rise in temperature by cooling the energy absorbed in the molybdenum (Mo) layer forming the upper part of the gate electrode. The thermal shock applied to the gate insulating film can be alleviated.

However, the dual structure of molybdenum (Mo) / aluminum-neodymium (AlNd) does not cause malfunction of the device due to absorption of elastic energy due to thermal shock, but the aluminum-neodymium (AlNd) layer is locally raised. Bugging can also occur.

The buzzing phenomenon of aluminum-neodymium (AlNd) can be reduced by adding a molybdenum (Mo) layer on top of the gate electrode, and the structure in which the buzzing shape is suppressed is the first embodiment of the present invention.

As described above, in the thin film transistor of the liquid crystal display device with integrated driving circuit according to the present invention, the gate electrode structure of the thin film transistor is a triple structure of molybdenum (Mo) layer, aluminum-neodymium (AlNd) layer, and molybdenum (Mo) layer. Alternatively, a double structure of aluminum-neodymium (AlNd) layer / molybdenum (Mo) layer is formed so that cracks on the gate insulating film or gate electrode due to thermal shock during laser activation of the semiconductor layer and the resulting breakdown at low voltage The thin film transistor of the driving circuit-integrated liquid crystal display device of which the quality can be prevented can be provided.

Claims (11)

delete delete delete delete Forming a buffer layer on the insulating substrate; Forming an amorphous silicon layer over the buffer layer; Crystallizing the amorphous silicon layer with a polysilicon layer; Patterning the polysilicon layer to form a semiconductor layer of polysilicon; Forming a gate insulating film on the semiconductor layer; Forming a double structure gate electrode of aluminum-neodymium (AlNd) / molybdenum (Mo) or a triple structure gate electrode of molybdenum (Mo) / aluminum-neodymium (AlNd) / molybdenum (Mo) on the gate insulating film; Doping is performed on the entire surface of the substrate on which the gate structure of the double structure or the triple structure is formed, and the doping is performed by the ohmic contact layer in which the doping is performed on the semiconductor layer of the polysilicon and the gate electrode of the double structure or the triple structure. Forming an unactivated active channel layer; Laser activating a semiconductor layer of the polysilicon on which the ohmic contact layer and the active channel layer are formed; Forming an interlayer insulating film having a semiconductor layer contact hole exposing the ohmic contact layer over the double or triple structure gate electrode; Forming a source and a drain electrode on the interlayer insulating layer, the source and drain electrodes contacting the ohmic contact layer of the semiconductor layer through the semiconductor layer contact hole; Forming a protective layer on an entire surface of the substrate on which the source and drain electrodes are formed; Method of manufacturing a thin film transistor of the liquid crystal display device integrated drive circuit comprising a. The method of claim 5, wherein The double gate electrode deposits aluminum-neodymium (AlNd) on the gate insulating layer, and subsequently, molybdenum (Mo) is deposited on the aluminum-neodymium (AlNd). A method of manufacturing a thin film transistor of a liquid crystal display device with a drive circuit, characterized in that it has a double structure of neodymium (AlNd) / molybdenum (Mo). The method of claim 5, wherein The gate electrode of the triple structure deposits molybdenum (Mo) on the gate insulating film, subsequently deposits aluminum-neodymium (AlNd) on the molybdenum (Mo), and successively molybdenum (Mo) on the aluminum-neodymium (AlNd) ), And the mask is etched and then etched in a batch to have a triple structure of molybdenum (Mo) / aluminum-neodymium (AlNd) / molybdenum (Mo). Way. The method of claim 5, wherein The gate electrode having a double structure of aluminum-neodymium (AlNd) / molybdenum (Mo) is characterized in that the aluminum-neodymium (AlNd) is deposited from 2000 kV to 3500 kPa, and the molybdenum (Mo) from 300 kV to 1500 kV A thin film transistor manufacturing method of an integrated liquid crystal display device. delete The method of claim 7, wherein The gate electrode having a triple structure of molybdenum (Mo) / aluminum-neodymium (AlNd) / molybdenum (Mo) is 300 kV to 1500 kPa of the first and second molybdenum (Mo), and 2000 kPa to aluminum-neodymium (AlNd). A thin film transistor manufacturing method of a drive circuit-integrated liquid crystal display device, characterized in that the deposition to 3500Å. The method of claim 5, wherein Laser activation of the semiconductor layer is a thin film transistor manufacturing method of a drive circuit-integrated liquid crystal display device characterized in that the progress of the XeCl excimer laser of 308nm wavelength.

Images