KR100878696B1 - Image sensor and method for manufacturing thereof - Google Patents

Abstract

An image sensor capable of providing vertical type integration of transistor circuit and photo diode, and manufacturing method thereof are provided to prevent crosstalk and noise generation by forming light absorption part between color filters. A CMOS(Complementary Metal Oxide Silicone) circuit(20) is formed in a semiconductor substrate(10). An interlayer insulation film including a metal wiring is formed on the semiconductor substrate. A bottom electrode(40) is formed on the metal wiring. A photo diode(70) is formed on the semiconductor substrate including the bottom electrode. A top electrode is formed on the photo diode. A device isolation part(85) corresponding to gap domain of the bottom electrode is formed on the top electrode. A light absorption part(95) is formed on a side surface of the device isolation part by etching a light absorption layer. A color filter is formed on the top electrode between the device isolation parts.

Description

Image sensor and method for manufacturing thereof

In an embodiment, an image sensor and a method of manufacturing the same are disclosed.

The image sensor is a semiconductor device that converts an optical image into an electrical signal, and includes a charge coupled device (CCD) image sensor and a complementary metal oxide silicon (CMOS) image sensor (CIS). do.

The CMOS image sensor implements an image by sequentially detecting an electrical signal of each unit pixel by a switching method by forming a photodiode and a MOS transistor in the unit pixel.

The CMOS image sensor is a structure in which a photo diode area for receiving a light signal and converting the light signal into an electric signal and a transistor for processing the electric signal are horizontally disposed on a semiconductor substrate.

According to the horizontal CMOS image sensor, a photodiode and a transistor are formed adjacent to each other horizontally on a substrate. Accordingly, additional areas for photodiode formation are required.

Embodiments provide an image sensor capable of providing vertical integration of a CMOS circuit and a photodiode and a method of manufacturing the same.

In addition, the embodiment provides an image sensor and a method of manufacturing the same that can be improved together with the resolution (Resolution) and sensor sensitivity (sensitivity).

In addition, the embodiment provides an image sensor and a manufacturing method thereof that can prevent crosstalk and noise while adopting a vertical photodiode.

An image sensor according to an embodiment includes a semiconductor substrate including a CMOS circuit; An interlayer insulating film including metal wires disposed on the semiconductor substrate; A lower electrode disposed on the metal wiring; A photodiode disposed on the semiconductor substrate including the lower electrode; An upper electrode disposed on the photodiode; A color filter disposed on the upper electrode; An isolation layer disposed between the color filters; And a light absorbing part disposed at a side of the device isolation part.

In addition, the manufacturing method of the image sensor according to the embodiment, forming a CMOS circuit on the semiconductor substrate; Forming an interlayer insulating film including metal wiring on the semiconductor substrate; Forming a lower electrode on the metal wiring; Forming a photodiode on the semiconductor substrate including the lower electrode; Forming an upper electrode on the photodiode; Forming an element isolation part on the upper electrode to correspond to a region between the lower electrodes; Forming a light absorption part on the side of the device isolation part; And forming a color filter on the upper electrode between the device isolation units.

According to the image sensor and the manufacturing method thereof according to the embodiment, it is possible to provide a vertical integration of the transistor circuit and the photodiode.

In addition, a light absorbing part may be formed between the color filters to block the light incident to the color filter from being incident to areas other than the pixel. Accordingly, since the light passing through the color filter is incident on the photodiode, crosstalk and noise of the image sensor may be prevented.

In addition, the fill factor can be approximated to 100% by vertical integration of the CMOS circuit and the photodiode.

In addition, the vertical integration can provide higher sensitivity at the same pixel size than the prior art.

In addition, each unit pixel can implement a more complex circuit without reducing the sensitivity.

In addition, in implementing the unit pixel of the photodiode, the light sensing ratio may be improved by increasing the surface area of the photodiode in the unit pixel.

An image sensor and a method of manufacturing the same according to an embodiment will be described in detail with reference to the accompanying drawings.

In the description of the embodiments, where described as being formed "on / over" of each layer, the on / over may be directly or through another layer ( indirectly) includes everything formed.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not necessarily reflect the actual size.

6 is a cross-sectional view of an image sensor according to an embodiment.

Referring to FIG. 6, the semiconductor substrate 10 includes a CMOS circuit 20.

The CMOS circuit 20 may be formed for each pixel, and may be formed of a transfer transistor, a reset transistor, a drive transistor, a select transistor, and the like, which are connected to the photodiode 70 on the upper side and convert the received photocharge into an electrical signal. .

The interlayer insulating layer 30 including the metal wiring 31 is disposed on the semiconductor substrate 10. The interlayer insulating layer 30 may be disposed in a plurality of layers, and the metal wiring 31 may also be disposed in a plurality.

The lower electrode 40 is disposed on the metal wiring 31. For example, the lower electrode 40 may be formed of metal such as Cr, Ti, TiW, and Ta.

The lower electrode 40 is disposed on the metal wiring 31 and the interlayer insulating layer 30 so that the metal wiring 31 is not exposed. In addition, the lower electrode 40 is disposed above the metal wiring 31 arranged for each unit pixel and spaced apart for each unit pixel. The lower electrode 40 has a gap region W1 spaced apart from a neighboring lower electrode.

The photodiode 70 is disposed on the interlayer insulating layer 30 including the lower electrode 40.

The photodiode 70 includes an intrinsic layer 50 and a conductive conductive layer 60. For example, the intrinsic layer 50 may be intrinsic amorphous silicon, and the second conductivity type conductive layer 60 may be p-type amorphous silicon.

An upper electrode 81 is disposed on the photodiode 70.

The upper electrode 81 may be formed as a transparent electrode having good light transmittance and high conductivity. For example, the upper electrode 81 may be formed of any one of indium tin oxide (ITO), cardium tin oxide (CTO), and ZnO ₂ .

The device isolation unit 85 is disposed on the upper electrode 81. For example, the device isolation unit 85 may be formed of the same material as the upper electrode 81.

In addition, the device isolation unit 85 may protrude from the surface of the upper electrode 81 to have a height higher than that of the upper electrode 81. The device isolation unit 85 may be formed on the upper electrode 81 to have a width W2 corresponding to the gap region W1 of the lower electrode 40.

Light absorbing portions 95 may be disposed on both side surfaces of the device isolation portion 85. For example, the light absorbing unit 95 may be formed of an organic material including a photoresist or an inorganic material including an oxide film and a nitride film. In an embodiment, the device isolation unit 85 may be formed of a nitride film. Since the nitride film has a light absorption property, light may be absorbed when light enters the nitride film.

The color filter 100 is disposed between the device isolation units 85.

The color filter 100 may be patterned for each pixel by the device isolation unit 85 and the light absorption unit 95. The color filter 100 uses dyed photoresist, and one color filter 100 is formed for each unit pixel to separate colors from incident light. Each of the color filters 100 represents a different color and may be formed of three colors of red (R), green (G), and blue (B).

The color filter 100 may be arranged for each unit pixel by the device isolation unit 85.

In addition, since the light absorbing unit 95 is disposed on both side surfaces of the device isolation unit 85, light having an inclination with respect to the color filter 100 is absorbed by the light absorbing unit 95 and neighboring color filters. Since the incident light does not enter the photodiode 70 of 100, crosstalk and noise may be prevented from occurring.

Hereinafter, a method of manufacturing an image sensor according to an embodiment will be described with reference to FIGS. 1 to 6.

Referring to FIG. 1, an interlayer insulating film 30 including a metal wiring 31 is formed on a semiconductor substrate 10 on which a CMOS circuit 20 is formed.

On the semiconductor substrate 10, a CMOS circuit 20 including a transfer transistor, a reset transistor, a drive transistor, a select transistor, and the like, which is connected to a photodiode 70 to be described later and converts the received photocharges into an electrical signal, is formed. Can be.

An interlayer insulating layer 30 and a metal wiring 31 are formed on the semiconductor substrate 10 on which the CMOS circuit 20 is formed to be connected to a power line or a signal line.

The interlayer insulating layer 30 may be formed of a plurality of layers. For example, the interlayer insulating film 30 may be formed of a nitride film or an oxide film.

The metal wiring 31 may be formed in plural through the interlayer insulating layer 20. For example, the metal wire 31 may be formed of various conductive materials including metal, alloy, or salicide, that is, aluminum, copper, cobalt, or tungsten.

The metal wiring 31 transfers electrons generated by the photodiode 70 to the CMOS circuit 20 below.

The lower electrode 40 is formed on the interlayer insulating layer 30 including the metal wiring 31. For example, the lower electrode 40 may be formed of metals such as Cr, Ti, TiW, and Ta. Although not shown, the metal wiring 31 may be connected to a region doped with impurities formed under the semiconductor substrate 10.

The lower electrodes 40 are formed on the metal wires 31 arranged for each unit pixel.

The lower electrode 40 is patterned for each unit pixel and spaced apart from each other to have a gap region W1. In addition, the lower electrode 40 may be formed to have a wide area as much as possible to collect a large amount of electrons into the metal wiring 31.

The photodiode 70 is formed on the interlayer insulating layer 30 including the lower electrode 40 so as to be connected to the metal wiring 31.

In the embodiment, the photodiode 70 uses an IP diode. The IP diode is formed of a structure in which a metal, an intrinsic amorphous silicon layer, and a p-type amorphous silicon layer are bonded to each other.

The IP diode is a photodiode in which an intrinsic amorphous silicon layer, which is a pure semiconductor, is bonded between a p-type silicon layer and a metal. The intrinsic amorphous silicon layer formed between the p-type metal and the metal becomes a depletion region to generate charge. And storage.

In an embodiment, an IP diode is used as a photodiode, and the diode may have a structure such as P-I-N, N-I-P, or I-P.

In the exemplary embodiment, an I-P structure photodiode is used, and an intrinsic amorphous silicon layer is referred to as an intrinsic layer 50 and the p-type amorphous silicon layer is referred to as a conductive conductive layer 60.

A method of forming a photodiode using an IP diode is described below.

An intrinsic layer 50 is formed on the semiconductor substrate 10. The intrinsic layer 50 may serve as the I layer of the I-P diode employed in the embodiment.

An n-type amorphous silicon layer may be formed before the intrinsic layer 50 is formed.

The intrinsic layer 50 may be formed using intrinsic amorphous silicon. For example, the intrinsic layer 50 may be formed of amorphous silicon by PECVD using silane gas (SiH ₄ ).

Here, the intrinsic layer 50 may be formed to a thickness of about 10 to 1,000 times the thickness of the conductive conductive layer 60. This is because the thicker the intrinsic layer 50 is, the more the depletion region of the pin diode increases, which is advantageous for storing and generating a large amount of photocharges.

A conductive conductive layer 60 is formed on the intrinsic layer 50. The conductive conductive layer 60 may be formed in a continuous process with the formation of the intrinsic layer 50.

The conductive conductive layer 60 may serve as the P layer of the IP diode employed in the embodiment. That is, the conductive conductive layer 60 may be a P type conductive conductive layer, but is not limited thereto. For example, the second conductive conductive layer 60 may be formed of amorphous silicon P-doped by PECVD by mixing a gas such as BH ₃ or B ₂ H ₆ with silane gas (SiH ₄ ).

Therefore, the CMOS circuit 20 formed on the semiconductor substrate 10 and the photodiode 70 may be collected in an integrated manner to bring the fill factor of the photodiode 70 closer to 100%.

An upper electrode layer 80 is formed on the semiconductor substrate 10 on which the photodiode 70 is formed.

The upper electrode layer 80 may be formed of a transparent electrode having good light transmittance and high conductivity. For example, the upper electrode layer 80 may be formed of any one of indium tin oxide (ITO), cardium tin oxide (CTO), and ZnO ₂ .

Referring to FIG. 2, a photoresist pattern 200 is formed on the upper electrode layer 80.

The photoresist pattern 200 is formed on the upper electrode layer 80 and patterned by a lithography process. Then, the photoresist pattern 200 exposes the surface of the upper electrode layer 80 corresponding to the lower electrode 40, and the surface of the upper electrode layer 80 corresponding to the lower electrode 40. It is formed to cover. For example, the width of the photoresist pattern 200 may have the same width as the gap region W1 between the lower electrodes 40.

Referring to FIG. 3, the upper electrode layer 80 is etched using the photoresist pattern 200 as a mask. In this case, the etching of the upper electrode layer 80 may be etched so as not to remove all of the upper electrode layer 80 using a dry etching process. For example, the upper electrode layer 80 may be formed to a thickness of 100 ~ 10000Å.

In addition, the upper electrode layer 80 covered by the photoresist pattern 200 remains.

Referring to FIG. 3, when the photoresist pattern 200 is removed, the upper electrode 81 and the device isolation unit 85 may be formed.

When the upper electrode layer 80 is etched, the upper electrode 81 is formed on the photodiode 70, and the device isolation unit 85 formed at a height higher than that of the upper electrode 81 on the upper electrode 81. Is formed.

The device separator 85 may separate the color filter 100 formed thereafter for each pixel unit. In addition, the device isolation unit 85 separates the color filter 100 to prevent cross talk of light incident to the photodiode 70 through the color filter 100.

In an embodiment, the device isolation unit 85 is formed by etching the upper electrode 81, but the device isolation unit 85 may be formed separately on the upper electrode 81.

In addition, the device isolation unit 85 may have a width W2 corresponding to the gap region W1.

Referring to FIG. 4, the light absorption layer 90 is formed on the upper electrode 81 including the device isolation unit 85.

The light absorption layer 90 may be formed of an inorganic material including a nitride film or an oxide film. Alternatively, the light absorption layer 90 may be formed of an organic material including a photoresist. For example, the light absorption layer 90 may be formed of a nitride film having a large light absorption value.

In addition, an etching process is performed on the light absorption layer 90.

Referring to FIG. 5, light absorbing portions 95 are formed on both side surfaces of the device isolation portion 85.

The light absorbing part 95 may be formed by dry etching the light absorbing layer 90 formed on the upper electrode 81. For example, the light absorbing unit 95 may be formed only on the side surface of the device isolation unit 85 by blanket etching the light absorbing layer 90.

Referring to FIG. 6, the color filter 100 is formed on the upper electrode 81 including the device isolation unit 85 and the light absorbing unit 95.

The color filter 100 may be patterned for each pixel by the device isolation unit 85 and the light absorption unit 95. The color filter 100 uses dyed photoresist, and one color filter 100 is formed for each unit pixel to separate colors from incident light. Each of the color filters 100 represents a different color and may be formed of three colors of red, green, and blue.

The color filter 100 may be separated by unit pixels by the device isolation unit 85 and the light absorption unit 95 to be formed in an area corresponding to the lower electrode 40.

Therefore, after the light passing through the color filter 100 is incident on the photodiode 70 to generate electrons, the electrons are collected by the lower electrode 40 and the lower CMOS circuit by the metal wiring 31. 20 may be passed.

For example, light incident vertically with respect to the red color filter (R) 100 is incident to the corresponding photodiode region 70 below and transferred to the CMOS circuit 20 through the corresponding metal wiring 31. Can be.

In this case, the light incident with the inclination with respect to the red color filter (R) 100 is incident to the photodiode 70 corresponding to the region of the adjacent photodiode 70, that is, the blue color filter (B) 100. Crosstalk may be generated. In an embodiment, since the device isolation unit 85 and the light absorbing unit 95 are formed between the color filters 100, crosstalk may be prevented.

That is, the light incident with the inclination with respect to the red color filter (R) 100 is absorbed by the light absorbing unit 95 disposed between the color filters 100 and is adjacent to the blue color filter (B) ( Since it is not incident to the photodiode 70 corresponding to 100, crosstalk and noise may be prevented.

In addition, light incident perpendicularly to the device isolation unit 85 is incident on the photodiode 70 without passing through the color filter 100 to become electrons, and the electrons are formed in the gap region of the lower electrode 40. W1) will not affect the operation of the image sensor.

The above-described embodiments are not limited to the above-described embodiments and drawings, and it is common in the technical field to which the present embodiments belong that various changes, modifications, and changes can be made without departing from the technical spirit of the present embodiments. It will be apparent to those who have

1 to 6 are cross-sectional views illustrating a manufacturing process of an image sensor according to an embodiment.

Claims (9)

delete delete delete Forming a CMOS circuit on the semiconductor substrate; Forming an interlayer insulating film including metal wiring on the semiconductor substrate; Forming a lower electrode on the metal wiring; Forming a photodiode on the semiconductor substrate including the lower electrode; Forming an upper electrode on the photodiode; Forming an element isolation part on the upper electrode to correspond to a region between the lower electrodes; Forming a light absorption part on the side of the device isolation part; And Forming a color filter on the upper electrode between the device isolation parts; Forming the light absorbing portion, Forming a light absorption layer on the upper electrode and the device isolation unit; And etching the light absorbing layer to form a light absorbing part on a side of the device isolation part. delete The method of claim 4, wherein The light absorbing unit is a manufacturing method of an image sensor formed of an organic or inorganic material. The method of claim 4, wherein The light absorbing unit is a manufacturing method of the image sensor is formed by the blanket etching. The method of claim 4, wherein The device isolation part manufacturing method of an image sensor formed of the same material as the upper electrode. The method of claim 4, wherein Forming the upper electrode and device isolation unit, Forming an upper electrode layer on the photodiode; Forming a photoresist pattern on the upper electrode layer to expose the upper electrode layer in a region corresponding to the lower electrode; Etching the upper electrode material by using the photoresist pattern as a mask to lower the height of the upper electrode layer; And Removing the photoresist pattern to form the upper electrode and the device isolation unit.

Images