KR100874738B1 - 구성가능한 프로세서를 설계하기 위한 프로세서 자동 생성시스템 및 방법 - Google Patents

구성가능한 프로세서를 설계하기 위한 프로세서 자동 생성시스템 및 방법 Download PDF

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KR100874738B1
KR100874738B1 KR1020077017999A KR20077017999A KR100874738B1 KR 100874738 B1 KR100874738 B1 KR 100874738B1 KR 1020077017999 A KR1020077017999 A KR 1020077017999A KR 20077017999 A KR20077017999 A KR 20077017999A KR 100874738 B1 KR100874738 B1 KR 100874738B1
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processor
instruction
generating
instructions
configuration
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KR1020077017999A
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Korean (ko)
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KR20070088818A (ko
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얼 에이. 킬리안
리카도 이. 곤잘레스
애시쉬 비. 딕시티
모니카 램
월터 디. 리히텐스타인
크리스토퍼 로웬
존 루텐버그
로버트 피. 윌슨
알버트 렌-뤼 왕
드롤 엘리저 메이덴
웽 키앙 치앙
리차드 루델
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텐실리카 인코포레이티드
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Priority claimed from US09/246,047 external-priority patent/US6477683B1/en
Priority claimed from US09/323,161 external-priority patent/US6701515B1/en
Priority claimed from US09/322,735 external-priority patent/US6477697B1/en
Application filed by 텐실리카 인코포레이티드 filed Critical 텐실리카 인코포레이티드
Publication of KR20070088818A publication Critical patent/KR20070088818A/ko
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/28—Error detection; Error correction; Monitoring by checking the correct order of processing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3006—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system is distributed, e.g. networked systems, clusters, multiprocessor systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/20—Software design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/30—Creation or generation of source code
    • G06F8/37—Compiler construction; Parser generation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Devices For Executing Special Programs (AREA)
  • Debugging And Monitoring (AREA)
  • Stored Programmes (AREA)
  • Executing Machine-Instructions (AREA)
KR1020077017999A 1999-02-05 2000-02-04 구성가능한 프로세서를 설계하기 위한 프로세서 자동 생성시스템 및 방법 KR100874738B1 (ko)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US09/246,047 1999-02-05
US09/246,047 US6477683B1 (en) 1999-02-05 1999-02-05 Automated processor generation system for designing a configurable processor and method for the same
US09/323,161 US6701515B1 (en) 1999-05-27 1999-05-27 System and method for dynamically designing and evaluating configurable processor instructions
US09/323,161 1999-05-27
US09/322,735 1999-05-28
US09/322,735 US6477697B1 (en) 1999-02-05 1999-05-28 Adding complex instruction extensions defined in a standardized language to a microprocessor design to produce a configurable definition of a target instruction set, and hdl description of circuitry necessary to implement the instruction set, and development and verification tools for the instruction set
PCT/US2000/003091 WO2000046704A2 (en) 1999-02-05 2000-02-04 Automated processor generation system and method for designing a configurable processor

Related Parent Applications (1)

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KR1020017009857A Division KR100775547B1 (ko) 1999-02-05 2000-02-04 구성가능한 프로세서를 설계하기 위한 프로세서 자동 생성시스템 및 방법

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KR20070088818A KR20070088818A (ko) 2007-08-29
KR100874738B1 true KR100874738B1 (ko) 2008-12-22

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KR1020017009857A KR100775547B1 (ko) 1999-02-05 2000-02-04 구성가능한 프로세서를 설계하기 위한 프로세서 자동 생성시스템 및 방법
KR1020077017999A KR100874738B1 (ko) 1999-02-05 2000-02-04 구성가능한 프로세서를 설계하기 위한 프로세서 자동 생성시스템 및 방법

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Country Status (6)

Country Link
EP (1) EP1159693A2 (ja)
JP (2) JP2003518280A (ja)
KR (2) KR100775547B1 (ja)
AU (1) AU3484100A (ja)
TW (1) TW539965B (ja)
WO (1) WO2000046704A2 (ja)

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JP2003518280A (ja) 2003-06-03
JP2007250010A (ja) 2007-09-27
KR20020021081A (ko) 2002-03-18
CN1382280A (zh) 2002-11-27
WO2000046704A3 (en) 2000-12-14
KR100775547B1 (ko) 2007-11-09
EP1159693A2 (en) 2001-12-05
AU3484100A (en) 2000-08-25
TW539965B (en) 2003-07-01
WO2000046704A2 (en) 2000-08-10
KR20070088818A (ko) 2007-08-29

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