KR100864072B1 - 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘박막의 제조 방법 - Google Patents
유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘박막의 제조 방법 Download PDFInfo
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- KR100864072B1 KR100864072B1 KR1020080002486A KR20080002486A KR100864072B1 KR 100864072 B1 KR100864072 B1 KR 100864072B1 KR 1020080002486 A KR1020080002486 A KR 1020080002486A KR 20080002486 A KR20080002486 A KR 20080002486A KR 100864072 B1 KR100864072 B1 KR 100864072B1
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- silicon wafer
- thin film
- pores
- photoresist
- silicon
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 33
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 33
- 239000010703 silicon Substances 0.000 title claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 title abstract description 20
- 239000012528 membrane Substances 0.000 title 1
- 239000010409 thin film Substances 0.000 claims abstract description 51
- 239000011148 porous material Substances 0.000 claims abstract description 45
- 229910021426 porous silicon Inorganic materials 0.000 claims abstract description 18
- 238000000034 method Methods 0.000 claims description 26
- 229920002120 photoresistant polymer Polymers 0.000 claims description 19
- 239000012530 fluid Substances 0.000 claims description 10
- 238000001020 plasma etching Methods 0.000 claims description 7
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 229920001486 SU-8 photoresist Polymers 0.000 claims description 2
- 239000004205 dimethyl polysiloxane Substances 0.000 claims description 2
- 235000013870 dimethyl polysiloxane Nutrition 0.000 claims description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 2
- CXQXSVUQTKDNFP-UHFFFAOYSA-N octamethyltrisiloxane Chemical compound C[Si](C)(C)O[Si](C)(C)O[Si](C)(C)C CXQXSVUQTKDNFP-UHFFFAOYSA-N 0.000 claims description 2
- 238000004987 plasma desorption mass spectroscopy Methods 0.000 claims description 2
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 claims description 2
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 2
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 2
- 150000002500 ions Chemical class 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 4
- 150000001875 compounds Chemical class 0.000 description 3
- 230000002209 hydrophobic effect Effects 0.000 description 3
- 239000010408 film Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Plasma & Fusion (AREA)
- Silicon Compounds (AREA)
Abstract
Description
Claims (8)
- 실리콘 웨이퍼 표면에 포토레지스트를 바르고, 위에 도면이 그려진 포토마스크를 통해 빛을 투영시켜 도면과 같은 링 형상 패턴을 갖는 패턴의 포토레지스트를 상기 실리콘 웨이퍼 표면에 형성하는 단계:극반응성 이온 에칭법(DIRE 공정)을 수행하여 링 형상의 구멍을 상기 실리콘 웨이퍼의 두께보다 작은 깊이로 형성한 후 상단의 포토레지스트를 제거하는 단계상기 실리콘 웨이퍼 바닥면에 포토레지스트를 바르고, 구멍이 그려진 포토마스크를 통해 빛을 투영시키면 구멍형상의 패턴을 가진 포토레지스트를 상기 실리콘 웨이퍼 바닥면에 형성하는 단계;극반응성 이온 에칭법(DIRE 공정)을 수행하여 상기 실리콘 웨이퍼를 관통하는 다수의 기공들을 형성하는 단계;상기 실리콘 웨이퍼 바닥면의 포토레지스트를 제거하는 단계;실리콘 웨이퍼 상면에 열변형 부재를 코팅하는 단계;상기 코팅된 열변형 부재를 노광과정을 통하여 상기 기공들 주위에 링 형상의 열변형 구조체만을 남기고 제거하는 단계;를 포함하는 것을 특징으로 하는 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘 박막제조 방법.
- 제 1 항에 있어서, 극반응성 이온 에칭법(DIRE 공정)은 전자기파로 가속시킨 플라즈마 상태의 이온들을 이용하는 것을 특징으로 하는 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘 박막제조 방법.
- 제 1 항에 있어서, 상기 링 형상의 구멍의 깊이는 50 마이크론인 것을 특징으로 하는 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘 박막제조 방법.
- 제 1 항에 있어서, 실리콘 웨이퍼 바닥면에 바르는 포토레지스트의 두께는 8.5 마이크론인 것을 특징으로 하는 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘 박막제조 방법.
- 제 1 항에 있어서, 상기 실리콘 웨이퍼의 두께는 500 마이크론인 것을 특징으로 하는 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘 박막제조 방법.
- 삭제
- 제 1 항에 있어서, 상기 열변형 부재는 SU-8, PDMS 또는 PMMA 중 하나를 포 함하는 것을 특징으로 하는 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘 박막제조 방법.
- 제 1 항에 있어서, 상기 실리콘 웨이퍼의 재질은 단결정실리콘, 다결정실리콘 또는 에피실리콘 중의 하나임을 특징으로 하는 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘 박막제조 방법.
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KR1020080002486A KR100864072B1 (ko) | 2008-01-09 | 2008-01-09 | 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘박막의 제조 방법 |
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KR1020080002486A KR100864072B1 (ko) | 2008-01-09 | 2008-01-09 | 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘박막의 제조 방법 |
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KR1020060110929A Division KR100835703B1 (ko) | 2006-11-10 | 2006-11-10 | 유체의 이동을 온도에 의해 조절할 수 있는 다공질 실리콘 박막 |
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KR20050004886A (ko) * | 2002-05-30 | 2005-01-12 | 가부시끼가이샤 한도따이 센단 테크놀로지스 | 무기 다공질막의 형성 방법 |
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KR20050004886A (ko) * | 2002-05-30 | 2005-01-12 | 가부시끼가이샤 한도따이 센단 테크놀로지스 | 무기 다공질막의 형성 방법 |
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