KR100861369B1 - Method for fabricating semiconductor device having fuse - Google Patents

Abstract

A method for manufacturing a semiconductor device having a fuse is provided to prevent crack of an interlayer dielectric and fuse fail by using an anti-reflective coating with oxidation resistivity and good step coverage. A barrier layer with oxidation resistivity is formed on an interlayer dielectric of a substrate(100). A first metal film is formed on the barrier layer. An anti-reflective coating having oxidation resistivity is formed on the first metal film, wherein the anti-reflective coating is made of IrSiN. A first metal line(116) and a fuse(118) are formed by patterning the barrier layer, the anti-reflective coating and the first metal film. An insulating layer(120) is formed on the resultant structure. A second metal line is formed on the insulating layer to connect the first metal line. A passivation layer is then formed on the resultant structure.

Description

Method for fabricating semiconductor device having fuse {Method for fabricating semiconductor device having fuse}

1 to 4 are cross-sectional views illustrating a method of manufacturing a semiconductor device having a fuse according to an embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

100 semiconductor substrate 102 first interlayer insulating film

108, 122: contact plug 116: first metal wiring

118: fuse 120: intermetallic insulating film

128: second metal wiring 132: fuse box

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device having a fuse capable of preventing oxidation of a fuse during a repair operation to replace a defective cell. It is about.

In general, a memory device is provided with a repair memory block in order to replace a defect. When one bad column occurs in the memory cell array, the repair is performed by replacing the normal column of the repair block with the bad column. The fuse provided in the repair circuit has a function of physically blocking the inflow of power from the outside in order to suppress the operation of the defective cell when a defect occurs in the main cell. The process of physically cutting the fuse to repair the defective cell is performed by irradiating laser energy to the gate metal film of the fuse to heat and expand the gate metal film.

Conventionally, when the plate electrode or the metal wiring layer of the capacitor is formed in the cell region, a fuse is formed together in the peripheral circuit region by using the material for the plate electrode or the metal wiring material. When the fuse is formed using a plate electrode material, when the capacitor is a silicon insulator silicon (SIS) structure, a polysilicon film is used as the material for the plate electrode, so it is easy to form a fuse, and a high temperature after laser cutting. In addition, the oxidation of the fuse was not a problem even in the high accelerated stress test (HAST). However, as semiconductor devices are highly integrated and the size of the devices is reduced, a metal insulator metal (MIM) structure using a high dielectric constant dielectric material is used to secure the capacitance of the capacitor. Titanium nitride (TiN) or tantalum nitride (TaN), which is used as a plate electrode material, has been easily oxidized in HAST, causing cracks.

In addition, even when a fuse is formed of a wiring metal, the same problem occurs because titanium nitride (TiN) or tantalum nitride (TaN) is used as an anti-reflection film to prevent reflection in a process for patterning a metal film. .

Recently, in the process of patterning the fuse, a method of etching the metal film and capping the nitride film having excellent oxidation resistance so as not to expose the anti-reflection film may be used. The capping nitride film is deposited by a plasma enhanced chemical vapor deposition (PECVD) method capable of depositing a thick nitride film at a low temperature. However, due to the poor step coverage of the PECVD process, it is difficult to deposit a nitride film to the bottom surface, and a process of cutting a fuse covered with a thick nitride film with a laser is difficult.

The technical problem to be solved by the present invention is to use a material having excellent oxidation resistance as an antireflection film and a good step coverage property during deposition when forming a fuse using a wiring metal film, thereby preventing repair defects due to cracks due to oxidation after package. It is to provide a method for manufacturing a semiconductor device having a fuse that can be prevented.

In order to achieve the above technical problem, a method of manufacturing a semiconductor device having a fuse according to the present invention, the anti-reflection film made of a first metal film and iridium silicon nitride (IrSiN) on the interlayer insulating film formed on a semiconductor substrate Forming sequentially, patterning the antireflection film and the first metal film to form a first metal wiring and a fuse, forming a insulating film on a resultant product on which the first metal wiring and the fuse are formed, and forming an insulating film on the insulating film Forming a passivation layer on a resultant including the second metal interconnection, and forming a second metal interconnection to connect with the first metal interconnection.

In the present invention, the anti-reflection film is formed by any one of chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD) or plasma enhanced atomic layer deposition (PEALD). can do.

It is preferable that the composition ratio of iridium (Ir) in the said iridium silicon nitride (IrSiN) thin film is 10-50 weight%.

Before forming the first metal film, the method may further include forming a barrier layer made of iridium silicon nitride (IrSiN) on the interlayer insulating film. At this time, the composition ratio of iridium (Ir) in the iridium silicon nitride (IrSiN) thin film is preferably maintained to 10 to 50% by weight.

The first metal layer may be formed of aluminum (Al) or tungsten (W).

The passivation layer may be formed of a silicon oxide film, a silicon nitride film, or a multilayer film in which a silicon oxide film and a silicon nitride film are stacked.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below.

1 to 4 are cross-sectional views illustrating a method of manufacturing a semiconductor device having a fuse according to an embodiment of the present invention, and show only a region in which a fuse is formed in the semiconductor substrate region.

Referring to FIG. 1, for example, an oxide layer is deposited on a semiconductor substrate 100 to form a first interlayer insulating layer 102. Although not shown, the semiconductor substrate 100 includes lower structures such as semiconductor devices, for example, transistors and bit lines, which are connected to metal wirings. Next, a conductive layer is deposited on the first interlayer insulating film 102 and then patterned to form a plate node 104. The plate node 104 is formed together when forming the plate electrode of the capacitor formed in the cell region. Titanium nitride may be formed using a well-known deposition method such as chemical vapor deposition (CVD) or atomic layer deposition (ALD). TiN), tantalum nitride (TaN) or ruthenium (Ru) may be formed of an electrode metal.

Next, a second interlayer insulating film 106 is formed over the first interlayer insulating film 102 including the plate node 104, and then the second interlayer insulating film is selectively etched to form a conductive layer of a lower structure (not shown). Form a contact hole exposing the. Next, the conductive material is deposited to fill the contact hole, and then, for example, chemical mechanical polishing (CMP) or etch back process is performed to form the first contact plug 108.

Referring to FIG. 2, a fuse structure is formed on the second interlayer insulating film 106 including the first contact plug 108 using a wiring metal. Prior to forming the fuse, the barrier layer 110 is formed by depositing, for example, a predetermined thickness of iridium silicon nitride (IrSiN) on the second interlayer insulating film 106.

Conventionally, barrier layers have been generally formed of titanium nitride (TiN). However, since the barrier layer 110 is also exposed after the fuse is cut in the process of performing a harsh condition test (HAST) under high temperature and high humidity conditions, titanium nitride (TiN) reacts with the atmosphere (O ₂ ) to easily oxidize. woke up. When the barrier layer 110 is oxidized, cracks may occur in the interlayer insulating layer, which may cause a fuse failure.

Therefore, in the present invention, it is preferable that the barrier layer 110 is formed of a material having excellent oxidation resistance, for example, iridium silicon nitride (IrSiN). The iridium silicon nitride (IrSiN) may be formed by physical vapor deposition (PVD), but chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), and atomic layer deposition (ALD) are used to improve step coverage. Alternatively, the deposition may be performed using any one of plasma enhanced atomic layer deposition (PEALD). The composition ratio of iridium (Ir) in the iridium silicon nitride (IrSiN) thin film is preferably maintained at 10 to 50% by weight in order to improve oxidation resistance.

Next, a first metal film 112 is formed on the barrier layer 110 by depositing a metal film having a low specific resistance such as aluminum (Al) or tungsten (W). The first metal layer 112 is used as a wiring layer for supplying various biases to elements formed on the semiconductor substrate 100 in the cell region, and is used as a fuse for replacing defective cells generated in the cell region in the fuse region. .

An anti-reflection coating (ARC) 114 is formed on the first metal layer 112. Like the barrier layer 110, the anti-reflection film 114 is formed of a material having excellent oxidation resistance, for example, iridium silicon nitride (IrSiN). The iridium silicon nitride (IrSiN) is any one of chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD) or plasma enhanced atomic layer deposition (PEALD) to improve step coverage. It can be deposited in one way. The composition ratio of iridium (Ir) in the iridium silicon nitride (IrSiN) thin film is preferably maintained at 10 to 50% by weight in order to improve oxidation resistance.

Referring to FIG. 3, the anti-reflection film 114, the first metal film 112, and the barrier layer 110 are sequentially patterned by performing a predetermined photolithography process to form the metal wiring 116 and the fuse 118. do. Next, for example, an oxide film is deposited to fill the patterned antireflection film, the first metal film, and the barrier layer to form an intermetallic insulating film (IMD) 120. The intermetallic insulating layer 120 is etched to form a contact hole for selectively exposing the first metal film 112 or the antireflection film 114. After the conductive layer is formed to fill the contact hole, the second contact plug 122 is formed by performing chemical mechanical polishing (CMP) or etch back process.

Referring to FIG. 4, a barrier layer 124 and a second metal layer 126 to be used as a wiring layer are formed on the intermetallic insulating layer 120 including the second contact plug 122, and then a photolithography process is performed. The second metal film 126 and the barrier layer 124 are patterned. Next, a passivation layer 130 that protects the second metal film 126 and the fuse structure is formed. The passivation layer 130 may be formed of a silicon oxide film, a silicon nitride film, or a multilayer film in which a silicon oxide film and a silicon nitride film are stacked.

Next, the passivation layer is selectively exposed on the passivation layer 130 to form a photoresist pattern (not shown) defining a region in which a fuse box is to be formed. Subsequently, using the photoresist pattern as an etching mask, the passivation layer 130 is removed leaving only a predetermined thickness of the upper portion of the fuse structure to form a fuse box 132. The fuse box 132 serves to reliably blow the fuse when the laser is irradiated during the repair operation.

The present invention is not limited to the above embodiments, and various modifications can be made by those skilled in the art within the technical spirit of the present invention.

As described so far, according to the method of manufacturing a semiconductor device having a fuse according to the present invention, the anti-reflection film formed on the fuse metal film is formed using a material having excellent oxidation resistance to oxidize the anti-reflection film exposed during the repair operation. As a result, cracks may occur in the interlayer insulating film, and thus, a fuse failure may be prevented. In addition, the barrier layer formed under the fuse metal layer may have a better effect when formed of a material having excellent oxidation resistance.

Claims (7)

Forming a barrier layer having an oxidation resistance made of iridium silicon nitride (IrSiN) on the interlayer insulating film formed on the semiconductor substrate; Forming a first metal film on the barrier layer; Forming an antireflection film having oxidation resistance formed of iridium silicon nitride (IrSiN) on the first metal film; Patterning the barrier layer, the antireflection film, and the first metal film to form a first metal wire and a fuse; Forming an insulating film on the resultant product on which the first metal wiring and the fuse are formed; Forming a second metal wire on the insulating layer, the second metal wire being connected to the first metal wire; And And forming a passivation layer on the resultant material including the second metal wiring. The method of claim 1, The anti-reflection film is formed by any one of chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD) or plasma enhanced atomic layer deposition (PEALD). A method of manufacturing a semiconductor device having a fuse. The method of claim 1, The composition ratio of iridium (Ir) in the said iridium silicon nitride (IrSiN) thin film is 10 to 50 weight%, The manufacturing method of the semiconductor element provided with the fuse characterized by the above-mentioned. delete delete The method of claim 1, The first metal film is a manufacturing method of a semiconductor device having a fuse, characterized in that formed of aluminum (Al) or tungsten (W). The method of claim 1, The passivation layer is a silicon oxide film, a silicon nitride film, or a semiconductor device manufacturing method comprising a fuse, characterized in that the silicon oxide film and the silicon nitride film is formed of a multilayer film laminated.

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