KR100845149B1 - Liquid Crystal Panel used for a Liquid Crystal Display Device - Google Patents

Abstract

In the present invention, an inactive region forming an active region and a periphery of the active region is defined, and includes first and second substrates disposed to face each other; A seal pattern positioned at a boundary between the active region and the inactive region, bonding the first and second substrates to each other, and having a liquid crystal injection hole at one side thereof; A liquid crystal layer interposed in the seal pattern region; A plurality of gate and data lines formed to cross each other on an active region of the first substrate; A thin film transistor positioned at the intersection of the gate and the data line; Gate and data pads positioned in the inactive region of the first substrate and connected to ends of the gate and data lines; Including the liquid crystal injection hole, and formed inside the seal pattern of the first and second seal pattern portion formed on the opposite side of the gate and the data pad forming portion, respectively, parallel to the seal pattern, the gate wiring And common wiring made of the same material in the same process; By providing a liquid crystal panel for a liquid crystal display device connected to an end of the common wiring and including a common pad for applying an external circuit signal to the common wiring, the cell gap between the periphery of the liquid crystal inlet and the active main region can be maintained uniformly. In order to prevent staining of the injection hole, it is possible to prevent poor image quality and has an advantage of improving adhesion between the seal pattern and the substrate.

Description

Liquid crystal panel used for a liquid crystal display device             

 1 is a plan view of a partial region of a liquid crystal panel for a general liquid crystal display device;

2A to 2C are views of the pixel portion and the liquid crystal inlet portion of FIG. 1, FIG. 2A is an enlarged view of the liquid crystal inlet portion, FIG. 2B is a cross-sectional view of one pixel portion, and FIG. 2C is a cut line IV-. Sectional view cut in the IV direction.

3 is a schematic plan view of a liquid crystal panel for a liquid crystal display device according to Embodiment 1 of the present invention;

4 is an enlarged view of the liquid crystal inlet of FIG. 3.

5 is a plan view of a liquid crystal panel for a liquid crystal display according to a second embodiment of the present invention.

FIG. 6 is an enlarged view of the “XII” region of FIG. 5. FIG.

<Description of Symbols for Main Parts of Drawings>

110: first substrate 112: gate wiring

114: data wiring 116: pixel electrode

118: gate pad 120: data pad                 

130: second substrate 140: seal pattern

142 liquid crystal inlet 144 seal for sealing

150: liquid crystal layer 154: common wiring

156: common connection wiring 158: common pad

Ⅶ: active region VIIa: first inactive region

Ⅷb: second inactive region Ⅷ: inactive region

Ⅸ: Silver dot formation part

The present invention relates to a liquid crystal panel for a liquid crystal display device, and more particularly, to a liquid crystal panel for a liquid crystal display device having a structure that prevents staining of liquid crystal peripheral parts.

The driving principle of the liquid crystal display device is to use the optical anisotropy and polarization property of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Therefore, if the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal due to optical anisotropy to express image information.

At present, an active matrix LCD (AM-LCD) in which a thin film transistor (TFT) and pixel electrodes connected to the thin film transistor are arranged in a matrix manner has excellent resolution and video performance. It is most noticed.

The structure of the liquid crystal panel, which is a basic component of the liquid crystal display, will be described below.

1 is a plan view of a part of a general liquid crystal panel for a liquid crystal display device.

As illustrated, the first and second substrates 10 and 30 in which the active region I and the inactive region II forming the periphery of the active region I are defined are disposed to face each other, and the active region ( A seal pattern 40 for joining the first and second substrates 10 and 30 is formed at the boundary between I) and the inactive region II, and the liquid crystal layer 50 is interposed in the seal pattern 40. have.

The liquid crystal layer 50 is injected through the liquid crystal injection hole 42 formed at one side of the seal pattern 40, and is prevented from leaking to the outside by the sealing seal 44 after the injection.

The inactive region II is included in the first inactive region IIa included in the first substrate 10 and in the second substrate 30 and located inside the first inactive region IIa. It consists of 2nd inactive area | region IIb.

A plurality of gates and data lines 12 and 14 formed to cross each other are formed in the active region I of the first substrate 10, and a thin film transistor is formed at a point where the gates and data lines 12 and 14 cross each other. T is formed and is connected to the thin film transistor T to form the pixel electrode 16. Although not shown in the drawings, the inner surface of the second substrate 30 is located in the red, green, and blue color filters for coloring light of a specific wavelength band, and the light leakage phenomenon is located at the color boundary and non-pixel area of the color filter. Black matrix to prevent and a common electrode to which a common voltage is applied.

In the first inactive region IIa, gates and data pads 18 and 20 for applying an external signal to the gate and data lines 12 and 14 are formed, respectively.

In addition, the common wiring 54 overlapping the seal pattern 40 positioned opposite to the gate and data pads 18 and 20 forming portion and having the recess 52 so as not to overlap the liquid crystal injection hole 42 is provided. The common wiring 54 is connected to the common pad 58 on the first inactive region IIa through the common connection wiring 56.

The common pad 58 is for applying a common signal supplied from an external circuit onto the second substrate 30, and the first and second substrates 10 and 30 are connected through silver dots (not shown). When electrically connected, common wiring 54 is required to improve and stabilize the electrical connection force.

In this case, the concave portion 52 of the common wiring 54 corresponds to a portion where the common wiring 54 material is opened at a position corresponding to the liquid crystal injection hole 42 for the curing process of the sealing seal 44. .

2A to 2C are views of the pixel portion and the liquid crystal inlet portion of FIG. 1, FIG. 2A is an enlarged view of the liquid crystal inlet portion, FIG. 2B is a cross-sectional view of one pixel portion, and FIG. 2C is a cut line IV-. It relates to a cross-sectional view cut in the IV direction, the illustration of the sealing seal for convenience of description is omitted.                         

In FIG. 2A, the seal pattern 40 having the liquid crystal injection hole 42 described above is positioned in one direction, and has a recess 52 that is an open area at a position corresponding to the area of the liquid crystal injection hole 42, and the seal pattern 40. The common wiring 54 is positioned in the same direction overlapping with ().

In the liquid crystal injection hole 42, the liquid crystal injection dam 43 for smoothly injecting the liquid crystal when the liquid crystal is injected in the direction parallel to the seal pattern 40 is disposed to be spaced apart from each other by a predetermined distance.

At this time, the gap between the common wire 54 and the recess 52 based on the seal pattern 40 is provided with a step on the seal pattern 40 by the thickness of the common wire 54.

2B is a cross-sectional view of one pixel portion for explaining the stacked structure of the liquid crystal injection hole cross section.

In FIG. 2B, the gate electrode 60 is formed on the transparent substrate 1, the gate insulating layer 62 is formed on the entire surface of the substrate 1 covering the gate electrode 60, and the upper portion of the gate insulating layer 62 is formed. The semiconductor layer 64 and the source and drain electrodes 66 and 68 are formed in the semiconductor layer 64.

The gate electrode 60, the semiconductor layer 64, the source and drain electrodes 66 and 68 form a thin film transistor (T).

A passivation layer 72 having a drain contact hole 70 exposing a part of the drain electrode 68 is formed on the thin film transistor T. A drain contact hole 70 is formed on the passivation layer 72. The pixel electrode 74 connected to the drain electrode 68 is formed.

The semiconductor layer 64 described above includes an active layer 64a (active layer) made of pure amorphous silicon (a-Si) and an ohmic contact layer 64b made of impurity amorphous silicon (n + a-Si). And a channel ch formed of an exposed active layer 64a region in a section between the source and drain electrodes 66 and 68.

In this case, the protective layer 72 is preferably selected from an organic insulating material in a product requiring an insulating material having excellent step characteristics such as a high opening ratio structure, for example, the organic insulating material is BCB (benzocyclobutene) or photo acrylic It may be selected from any one of (photo acrylic).

However, since the organic insulating material is inferior in adhesive properties with the thermosetting resin mixed with the glass fibers forming the seal pattern (40 of FIG. 2A), the organic insulating material must have an open portion in contact with the seal pattern (40 of FIG. 2A). Therefore, in FIG. 2C to be described later, the liquid crystal injection unit is omitted.

In FIG. 2C, a common wiring 54 pattern is formed in the second region Vb on the transparent substrate 1 in which the second region Vb positioned in both the first region Va and the first region Va is defined. These are located, the gate insulating film 62 is formed in the whole surface of the board | substrate which covers the common wiring 54, The liquid crystal is formed on the periphery of the 1st area | region Va above the gate insulating film 62, and the 2nd area | region Vb. A seal pattern 40 having an injection hole 42 is formed.

At this time, a step VI is generated between the first and second regions Va and Vb by the thickness of the common wiring 54.

Accordingly, the seal pattern 40 positioned at the boundary between the first and second regions Va and Vb causes the cell gap difference of the liquid crystal panel to be non-uniform, and the liquid crystal injection unit 42 changes the screen according to the phase difference of the liquid crystal layer. Image deterioration such as spots appears.

In addition, in the conventional liquid crystal panel, since the seal pattern is located on the common wiring, there is a problem in that the adhesion between the seal pattern and the substrate is inferior.

In order to solve the above problems, the present invention is to provide a liquid crystal panel for a liquid crystal display device having a structure that can prevent the liquid crystal injection hole staining, and enhance the adhesion between the substrate and the seal pattern.

To this end, in the present invention, to form a common wiring in the inner portion of the seal pattern.

In order to achieve the above object, in the present invention, the active region and the inactive region forming the periphery of the active region is defined, and the first and second substrates disposed opposite to each other; A seal pattern positioned at a boundary between the active region and the inactive region, bonding the first and second substrates to each other, and having a liquid crystal injection hole at one side thereof; A liquid crystal layer interposed in the seal pattern region; A plurality of gate and data lines formed to cross each other on an active region of the first substrate; A thin film transistor positioned at the intersection of the gate and the data line; A gate and a data pad positioned in an inactive region of the first substrate and connected to ends of the gate and data wires; The liquid crystal injection hole is formed, and is formed parallel to the seal pattern on the inner part of the first and second seal pattern portions positioned opposite the gate and data pad forming portions, and formed of the same material in the same process as the gate wiring. Common wiring; A liquid crystal panel for a liquid crystal display device is connected to an end of the common wire and includes a common pad for applying an external circuit signal to the common wire.

The common pads are respectively located at both ends of the common wiring, are located in the gate and the data pad forming portion, and an outer side seal of the sealing liquid to prevent leakage of the injected liquid crystal is further formed outside the liquid crystal inlet. It is done.

The common wiring may be formed to extend to an outer portion of the seal pattern at a connection portion with the common pad or a boundary portion of the first and second seal pattern portions for electrical connection between the first and second substrates. The electrical connection between the first and second substrates is characterized in that it is made through silver dots.

The liquid crystal injection hole is located in a first seal pattern portion opposite the gate pad forming portion, and a second seal pattern portion opposite the data pad forming portion is formed inside the seal pattern formed in the second seal pattern portion. The second common wiring formed at the second seal pattern portion may further include a second common wiring formed at the second seal pattern portion to connect the common wiring positioned at both ends thereof to correspond to the seal pattern formed at the second seal pattern portion. The liquid crystal inlet is characterized in that it comprises a plurality of liquid crystal inlet dams arranged at a predetermined interval apart.

The common wiring may be positioned to be spaced apart from the seal pattern at a predetermined interval, and the seal pattern may be adhered to the base substrate of the first substrate.                     

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

---- Example 1 -----

In Embodiment 1, a liquid crystal panel for a liquid crystal display device including a common wiring formed at a position surrounding an inner portion of the seal pattern portion with respect to the seal pattern portion located opposite the inactive region where the gate and data pad portions are formed. Yes.

3 is a schematic plan view of a liquid crystal panel for a liquid crystal display according to a first embodiment of the present invention.

As shown in the drawing, the first and second substrates 110 and 130 in which the active region and the non-active region, which is the periphery of the active region, are defined are arranged to face each other. ) And a seal pattern 140 for joining the first and second substrates 110 and 130 are formed at the periphery of the inactive region, and the liquid crystal layer 150 is interposed in the seal pattern 140. .

In addition, a liquid crystal injection hole 142 is formed at one side of the seal pattern 140, and a sealing seal 144 is formed at an outer side of the liquid crystal injection hole 142 to prevent external leakage of the injected liquid crystal layer 150. It is.

The first inactive region VIIa corresponding to the inactive region of the first substrate 110 is extended outward from the second inactive region VIIb which is the inactive region of the second substrate 130.

In the active region of the first substrate 110, the gate wiring 112 is formed in the first direction, the data wiring 114 is formed in the second direction crossing the first direction, and the gate and The thin film transistor T is formed at the point where the data lines 112 and 114 intersect, and the pixel electrode 116 is formed by being connected to the thin film transistor T. In the first inactive region Xa, gates and data pads 118 and 120 for connecting the gate and data lines 112 and 114 and an external circuit (not shown) are formed, respectively.

The common wiring 154 is positioned inside the seal pattern 140 opposite to the gate and data pads 118 and 120.

The common wire 154 is formed at a position surrounding an inner portion that does not overlap the seal pattern 140. For this purpose, the common wire 154 has a pattern margin of ± 0.3 mm, which is a pattern margin of the seal pattern 140. It is desirable to manufacture with the value in mind.

The "IX" region is a silver dot forming portion, not shown, in which the common wiring 154 extends to the outside of the seal pattern 140.

The common line 154 is connected to the common pad 158 formed on the first inactive region VIIa through the common connection line 156.

Since the common wiring 154 is made of the same material in the same process as the gate wiring 112, the seal pattern 140 positioned on the region where the common wiring 154 pattern does not exist is formed on the glass substrate as the base substrate. To be formed in, it is possible to strengthen the adhesive force of the seal pattern 140 than conventional.

Although not shown in detail in the drawings, the aforementioned thin film transistor T is spaced apart from the gate electrode branched from the gate line 112, the drain electrode branched from the data line 114, and the drain electrode. And a drain contact hole exposing a part of the drain electrode on the thin film transistor T, a protective layer made of an organic insulating material, and a drain contact hole on the protective layer. It includes a pixel electrode 116 connected to the drain electrode through.

The organic insulating material may be selected from any one of BCB or photoacrylic, which is a photosensitive organic insulating material, and the protective layer may be formed having a plurality of open portions spaced apart from each other at a portion overlapping the seal pattern 140. .

In addition, a common electrode is formed on an inner surface of the second substrate 130, and may include a color filter and a black matrix positioned at color boundaries of the color filter.

FIG. 4 is an enlarged view of the liquid crystal inlet of FIG. 3, and an illustration of a sealing seal is omitted for convenience of description.

As shown, the seal pattern 140 having the above-described liquid crystal injection hole 142 is formed in one direction, the common wiring 154 on the left side spaced apart from the seal pattern 140 by a predetermined interval, the seal pattern 140 It is formed in the same direction as. In the liquid crystal injection hole 142, a plurality of liquid crystal injection dams 143 are formed to be spaced apart from each other by a predetermined distance in a horizontal direction with the seal pattern 140.

As described above, in the present invention, as the common wiring 154 is formed inside the seal pattern 140 so as not to overlap the seal pattern 140, the spot defects generated by the step formed by the common wiring in the existing liquid crystal injection unit are eliminated. It can prevent.

----- Example 2 ------

The second embodiment is an embodiment in which a seal pattern having a parallel structure is formed in a range that does not overlap with the seal pattern in order to prevent the wiring resistance from increasing as the common wiring is formed inside the seal pattern.

FIG. 5 is a plan view of a liquid crystal panel for a liquid crystal display according to a second embodiment of the present invention, and a description of the overlapping part with FIG. 3 will be briefly described.

As illustrated, the common wiring 254 according to the present exemplary embodiment includes a first common metal pattern 254a located inside the first seal pattern portion XIa including the liquid crystal injection hole 242, and a first common metal. It is connected to the pattern 254a integrally, respectively, located on the inner and outer sides of the second seal pattern portion (XIb), based on the second seal pattern portion (XIb) opposite the data pad 220 forming portion, The second and third common metal patterns 254b and 254c are integrally formed.

The common wiring 254 is connected to the common pad 258 positioned at the gate and data pad 218 and 220 formation through the common connection wiring 256.

In addition, a seal pattern is formed at a portion connected to the common connection wiring 256 and a connection portion between the first common metal pattern 254a and the second and third common metal patterns 254b and 254c to contact the silver dot (not shown). It is preferable to partially extend to the outside of 240.

FIG. 6 is an enlarged view of the “XII” region of FIG. 5, in which second and third common metal patterns 254b and 254c having open portions XIII are formed at positions corresponding to the seal pattern 240. . Since the second and third common metal patterns 254b and 254c are formed in a parallel structure, a resistance value applied to the common wiring may be further lowered.

However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention.

As described above, the liquid crystal panel for a liquid crystal display device having the common wiring pattern according to the present invention has the following effects.

First, the cell gap between the periphery of the liquid crystal injection hole and the active main area can be maintained uniformly, and thus the image quality defect can be prevented by preventing the injection hole stain.

Second, it is possible to improve the adhesion between the seal pattern and the substrate.

Claims (9)

First and second substrates defining an active region and an inactive region forming a periphery of the active region and disposed to face each other; A seal pattern positioned at a boundary between the active region and the inactive region, bonding the first and second substrates to each other, and having a liquid crystal injection hole at one side thereof; A liquid crystal layer interposed in the seal pattern region; A plurality of gate and data lines formed to cross each other on an active region of the first substrate; A thin film transistor positioned at the intersection of the gate and the data line; Gate and data pads positioned in the inactive region of the first substrate and connected to ends of the gate and data lines; Including the liquid crystal injection hole, and formed inside the seal pattern of the first and second seal pattern portion formed on the opposite side of the gate and the data pad forming portion, respectively, parallel to the seal pattern, the gate wiring And common wiring made of the same material in the same process; A common pad connected to an end of the common wiring to apply an external circuit signal to the common wiring; Liquid crystal panel for a liquid crystal display device comprising a. The method of claim 1, And the common pads are respectively positioned at both ends of the common wiring and positioned in the gate and the data pad forming portion. The method of claim 1, A liquid crystal panel for a liquid crystal display device, wherein a sealing seal is further formed outside the liquid crystal inlet to prevent leakage of the injected liquid crystal. The method of claim 1, The common wiring is a liquid crystal display for a liquid crystal display device that extends to the outer portion of the seal pattern at a boundary between the connection portion with the common pad or the first and second seal pattern portions for electrical connection between the first and second substrates. panel. The method of claim 4, wherein The liquid crystal panel of claim 1, wherein the first and second substrates are electrically connected through silver dots. The method of claim 1, The liquid crystal injection hole is located in a first seal pattern portion opposite the gate pad forming portion, and a second seal pattern portion opposite the data pad forming portion is formed inside the seal pattern formed in the second seal pattern portion. The second common wiring formed at the second seal pattern portion may further include a second common wiring formed at the second seal pattern portion to connect the common wiring positioned at both ends thereof to correspond to the seal pattern formed at the second seal pattern portion. Liquid crystal panel for liquid crystal display device characterized by the above-mentioned. The method of claim 1, The liquid crystal panel for a liquid crystal display device including a plurality of liquid crystal inlet dams spaced apart from each other in the liquid crystal inlet. The method of claim 1, And the common wiring is spaced apart from the seal pattern at a predetermined interval. The method of claim 1, The seal pattern is a liquid crystal panel for a liquid crystal display device is bonded on the base substrate of the first substrate.

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