KR100839836B1 - An array substrate for In-Plane switching mode LCD and the method for fabricating the same - Google Patents

Abstract

The present invention relates to a liquid crystal display device, and more particularly, to a transverse electric field type liquid crystal display device.

In summary, the present invention provides a structure (column) having a higher electrical conductivity, higher dielectric constant, and higher resistivity than an alignment layer between the array substrate and the upper color filter substrate, and protruding protrusions on the upper substrate corresponding to the common electrode and the pixel electrode. ribs).

The structure not only serves to maintain a gap between the array substrate and the upper color filter substrate, but also traps the ionic impurities that are locally trapped between the common electrode and the pixel electrode and the alignment layer formed on each electrode. Since the liquid crystal is diffused over the entire surface, the liquid crystal does not affect its behavior, and afterimage caused by abnormal orientation of the liquid crystal can be prevented.

The protrusion may distort the electric field distribution generated between the pixel electrode and the common electrode so that the distribution of the electric field is tightly distributed in the lower substrate direction, thereby lowering the driving voltage for driving the liquid crystal, and reducing the distance between the electrodes. Since it can be designed farther away, the aperture ratio can be improved, and thus a liquid crystal panel that can realize high quality can be manufactured.

Description

An array substrate for in-plane switching mode LCD and the method for fabricating the same             

1 is a cross-sectional view schematically showing a part of a general transverse electric field type liquid crystal display device;

2A and 2B are cross-sectional views illustrating operations of off and on states of a general transverse electric field type liquid crystal display device, respectively.

3 is a plan view schematically showing one pixel of a conventional array substrate for a transverse electric field type liquid crystal display device;

4 is a cross-sectional view of the liquid crystal panel taken along line IV-IV ′ of FIG. 3.

5 is a plan view schematically showing one pixel of an array substrate for a transverse electric field type liquid crystal display device according to the present invention;

6A to 6D are cross sectional views taken along the lines VII-VII and VII-VII of FIG. 5 and in accordance with the process sequence of the present invention.

FIG. 7 is a cross-sectional view illustrating the configuration of a liquid crystal panel according to a first embodiment of the present invention, cut along VI-VI ′ of FIG. 5;

FIG. 8 is a cross-sectional view illustrating a configuration of a liquid crystal panel according to a second embodiment of the present invention, cut along VI-VI ′ of FIG. 5.

<Brief description of the main parts of the drawing>

100: substrate 112: gate wiring

114: gate electrode 117: common electrode

116: storage wiring 120: active layer

124: data wiring 126: source electrode

128: drain electrode 130: pixel electrode

136: Structure

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device. In particular, an ion impurity trapped between a common electrode, a pixel electrode, and an alignment layer is removed to prevent afterimages, and the driving voltage of the liquid crystal can be lowered. An improved transverse electric field type liquid crystal display device is provided.

In general, the driving principle of the liquid crystal display device uses the optical anisotropy and polarization of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.                         

Accordingly, if the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal due to optical anisotropy to express image information.

Currently, an active matrix liquid crystal display device (AM-LCD: abbreviated as an active matrix LCD, abbreviated as a liquid crystal display device) in which a thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner has the best resolution and video performance. It is attracting attention.

The liquid crystal display includes a color filter substrate (upper substrate) on which a common electrode is formed, an array substrate (lower substrate) on which a pixel electrode is formed, and a liquid crystal filled between upper and lower substrates. The liquid crystal is driven by an electric field applied up and down by the pixel electrode, so that the characteristics such as transmittance and aperture ratio are excellent.

However, the liquid crystal drive by the electric field applied up-down has a disadvantage that the viewing angle characteristics are not excellent. Therefore, new techniques have been proposed to overcome the above disadvantages. The liquid crystal display device to be described below has an advantage of excellent viewing angle characteristics by a liquid crystal driving method using a transverse electric field.

Hereinafter, a general transverse electric field type liquid crystal display device will be described in detail with reference to FIG. 1.

1 is a cross-sectional view showing a cross section of a general transverse electric field type liquid crystal display device.

As shown, the upper substrate 9, which is a color filter substrate, and the lower substrate 10, which is an array substrate, are spaced apart from each other and face each other. A liquid crystal layer 11 is interposed between the upper and lower substrates 9, 10. It is.                         

The common electrode 17 and the pixel electrode 30 are formed on the same plane on the lower substrate 10.

The liquid crystal layer 11 is operated by the horizontal electric field L of the common electrode 17 and the pixel electrode 30.

2A and 2B are cross-sectional views showing operations in off and on states of a general transverse electric field type liquid crystal display device, respectively.

In FIG. 2A, since the horizontal electric field is not applied to the off state, the arrangement state of the liquid crystal layer 11 is not changed.

In FIG. 2B, an arrangement state of liquid crystals in an on state where a voltage is applied is shown. A phase change of the liquid crystal 11a at a position corresponding to the common electrode 17 and the pixel electrode 30 is shown in FIG. However, the liquid crystal 11b positioned in the section between the common electrode 17 and the pixel electrode 30 is formed by the horizontal electric field L formed by applying a voltage between the common electrode 17 and the pixel electrode 30. It is arranged in the same direction as the horizontal electric field (L). That is, in the transverse electric field type liquid crystal display device, since the liquid crystal moves by the horizontal electric field, the viewing angle is widened.

Therefore, when viewed from the front, the transverse electric field type liquid crystal display device can be visible in the about 80 to 85 ^o direction in the up / down / left / right directions.

3 is a plan view schematically illustrating a part of a conventional array substrate for a transverse electric field type liquid crystal display device.                         

As shown in the drawing, the lower substrate 10, which is a conventional array substrate for a transverse electric field type liquid crystal display device, has a plurality of gate wirings 12 arranged in one direction in parallel with a predetermined interval and close to the gate wiring 12. The storage wiring 16 is arranged in parallel in one direction, and the data wiring 24 intersecting the two wirings, in particular the gate wiring 12, defines the pixel region P.

The thin film transistor T including the gate electrode 14, the active layer 20, the source electrode 26, and the drain electrode 28 is formed at the intersection of the gate wiring 12 and the data wiring 24. The source electrode 26 is connected to the data line 24 and the gate electrode 14 is connected to the gate line 12.

The pixel electrode 30 connected to the drain electrode 28 and the common electrode 17 connected in parallel with the pixel electrode 30 and connected to the storage wiring 16 are disposed on the pixel area P. This is made up.

The pixel electrode 30 includes an extension part 30a extending from the drain electrode 28, a plurality of vertical parts 30b extending vertically from the extension part 30a and spaced apart from each other by a predetermined distance, and the storage wiring. It consists of a horizontal part 30c which connects the vertical part 30b to one in the upper part of 16.

The common electrode 17 extends vertically downward from the storage wiring 16, and includes a plurality of vertical portions 17b intersecting with the vertical portions 30b of the pixel electrode, and the vertical portions 17b. It consists of a horizontal portion (17a) for connecting one.

The vertical portion 17b of the common electrode 17 formed in the pixel region P is configured to be spaced apart from the data line 24 by a predetermined distance.

4 is a cross-sectional view illustrating a cross section of a transverse electric field type liquid crystal panel cut along line IV-IV ′ of FIG. 3.

As shown, the liquid crystal panel 21 is formed by bonding the color filter substrate, which is the upper substrate 9, and the array substrate, which is the lower substrate 10, to be bonded.

The black matrix 42 and the color filter 44 are formed on the upper substrate 9, and the passivation layer 46 and the first alignment layer 48 are sequentially formed on the black matrix 42 and the color filter 44. do.

As described above, the lower substrate 10 includes a common electrode 17b and a pixel electrode 30b.

A second alignment layer 34 is formed on the uppermost layer of the substrate 10 including the common electrode 17b and the pixel electrode 30b.

The black matrix 42 is configured to correspond to a region spaced apart from the common electrode 17b adjacent to the data line 24.

When the liquid crystal panel 21 having the above-described configuration is driven, a transverse electric field L is distributed between the common electrode 17b and the pixel electrode 30b to drive the liquid crystal (not shown).

In this case, an ionic impurity (K) is present between the second alignment layer 34 and the liquid crystal (not shown).

The ionic impurity (K) is ions eluted from the second alignment layer 34 and induced by the electrodes 17b and 30b so that the ionic impurities K may be disposed between the electrodes 17b and 30b and the second alignment layer 34. There will be amulets.

 As described above, the locally trapped ions are present in the DC component, thereby preventing the alignment of the liquid crystal by preventing the alignment of the liquid crystal (not shown).

If such an area occurs during operation of the liquid crystal panel, it is observed as an afterimage.

In addition, the above-described configuration has a configuration in which three common electrodes and two pixel electrodes are disposed on one pixel region, and a driving voltage for driving the liquid crystal panel is very high, which is 6V.

The configuration as described above not only reduces the aperture ratio, but also the driving voltage is very high.

The present invention has been proposed for the purpose of solving the above problems, by forming a columnar structure having a higher electrical conductivity and dielectric constant than the alignment layer on the alignment layer of the upper portion of the gate wiring or data wiring of the array substrate, Impurities trapped on top of each electrode are dispersed to the upper substrate.

In addition, an organic protrusion is formed on the upper substrate corresponding to the common electrode and the pixel electrode, so that the distribution of the electric field generated between the common electrode and the pixel electrode is distorted.

That is, the electric field distribution is strongly formed below the upper substrate and spaced apart from each electrode, so that the liquid crystal can be driven at a lower voltage.

In addition, the distorted electric field distribution can increase the separation distance of each electrode, and can reduce the number of electrodes formed in a single pixel region, thereby achieving a high aperture ratio.

An array substrate for a liquid crystal display device according to the present invention for achieving the above object is a substrate; A gate wiring and a data wiring crossing the substrate perpendicularly to each other to define a pixel region; Storage wiring arranged in one direction to be spaced apart from each other in parallel with the gate wiring; A thin film transistor configured at a point where the gate wiring and the data wiring cross each other, the thin film transistor comprising a gate electrode, a d active layer, a source electrode and a drain electrode; A pixel electrode comprising an extension portion extending from the drain electrode to the pixel region, a plurality of vertical portions extending vertically from the extension portion to the pixel region, and a horizontal portion connecting the vertical portions into one at the top of the storage line; A common electrode extending vertically from the storage wiring to a pixel area, the common electrode including a plurality of vertical parts spaced apart from the vertical parts of the pixel electrode in parallel with a predetermined interval, and a horizontal part connecting the plurality of vertical parts to one; An alignment layer formed on the data line, the gate line, the storage line, the common electrode, and the pixel electrode; It includes a columnar structure formed on the alignment layer on the gate wiring and the data wiring.

The columnar structure is made of a material having a higher electrical conductivity and dielectric constant than the alignment layer.

According to an aspect of the present invention, there is provided a method of fabricating an array substrate for a transverse electric field type liquid crystal display device, including forming a gate wiring and a gate electrode on a substrate and forming a common electrode in a pixel region on the substrate; Forming a semiconductor layer on the gate electrode; A data line defining the pixel region is formed by crossing the gate line perpendicularly to each other, and the gate electrode, the semiconductor layer, the source electrode on the semiconductor layer, and a point where the gate line and the data line cross each other; Forming a thin film transistor including a drain electrode; Forming a pixel electrode extending from the drain electrode to a pixel region and spaced apart from the common electrode in parallel with a predetermined interval; Forming an alignment layer on the common electrode and the pixel electrode; And forming a columnar structure formed on the alignment layer on the gate line and the data line.

According to an aspect of the present invention, there is provided a liquid crystal display device comprising: a gate line and a data line on the substrate to vertically cross each other to define a pixel area; Storage wiring arranged in one direction to be spaced apart from each other in parallel with the gate wiring; A thin film transistor configured at a point where the gate wiring and the data wiring cross each other, the thin film transistor comprising a gate electrode, a semiconductor layer, a source electrode, and a drain electrode; A pixel electrode comprising an extension portion extending from the drain electrode to the pixel region, a plurality of vertical portions extending vertically from the extension portion to the pixel region, and a horizontal portion connecting the vertical portions into one at the top of the storage wiring; A common electrode comprising a plurality of vertical parts extending vertically from the storage wiring to a pixel area and spaced apart from each other in parallel with the vertical parts of the pixel electrodes, and a horizontal part connecting the plurality of vertical parts to one; An alignment layer formed on the data line, the gate line, the storage line, the common electrode, and the pixel electrode; A first substrate including a columnar structure formed on the alignment layer on the gate line and the data line;

Multiple black matrices; A color filter constructed between the black matrices; An alignment layer formed on the color filter and the black matrix; And a second substrate including a protrusion formed in a protruding shape in a portion corresponding to the common electrode and the pixel electrode of the first substrate.

The protrusion is a transparent organic insulating material having a dielectric constant in the range of 2 to 6, and the height is 1 μm to 2 μm.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

First Embodiment

The transverse electric field array substrate according to the present invention is characterized by forming a columnar structure having a higher electrical conductivity and dielectric constant than the alignment film on the alignment film on the gate wiring or the data wiring.

5 is a plan view schematically showing one pixel of an array substrate for a transverse electric field type liquid crystal display device according to the present invention.

As illustrated, the array substrate 100 for a transverse electric field type liquid crystal display device includes a plurality of gate wirings 112 arranged in one direction in parallel with a predetermined interval, and storage configured in one direction in parallel with the gate wirings. The wiring 116 and the data wiring 124 intersecting the two wirings, and in particular the gate wiring 112, define a pixel region P.

The thin film transistor T including the gate electrode 114, the active layer 120, the source electrode 126, and the drain electrode 128 is formed at the intersection of the gate wiring 112 and the data wiring 124. The source electrode 126 is connected to the data line 124 and the gate electrode 114 is connected to the gate line 112.

The pixel electrode 130 connected to the drain electrode 128 and the common electrode 117 formed in parallel with the pixel electrode 130 and connected to the storage wiring 116 are disposed on the pixel area P. This is made up.

The pixel electrode 130 may include an extension part 130a extending from the drain electrode 128, a plurality of vertical parts 130b vertically extending from the extension part 130a and spaced apart from each other by a predetermined distance, and the storage wiring line. It consists of a horizontal portion (130c) connecting the vertical portion (130b) as one at the top of the (116).

The common electrode 117 extends vertically downward from the storage wiring 116 and intersects with the vertical portion 130b of the pixel electrode and the vertical portions 117b. It consists of a horizontal portion (117a) connected to one.                     

The vertical portion 117b of the common electrode 117 formed in the pixel region P is configured to be spaced apart from the data line 124 by a predetermined interval.

The structure 136 is formed on the gate line 112 and the data line 124.

6A to 6D, a manufacturing process of an array substrate for a transverse electric field type liquid crystal display device according to the present invention will be described.

6A to 6D are cross sectional views taken along the line VII-VII` and VII-VII` of FIG. 5 and shown in the process sequence of the present invention.

FIG. 6A illustrates a method of depositing a selected one of a conductive metal group including an aluminum alloy such as aluminum (Al), aluminum neodymium (AlNd), chromium (Cr), molybdenum (Mo), and tungsten (W) on the substrate 100. The gate wiring 112 including the gate electrode 114, the storage wiring 116 spaced apart in parallel with the gate wiring by a predetermined interval, and a plurality of vertical parts protruding vertically from the storage wiring 116. A common electrode 117 is formed that includes a 117b and a horizontal portion 117a that connects the plurality of vertical portions 117b into one.

Next, a group of inorganic insulating materials including silicon nitride (SiN _x ) and silicon oxide (SiO ₂ ) on the front surface of the substrate 100 including the gate wiring 112 and the storage wiring 116. The gate insulating layer 118 is formed by depositing the selected one.

Next, amorphous silicon (a-Si: H) and amorphous silicon (n + a-Si: H) including impurities are deposited on the gate insulating layer 118 and patterned to form an active layer 120 and an ohmic contact. Form layer 122.

6B illustrates depositing and patterning one of the conductive metal groups as described above on the entire surface of the substrate 100 on which the active layer 120 and the ohmic contact layer 122 are formed, thereby forming the gate wiring 112 and the storage wiring. A data line 124 intersecting with 116 to define a pixel area P, and a source electrode 126 protruding from the data line 124 and overlapping an upper portion of one side of the active layer 120. And a drain electrode 128 spaced apart from each other by a predetermined interval, an extension portion 130a extending in one direction above the pixel region P from the drain electrode 128, and vertically extending from the extension portion 130a. A pixel electrode 130 including a plurality of vertical portions 130b and a horizontal portion 130c connecting the plurality of vertical portions 130b to one is formed.

The horizontal portion 130c of the pixel electrode is formed on the storage line 116.

In the above-described process, the ohmic contact layer 122 exposed between the two electrodes is etched using the source electrode 126 and the drain electrode 128 as a mask to expose the active layer 120.

FIG. 6C illustrates one selected from the group of organic insulating materials including benzocyclobutene and acryl-based resin on the front surface of the substrate 100 on which the data line 124 and the like are formed. A protective film 132 is formed by coating or depositing one selected from the group of inorganic insulating materials including SiN _x ) and silicon oxide (SiO ₂ ).

FIG. 6D illustrates that an alignment layer 134 is formed on the passivation layer 132 and has a higher electrical conductivity and dielectric constant than the alignment layer 134 on the gate line 112 or the data line 124. The columnar structure 136 is formed.

Although not shown, the structure 136 maintains a separation distance between the upper substrate and the lower substrate 100, and serves to disperse the impurity ions locally trapped on the lower substrate 100 to the upper substrate. .

A description with reference to FIG. 7 is as follows.

As illustrated, the liquid crystal panel 121 is formed by bonding the color filter substrate, which is the upper substrate 140, and the array substrate, which is the lower substrate 100, to be bonded.

The black matrix 142 and the color filter 144 are formed on the upper substrate 140, and the passivation layer 146 and the first alignment layer 148 are sequentially formed on the black matrix 142 and the color filter 144. do.

The black matrix 142 may be positioned to correspond to an area spaced apart from the common electrode 117b adjacent to the data line 124.

This is because liquid crystals (not shown) existing between the common electrode 117b and the data line 124 are caused by signal interference between the common electrode 117b and the data line 124. The light leakage phenomenon is caused because it is different from the alignment characteristic of the liquid crystal molecules positioned at

Therefore, a black matrix 142 that covers the area where light leakage occurs is required.

The structure 136 absorbs the ionic impurities K existing between the common electrode 117b, the pixel electrode 130b, and the second alignment layer 134 to diffuse into the upper substrate 140.

Therefore, the liquid crystals on the common electrode and the pixel electrode are not abnormally aligned, and thus no afterimage occurs.

Hereinafter, the configuration of the liquid crystal panel according to the second embodiment includes the above-described configuration, and further includes a protrusion rib on the upper substrate corresponding to the common electrode and the pixel electrode.

Such a configuration enables the low voltage driving by distributing the distribution of the transverse electric field in the lower substrate direction and increasing the separation distance between the common electrode and the pixel electrode formed in the pixel region. The aperture ratio can be improved.

Second Embodiment

According to a second embodiment of the present invention, a protrusion rib is formed on an upper substrate corresponding to the common electrode and the pixel electrode.

FIG. 8 is a cross-sectional view of the liquid crystal panel according to the second embodiment of the present invention taken along the line VI-VI ′ of FIG. 5 (the same configuration as the first embodiment is indicated by adding 100 to the number).

As illustrated, the liquid crystal panel 221 is configured by bonding the color filter substrate, which is the upper substrate 240, and the array substrate, which is the lower substrate 200.

The black matrix 242 and the color filter 244 are formed on the upper substrate 240, and the passivation layer 246 and the first alignment layer 248 are sequentially formed on the black matrix 242 and the color filter 244. do.

As described above, the lower substrate 200 includes the common electrode 217b and the pixel electrode 230b in sequence.

A second alignment layer 234 is formed on the uppermost layer of the substrate 200 including the common electrode 217b and the pixel electrode 230b.

The black matrix 242 is configured to correspond to a region spaced apart from the common electrode 217b adjacent to the data line 224.

A columnar structure 236 having higher electrical conductivity and dielectric constant than the second alignment layer 234 is formed on the gate line 112 and the data line 224.

Since the role of the structure has been described above, a description thereof will be omitted.

A plurality of protrusions 238 are formed on the upper substrate 240 corresponding to the common electrode 217b and the pixel electrode 230b. The protrusion 238 is formed of an organic material having a dielectric constant in the range of 2-6.

In addition, the height of the protrusion 238 is formed to be 1㎛ ~ 2㎛.

In addition, the width of the protrusion 238 is formed to be smaller than the width of each electrode.

The protrusion 238 distorts the transverse electric field distribution 250 generated between the common electrode 217b and the pixel electrode 230b, thereby bringing an electric field closer to the lower substrate 200, and the two electrodes 217b and 230b. It serves to distribute more tightly between).

In this way, it is possible to drive at a lower voltage, that is, a voltage of about 5 V or less by exhibiting a reinforcing effect of the electric field, and to increase the separation distance between the electrodes.

Therefore, since the number of electrodes designed in a single pixel region can be reduced from five to four or less, there is an effect of improving the aperture ratio.

Through the first and second embodiments as described above, the transverse electric field type liquid crystal panel according to the present invention can be manufactured.

Accordingly, the array substrate for a transverse electric field type liquid crystal display device according to the present invention has a columnar structure having a higher electrical conductivity and dielectric constant than the alignment layer on the alignment layer on the data wiring or gate wiring, so that the common electrode and the pixel electrode Locally trapped ionic impurities are dispersed in the upper alignment layer.

Therefore, since the liquid crystal operates normally, the afterimage effect can be prevented and a transverse electric field type liquid crystal display device for realizing high image quality can be manufactured.

In addition, by forming a plurality of projections formed of an organic material on the upper side corresponding to the common electrode and the pixel electrode, the transverse electric field is distributed more densely in the direction of the lower substrate to enable low voltage driving. Since the separation distance can be widened, the number of electrodes can be reduced, thereby improving the aperture ratio.

Claims (7)

A substrate; A gate wiring and a data wiring crossing the substrate perpendicularly to each other to define a pixel region; A thin film transistor configured at a point where the gate wiring and the data wiring cross each other, the thin film transistor comprising a gate electrode, an active layer, a source electrode, and a drain electrode; A pixel electrode extending from the drain electrode to a pixel region; A common electrode spaced apart from the pixel electrode in parallel with a predetermined interval; An alignment layer formed on the common electrode and the pixel electrode; A columnar structure is formed on the alignment layer above the gate line and the data line, and has a columnar structure having a higher electrical conductivity and dielectric constant than the alignment layer. An array substrate for a transverse electric field type liquid crystal display device comprising. delete Forming a gate wiring and a gate electrode on the substrate and forming a common electrode in the pixel region on the substrate; Forming a semiconductor layer on the gate electrode; A data line defining the pixel region is formed by crossing the gate line perpendicularly to each other, and the gate electrode, the semiconductor layer, the source electrode on the semiconductor layer, and a point where the gate line and the data line cross each other; Forming a thin film transistor including a drain electrode; Forming a pixel electrode extending from the drain electrode to a pixel region and spaced apart from the common electrode in parallel with a predetermined interval; Forming an alignment layer on the common electrode and the pixel electrode; Forming a columnar structure on the alignment layer above the gate line and the data line, the columnar structure having a value of greater electrical conductivity and dielectric constant than the alignment layer; Array substrate manufacturing method for a transverse electric field type liquid crystal display device comprising. delete A gate wiring and a data wiring on the first substrate to vertically cross each other to define a pixel region; A thin film transistor configured at a point where the gate wiring and the data wiring cross each other, the thin film transistor comprising a gate electrode, a semiconductor layer, a source electrode, and a drain electrode; A pixel electrode extending from the drain electrode to a pixel region; A common electrode spaced apart from the pixel electrode in parallel with a predetermined interval; An alignment layer formed on the common electrode and the pixel electrode; A columnar structure formed on the alignment film above the gate wiring and the data wiring, the columnar structure having a greater electrical conductivity and dielectric constant than the alignment film; A color filter constructed on the second substrate; An alignment film formed on the color filter; The protrusions having protruding shapes are formed at portions corresponding to the common electrode and the pixel electrode of the first substrate. Transverse electric field type liquid crystal display device comprising. The method of claim 5, wherein The projection is a transverse electric field liquid crystal display device composed of a transparent organic insulating material having a dielectric constant in the range of 2 to 6. The method of claim 6, A transverse electric field liquid crystal display device having a height of the projections of 1 µm to 2 µm.

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