KR101609826B1 - Array substrate for fringe field switching mode liquid crystal display device - Google Patents

Abstract

The present invention provides a method of manufacturing a semiconductor device having a transparent substrate on which a pixel region having a first domain boundary region at the center and a second domain region below the first domain region on the basis of the domain boundary region is defined, An extended gate wiring; A data line formed on a boundary of the pixel region and intersecting the gate line with a gate insulating film; A thin film transistor connected to the gate and the data line; A pixel electrode in contact with the drain electrode of the thin film transistor and formed in the pixel region and symmetrically bent around the domain boundary; And a common electrode formed on the entire surface of the substrate over the pixel electrode, the common electrode corresponding to each pixel region and having a plurality of openings symmetrically bent with respect to the domain boundary, And the gate electrode of the thin film transistor provided in the pixel region is connected to the gate electrode of the thin film transistor provided in the pixel region.

Fringe field, liquid crystal display, color shift, domain, aperture ratio, parasitic capacitance

Description

[0001] The present invention relates to an array substrate for a fringe field switching mode liquid crystal display device,

The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device in which a pixel region has a multi-domain structure to suppress the occurrence of color shift, thereby improving the display quality and improving the aperture ratio and the parasitic capacitance between the gate wiring and the pixel electrode And more particularly to an array substrate for a fringe field switching mode liquid crystal display device.

In general, a liquid crystal display device is driven by using optical anisotropy and polarization properties of a liquid crystal. Since the liquid crystal has a long structure, it has a directionality in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Therefore, when the molecular alignment direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular alignment direction of the liquid crystal by optical anisotropy, so that image information can be expressed.

At present, an active matrix liquid crystal display (AM-LCD: hereinafter referred to as liquid crystal display) in which a thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner has excellent resolution and video realization capability, It is attracting attention.

The liquid crystal display device includes a color filter substrate on which a common electrode is formed, an array substrate on which pixel electrodes are formed, and a liquid crystal interposed between the two substrates. In such a liquid crystal display device, The liquid crystal is driven to have excellent properties such as transmittance and aperture ratio.

However, liquid crystal driving by an electric field that is applied up and down has a drawback that the viewing angle characteristic is not excellent.

Therefore, a transverse electric field type liquid crystal display device having excellent viewing angle characteristics has been proposed to overcome the above disadvantages.

Hereinafter, a general transverse electric field type liquid crystal display device will be described in detail with reference to FIG.

1 is a cross-sectional view of a general transverse electric field type liquid crystal display device.

As shown in the figure, the upper substrate 9, which is a color filter substrate, and the lower substrate 10, which is an array substrate, are spaced apart from each other and face each other. A liquid crystal layer 11 is interposed between the upper and lower substrates 9, .

The common electrode 17 and the pixel electrode 30 are formed on the same plane on the lower substrate 10 and the liquid crystal layer 11 is formed by the common electrode 17 and the pixel electrode 30 And is operated by the horizontal electric field (L).

2A and 2B are cross-sectional views respectively showing the on and off states of a general transverse electric field type liquid crystal display device.

2A showing the alignment state of the liquid crystal in the ON state to which the voltage is applied, the phase of the liquid crystal 11a at the position corresponding to the common electrode 17 and the pixel electrode 30 is The liquid crystal 11b located between the common electrode 17 and the pixel electrode 30 is formed by a horizontal electric field L formed by applying a voltage between the common electrode 17 and the pixel electrode 30, And arranged in the same direction as the horizontal electric field (L). That is, since the liquid crystal is moved by the horizontal electric field in the transverse electric field type liquid crystal display device, the viewing angle becomes wide.

Therefore, when viewed from the front, the transverse electric-field-type liquid-crystal display device can be visually observed in the direction of about 80 to 85 ^{° in the up} / down / left / right direction without reversal.

Next, referring to FIG. 2B, a horizontal electric field is not formed between the common electrode and the pixel electrode since the liquid crystal display device is in an off state in which no voltage is applied, so that the alignment state of the liquid crystal layer 11 is not changed.

However, such a transverse electric field type liquid crystal display device has the advantage of improving the viewing angle, but has a disadvantage in that the aperture ratio and transmittance are low.

Therefore, a fringe field switching mode LCD has been proposed in which liquid crystal operates by a fringe field in order to realize the disadvantage of such a transverse electric field type liquid crystal display device.

3 is a plan view of one pixel region in an array substrate of a conventional fringe field switching mode liquid crystal display.

As shown in the drawing, a plurality of gate wirings 43 extend in one direction. A plurality of data wirings 51 are defined by intersecting the plurality of gate wirings 43 to define a plurality of pixel regions P Respectively.

Each of the plurality of pixel regions P is connected to the data line 51 and the gate line 43 defining the pixel region P and includes a gate electrode 45, a gate insulating layer (not shown), a semiconductor layer (not shown) And a thin film transistor Tr which is a switching element including drain electrodes 55 and 58 is formed.

Each pixel region P is electrically connected to the drain electrode 58 of the thin film transistor Tr through the drain contact hole 59 and has a plurality of openings op in the form of a bar, Type pixel electrode 60 is formed.

In addition, a common electrode 75 is formed on the entire surface of the display region where the plurality of pixel regions P are formed, overlapping the plate-shaped pixel electrode 60 corresponding to each pixel region P. At this time, the common electrode 75 is formed on the entire surface of the display region, but a portion corresponding to one pixel region is indicated by a dotted line.

The array substrate 41 for a fringe field switching mode liquid crystal display device having such a structure includes a pixel electrode 60 having a plurality of bar-shaped openings op for each pixel region P, A voltage is applied to the gate electrode 75 to form a fringe field.

However, in a liquid crystal display device having an array substrate for a fringe field switching mode liquid crystal display device having the above-described structure, each pixel region has a single domain, so that a user can change the azimuth angle of the liquid crystal display device Color shift phenomenon occurs in the vicinity of 0 deg., 90 deg., 180 deg., And 270 deg. To cause a deterioration in display quality.

DISCLOSURE Technical Problem Accordingly, the present invention has been made in order to solve the problems of the conventional array substrate for a fringe field switching mode liquid crystal display, and it is an object of the present invention to improve the display quality by suppressing the color shift phenomenon and further to improve the transmittance and minimize the parasitic capacitance between the gate sources And an object of the present invention is to provide an array substrate for a fringe field switching mode liquid crystal display device in which characteristics of thin film transistors are improved.

According to an aspect of the present invention, there is provided an array substrate for a fringe field switching mode liquid crystal display, including: a substrate having a first domain boundary region at a central portion and a first domain region below the first domain region, A gate wiring formed on the transparent substrate on which the pixel region having the second domain region is defined and extending in one direction at the domain boundary; A data line formed on a boundary of the pixel region and intersecting the gate line with a gate insulating film; A thin film transistor connected to the gate and the data line; A pixel electrode in contact with the drain electrode of the thin film transistor and formed in the pixel region and symmetrically bent around the domain boundary; And a common electrode formed on the entire surface of the substrate over the pixel electrode, the common electrode corresponding to each pixel region and having a plurality of openings symmetrically bent with respect to the domain boundary, And is connected to the gate electrode of the thin film transistor provided in the pixel region.

In this case, the data line has a structure in which the domain boundary of each pixel region is symmetrically bent with respect to the reference, thereby forming a zigzag pattern on the entire display region.

In addition, the pixel electrodes provided in the pixel regions adjacent to each other are formed to have a spacing distance enough to prevent a shot due to a patterning error.

Further, the thin film transistor is characterized in that it is formed at the boundary between pixel regions adjacent to each other in the upper and lower directions.

The array substrate for the fringe field switching mode liquid crystal display according to the present invention is formed such that the openings provided in the common electrode are symmetrically bent with respect to the center of each pixel region, There is an effect of preventing a color shift phenomenon at an angle.

In addition, the gate line is formed at the portion where the pixel region is bent for multi-domain implementation, thereby improving the aperture ratio and the transmissivity.

In addition, since the pixel electrode is shifted to the upper pixel region, the parasitic capacitance between the gate wiring and the pixel electrode is minimized.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

≪ Embodiment 1 >

4 is a plan view of one pixel region of an array substrate for a fringe field switching mode liquid crystal display according to a first embodiment of the present invention. For convenience of description, an area in which a plurality of pixel areas P are formed is defined as a display area, and an area outside the display area is defined as a non-display area. In addition, a portion where the thin film transistor Tr as a switching element is formed in each pixel region P is defined as a switching region.

As shown in the drawing, a plurality of gate wirings 105 are formed extending in a first direction, and a plurality of pixel regions P are defined by intersecting the plurality of gate wirings 105 by extending in a second direction A plurality of data lines 130 are formed. Each pixel region P is connected to the gate wiring 105 and the data wiring 130 and includes a gate electrode 108, a gate insulating film (not shown), and an active layer of pure amorphous silicon (Not shown) formed of an amorphous silicon layer and an ohmic contact layer (not shown) of impurity amorphous silicon, and source and drain electrodes 133 and 136 spaced apart from each other. In this case, although the thin film transistor Tr has a U-shaped channel region, the channel region may be modified into various shapes.

The thin film transistor Tr is formed on the gate wiring 105 outside the pixel region P but may be formed in the pixel region P. [

A pixel electrode 155 having a plurality of spaced apart bar-shaped openings op is formed in contact with the drain electrode 136 of the thin film transistor Tr, . In addition, a common electrode 170 is formed on the entire surface of the display region including the plurality of pixel regions P. In this case, the common electrode 170 is formed on the entire surface of the display region. In FIG. 4, which shows only a planar shape of one pixel region P, the boundary is not displayed. However, (P) in the form of a dotted line.

At this time, as the most characteristic configuration of the present invention, each of a plurality of bar-shaped openings op provided in each pixel electrode 155 formed in each pixel region P is formed in each pixel region P The gate line 105 is symmetrically bent with respect to the imaginary line when the imaginary line is parallel to the gate line 105 at the central portion.

When a plurality of openings op in the pixel electrode 155 are symmetrically bent with respect to the center of each pixel region P in each pixel region P, The two main domains are formed in one pixel region P because the directions of the main fringe fields at the top and bottom are different from each other. In this case, in a completed liquid crystal display device (not shown) having the array substrate 101 having such a structure, the movement of liquid crystal located in different domains in one pixel region P is changed, The color shift phenomenon at a specific azimuth angle is reduced.

That is, for convenience of description, the first domain region D1 and the second domain region D2 are defined as a region constituting the upper portion of the pixel region P with respect to the central portion thereof as a reference, Since the azimuth angle at which the color shift occurs in the first domain region D1 and the azimuth angle at which the color shift occurs in the second domain region D2 are different from each other, the color shift phenomenon of each domain region is compensated for each other, Can be reduced.

However, in the case of a liquid crystal display (not shown) having the array substrate 101 according to the first embodiment having the above-described structure, the domain boundary, that is, the portion where the pixel electrode is bent in the pixel region, A black matrix having a predetermined width is formed on the color filter substrate corresponding to the array substrate with reference to the bent portion. Therefore, the aperture ratio decreases and the transmittance decreases.

The second embodiment of the present invention proposes an array substrate for a fringe field liquid crystal display device capable of reducing the aperture ratio and the transmittance reduction caused in the above-described first embodiment.

≪ Embodiment 2 >

5 is a plan view of a portion of a display region of an array substrate for a fringe field switching mode liquid crystal display according to a second embodiment of the present invention.

As shown in the drawing, a plurality of gate wirings 205 are formed to extend in one direction, and a plurality of data wirings 230 are formed perpendicularly to the plurality of gate wirings 205.

In this case, the pixel region P is not defined as a region where the gate wiring 205 and the data wiring 230 intersect, and the center portion of the pixel region P is defined as the inside of the data wiring 130, And a pixel electrode 155 is formed in a shape of a plate.

A gate electrode 208, a gate insulating film (not shown), and a gate insulating film (not shown) are sequentially connected to the gate lines 205 and the data lines 230, A thin film transistor Tr is formed of a semiconductor layer 220 composed of an active layer (not shown) of an impurity amorphous silicon and an ohmic contact layer (not shown) of impurity amorphous silicon and source and drain electrodes 233 and 236 spaced from each other have. At this time, the shape of the thin film transistor Tr may be modified into various shapes as described in the first embodiment.

A pixel electrode 255 in the form of a plate symmetrically bent with respect to the center of the pixel region P is formed in each pixel region P in contact with the drain electrode 236 of the thin film transistor Tr .

A common electrode 270 having a plurality of bar-shaped openings op spaced apart from one another by a predetermined distance in each pixel region P is formed on the entire surface of the display region including the plurality of pixel regions P, Is formed. 5, since the common electrode 270 is formed on the entire surface of the display region, reference numeral 270 is assigned to the region between the opening and the opening for convenience of explanation.

In the second embodiment having such a configuration, the gate wiring 205 is not located at the boundary of the pixel region P, but passes through the pixel region P and is common to the pixel electrode 255 Is formed across the central portion of the pixel region P where breakage of the opening op of the electrode 270 occurs.

At this time, the pixel region P through which the gate wiring 205 passes is not controlled by the gate wiring 205 overlapping the pixel region P, and the pixel region P through which the gate wiring 205 passes The on / off control of the thin film transistor Tr provided in the pixel region P positioned at the top is performed.

That is, the n-th gate wiring 205 for controlling the thin film transistor Tr located in the pixel region P of the n-th line is formed so as to be positioned at the bent portion of the (n + 1) th pixel region Feature. Since the gate line 205 is formed in correspondence with the bent portion of the pixel electrode 255 and the opening op in the common electrode 270 for the multi-domain implementation of each pixel region P, the direction of the electric field is abruptly changed The occurrence of occurred crystallization naturally occurs. Therefore, it is not necessary to form a separate black matrix (not shown) on the inner surface of the color filter substrate (not shown) for shielding the light emitted by the liquid crystal molecules which cause abnormal operations occurring in this portion, It is advantageous that the aperture ratio is improved by omitting it. In the case of a black matrix (not shown), the width is wider than the actual width of the bare region by 3 to 5 占 퐉 in consideration of the adhesion error between the array substrate and the color filter substrate.

However, in the case of the array substrate for the fringe field switching mode liquid crystal display according to the second embodiment of the present invention, since the gate wiring 205 is formed by patterning, there is no need to consider a cementing error, It is possible to form the gate wiring 205 accurately. Therefore, it can be understood that the area of the portion covered in the pixel region becomes smaller than the conventional one. Therefore, the aperture ratio of the pixel region P can be improved for this reason.

On the other hand, as another characteristic configuration according to the second embodiment of the present invention, a gate wiring 205 for controlling ON / OFF of a thin film transistor in the pixel region P is provided with a thin film transistor Tr controlled thereby The parasitic capacitance generated between the gate wiring 205 and the pixel electrode 255 becomes very small because the pixel region P is separated from the pixel region P by about 1/2 of the vertical width of the pixel region.

Therefore, the display quality and the characteristics of the thin film transistor Tr are improved as the parasitic capacitance that affects the image display quality and the characteristics of the thin film transistor Tr becomes smaller.
The gate electrode 208 of the thin film transistor Tr provided in the upper pixel region P is connected to the gate extension wiring 205a extending from the gate wiring 205 and overlapping along the data wiring 230 do.
That is, the gate electrode 208 of the thin film transistor Tr provided in the upper pixel region P is connected to the gate wiring 205 disposed at the domain boundary of the central portion of the pixel region P via the gate extension wiring 205a .
As described above, by forming the gate extension wiring 205a so as to overlap the data line, it is possible to prevent the aperture ratio from being reduced.

On the other hand, since the gate wiring 205 and the pixel electrode 255 overlapping each other can be used as storage capacitors of the pixel regions P, the capacity of the storage capacitor can be increased.

The gate wiring 205 is formed not through the boundary of the pixel region P but through the central portion of the pixel region P so that the spacing between the pixel electrodes P vertically adjacent to each other is reduced by a patterning error The aperture ratio can be further improved by such a configuration.

When the gate wiring is formed at the boundary of the pixel region, the pixel electrode is formed apart from the gate wiring so as to have a larger width than the patterning error due to the parasitic capacitance problem occurring between the gate wiring and the pixel electrode as described above, In the second embodiment of the present invention, since the pixel region P and the gate wiring 205 which are related to each other are separated by about 1/2 of the width in the longitudinal direction of the pixel region, the pixel electrode 255 and the gate wiring 205 ), It is not necessary to consider the parasitic capacitance between the adjacent pixel electrodes 255. Therefore, only the spacing for preventing the short-circuiting may be secured. Therefore, the aperture ratio can be improved by reducing the spacing between the pixel electrodes 255 in the neighboring pixel region P, which is another characteristic feature.

Hereinafter, the cross-sectional structure of the array substrate for a fringe field switching mode light-emitting display according to the second embodiment will be described.

6 is a cross-sectional view of a portion cut along line VI-VI of FIG. For convenience of description, the portion where the thin film transistor Tr as the switching element is formed is defined as the switching region TrA.

The array substrate 201 for a fringe field switching mode liquid crystal display according to the second embodiment of the present invention includes a transparent insulating substrate 201 on which a metal material having a low resistance characteristic, Gate interconnections (not shown) extending in one direction are formed as one metal material selected from the group consisting of aluminum (AlNd), copper (Cu), copper alloy, chromium (Cr), and molybdenum (Mo) A gate electrode 208 is formed in the switching region TrA and connected to the gate wiring (not shown).

An inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is formed on the entire surface of the substrate 201 over the gate wiring (not shown) and the gate electrode 208.

A semiconductor layer composed of an active layer 220a of pure amorphous silicon and an ohmic contact layer 220b of impurity amorphous silicon corresponding to the gate electrode 208 in the switching region TrA above the gate insulating layer 215 And source and drain electrodes 233 and 236 are formed on the semiconductor layer 220 to be spaced apart from each other. At this time, the active layer 220a is exposed between the source and drain electrodes 233 and 236 which are spaced apart from each other. The gate electrode 208, the gate insulating layer 215, the semiconductor layer 220, and the source and drain electrodes 233 and 236, which are sequentially stacked in the switching region TrA, form a thin film transistor Tr.

A data line 230 which intersects the gate line (not shown) and defines the pixel region P is connected to the source electrode 233 of the thin film transistor Tr, . At this time, the first and second semiconductor patterns 221a and 221b are formed under the data line 233 with the same material that forms the active layer 220a and the ohmic contact layer 220b. However, And the first and second semiconductor patterns 221a and 221b may be omitted.

In each pixel region P, a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO) is in contact with the drain electrode 236 of the thin film transistor Tr, A pixel electrode 255 is formed on the pixel electrode 255 and an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiN x) A protective layer 260 is formed on the entire surface of the substrate 201 as a cyclobutene (BCB) or a photo acryl.

In addition, a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO) is formed on the passivation layer 260, A common electrode 270 having a plurality of openings op is formed on the entire surface of the substrate 201.

On the other hand, in the case of the second embodiment having the above-described cross-sectional structure, in the drawing, the bar-shaped openings op are spaced at equal intervals in the common electrode 270 for each pixel region P However, in order to form an effective fringe field, the openings op corresponding to the pixel regions P are variously deformed to a suitable number within a range of about 2 to 10, .

The present invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the spirit of the present invention.

1 is a cross-sectional view schematically showing a part of a general transverse electric field type liquid crystal display device.

FIGS. 2A and 2B are cross-sectional views respectively showing the on and off states of a general transverse electric field liquid crystal display device;

3 is a plan view of one pixel region of an array substrate of a conventional fringe field switching mode liquid crystal display.

4 is a plan view of one pixel region of an array substrate for a fringe field switching mode liquid crystal display according to the first embodiment of the present invention.

5 is a plan view of a portion of a display region of an array substrate for a fringe field switching mode liquid crystal display according to a second embodiment of the present invention.

6 is a cross-sectional view of the portion cut along line VI-VI of Fig. 5;

BRIEF DESCRIPTION OF THE DRAWINGS FIG.

201: array substrate 205: gate wiring

208: gate electrode 220: semiconductor layer

230: Data wiring 233: Source electrode

236: drain electrode 255: pixel electrode

270: common electrode D1: first domain region

D2: second domain region P: pixel region

op: opening Tr: thin film transistor

Claims (4)

And a pixel region having a first domain region and a second domain region at the upper portion and the lower portion with respect to the domain boundary region of the first width and the domain boundary region at the central portion, A wiring; A data line formed on a boundary of the pixel region and intersecting the gate line with a gate insulating film; A gate extension wiring extending from the gate wiring and overlapping along the data wiring; A thin film transistor connected to the gate and the data line; A pixel electrode in contact with the drain electrode of the thin film transistor and formed in the pixel region and having a symmetrically bent structure with respect to the domain boundary; And a plurality of common electrodes formed on the pixel electrodes over the entire surface of the substrate with an insulating layer interposed therebetween and having a plurality of openings symmetrically bent with respect to the domain boundary, Wherein the gate wiring is connected to a gate electrode of the thin film transistor provided in a pixel region disposed at an upper end through the gate extension wiring. The method according to claim 1, Wherein the data line has a symmetrically bent structure with respect to a domain boundary of each pixel region, thereby forming a zigzag shape on the entire surface of the display region. The method according to claim 1, Wherein the pixel electrodes provided in the pixel regions adjacent to each other are formed to have a spacing distance enough to prevent a shot due to a patterning error. The method according to claim 1, Wherein the thin film transistor is formed at a boundary between upper and lower pixel regions adjacent to each other.

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