KR100839483B1 - Liquid crystal display device - Google Patents

Abstract

The present invention provides a liquid crystal display device capable of improving image quality.

The liquid crystal display according to the present invention is a storage on common type of storage formed in each of a plurality of liquid crystal cells formed at each intersection of gate lines and data lines to maintain pixel voltage charged in the liquid crystal cell. And a capacitor, a storage line for forming a storage capacitor of liquid crystal cells, a branch line connected to the storage lines, and a supply line connected to a central portion of the branch line to supply a storage voltage to the branch line. .

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY DEVICE}             

1 is a block diagram schematically showing a configuration of a conventional liquid crystal display device.

FIG. 2 is a plan view showing in detail the TFT and the storage line shown in FIG.

3 is a view showing a dot pattern displayed in a window of a liquid crystal panel driven in a 2-dot inversion method.

4 is a waveform diagram illustrating a storage voltage waveform changed by residual polarity of each gate line.

5A and 5B are waveform diagrams showing pixel voltages charged in liquid crystal cells.

6 is a diagram illustrating a Greenish phenomenon in which the entire screen is close to green.

7 is a view showing a state in which the normal screen on the desktop.

8 is a block diagram schematically showing the configuration of a liquid crystal display device according to the present invention;

9A and 9B are diagrams showing line resistances of storage lines according to the prior art and the present invention.

10A and 10B illustrate storage voltages applied to a storage line according to the related art and the present invention.

<Description of Symbols for Main Parts of Drawings>

2,32 Liquid crystal panel 4,34 Gate driver

6,36: Data driver 10,40: Storage voltage generator

14: gate terminal 16: source terminal

18: drain terminal 20: pixel electrode

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of improving image quality.

The liquid crystal display device displays an image by adjusting light transmittance of liquid crystal cells according to a video signal. An active matrix type liquid crystal display device in which a thin film transistor (“TFT”) is formed for each liquid crystal cell may display a moving image as compared to a passive matrix type liquid crystal display device. When the image can be displayed more clearly.

Referring to FIG. 1, a conventional liquid crystal display device includes a liquid crystal panel 2, a data driver 6 for supplying data to data lines DL1 to DLm of the liquid crystal panel 2, and a liquid crystal panel 2. A gate driver 4 for supplying scan pulses to the gate lines GL1 to GLn.                         

The gate driver 4 generates a scan pulse under the control of a timing controller (not shown) and sequentially supplies the scan pulse to the gate lines GL1 to GLn. The gate driver 4 includes a shift register for sequentially generating scan pulses, and a level shifter for shifting the swing width of the scan pulse voltage to be suitable for driving the liquid crystal cell Clc. The TFT is turned on in response to the scan pulse from the gate driver 4. When the TFT is turned on, video data on the data lines DL1 to DLm is supplied to the pixel electrode of the liquid crystal cell Clc.

After the data driver 6 samples and latches the video data input from the timing controller, the data driver 6 converts the latched data into a gamma compensation voltage which is preset as a pixel data voltage, and simultaneously supplies the data data to the data lines DL1 to DLm. Here, the data converted by the data driver 6 is supplied to the data lines DL1 to DLm by one horizontal line in one horizontal period in synchronization with each scan pulse every time a scan pulse occurs.

Liquid crystal is injected between the upper glass substrate and the lower glass substrate of the liquid crystal panel 2. In this liquid crystal panel 2, m x n liquid crystal cells Clc are arranged in a matrix type. Further, in the liquid crystal panel 2, m data lines DL1 through DLm and n gate lines GL1 through GLn cross each other, and TFTs for driving the liquid crystal cell Clc are formed at each intersection thereof. As shown in Fig. 2, the gate terminal 14 of the TFT is connected to the same gate line GL every horizontal line, and the source terminal 16 of the TFT is connected to the same data line DL every vertical line. . The drain terminal 18 of the TFT is connected to the pixel electrode 20 of the liquid crystal cell Clc for each liquid crystal cell Clc. In addition, a storage capacitor Cst is formed between the pixel electrode 20 of the liquid crystal cell Clc and the storage line SL. The storage voltages Vst generated by the storage voltage generator 10 are supplied to the storage lines SL1 to SLn constituting the storage capacitor Cst through the supply line KL. Here, the storage voltage Vst may use the common voltage Vcom applied to the upper substrate of the liquid crystal panel 2 at the same time or use the storage voltage Vst generated by the separate storage voltage generation unit 10.

Such a TFT causes the pixel voltage supplied to the data line DL to be charged in the pixel electrode 20 in response to the gate high voltage Vgh supplied to the gate line GL. That is, the liquid crystal cells charge the corresponding pixel voltage from the data line DL when the TFT is turned on by the gate high voltage Vgh sequentially supplied to the gate line GL until the TFT is turned on again. The charging voltage is maintained. The pixel voltage charged in the liquid crystal cell of the n-th gate line GL is maintained by the storage capacitor Cst formed by overlapping the pixel electrode 20 with the storage line SL. The gate high voltage Vgh is supplied to each of the gate lines for each frame only during one horizontal period 1H during which the corresponding gate line is driven, that is, the pixel voltage is applied to the pixel electrode 20. The low voltage Vgl is supplied. The storage capacitor Cst maintains the voltage charged in the pixel electrode at the present stage by the storage voltage Vst supplied to the storage line SL.

In such a liquid crystal display, a frame inversion method, a line inversion method, and a dot inversion method are used to drive the liquid crystal cells LC on the liquid crystal panel 2. Three driving methods are mainly used.

The frame inversion driving method of the LCD inverts the polarity of the data signal supplied to the liquid crystal cells whenever the frame is changed. The line inversion driving method of the LCD inverts the polarities of the data signals supplied to the liquid crystal cells along the lines on the liquid crystal panel, that is, the gate lines. In addition, the dot inversion scheme allows the data signals of opposite polarities to be supplied to adjacent liquid crystal cells and inverts the polarities of the data signals supplied to the liquid crystal cells for each frame.

In the dot inversion driving method, positive and negative data voltages are repeatedly applied to the liquid crystal cell in the gate line direction of the liquid crystal panel, and the colors are B (black), W (white), B, W .. ... or W, B, W, B .... is displayed repeatedly. In this case, a crosstalk phenomenon occurs in the horizontal direction due to the resistance component of the storage voltage in the one dot pattern such as the Windows Shutdown pattern.

This will be described in detail with reference to FIGS. 3 to 7.

3 is a diagram illustrating a dot pattern displayed on a window of a liquid crystal panel driven by a vertical 2-dot inversion method.

Referring to FIG. 3, three red, green, and blue liquid crystal cells R, G, and B arranged in a zigzag form along a horizontal line emit light to display a dot pattern. In the window provided in a specific area within the background screen, a dot pattern dependent on the background screen is displayed. Accordingly, the dot pattern displayed on the background screen and the dot pattern displayed in the window have a continuous zigzag shape. Looking at the dot pattern displayed in the window, it can be seen that the number of liquid crystal cells charged with the positive pixel voltage and the liquid crystal cells charged with the negative pixel voltage are different.

For example, in the first horizontal line in the window, the liquid crystal cells charged with the negative pixel voltage are larger than the liquid crystal cells charged with the positive pixel voltage. In the second and third horizontal lines, the liquid crystal cells charged with the positive pixel voltage are larger than the liquid crystal cells charged with the negative pixel voltage.

As the number of liquid crystal cells charged with the positive pixel voltage and the number of the liquid crystal cells charged with the negative pixel voltage are different for each horizontal line, the storage voltage Vst, which should be constant, is the storage voltage Vst 'shown in FIG. 4. ) Fluctuates.

In detail, the n-th gate line is entirely affected by the residual negative pixel voltage. After the off point A of the n-th gate signal, the common voltage Vcom level is changed to the variable common voltage Vcom 'level as shown in FIGS. 5A and 5B, so that the storage voltage level is positive. Direction is affected. Accordingly, the average value of the pixel voltage Vp charged in the actual liquid crystal cell is shifted upward regardless of the remaining polarity of the liquid crystal cell.

That is, when the positive / negative pixel voltage is shifted upward without changing the common voltage signal level, the luminance of the red and blue liquid crystal cells R and B is reduced in the dot pattern in the whole white mode in the normally white mode. The luminance of the green liquid crystal cell G having a different polarity is increased. Accordingly, as shown in FIG. 6, a greenish phenomenon occurs in which the entire screen is close to green.

As shown in FIG. 6, when the normal screen is displayed at the center of the desktop screen while the same load is applied to all horizontal lines of the desktop screen, the common voltage level variation applied to the nth horizontal line is It is relatively less than the common voltage level variation applied to the (n + 1) th horizontal line. That is, the horizontal crosstalk occurs because the load between the liquid crystal cell corresponding to the storage line SL crossing the area other than the normal screen and the liquid crystal cell corresponding to the storage line SL crossing the normal screen is relatively small. Done. The defect phenomenon such as horizontal crosstalk is further increased by the resistance component of the storage line SL. In particular, since the line resistance increases as the storage line resistance moves away from the storage voltage generator 10, the pixel voltage charged in each liquid crystal cell is changed, thereby degrading image quality.

Accordingly, an object of the present invention is to provide a liquid crystal display device capable of improving image quality.

In order to achieve the above object, the liquid crystal display according to the present invention is formed on each of the plurality of liquid crystal cells formed at the intersections of the gate lines and the data lines, so as to maintain the pixel voltage charged in the liquid crystal cell ( A storage capacitor of a storage on common) type, a storage line for forming a storage capacitor of liquid crystal cells, and a plurality of pixel voltages formed in each of a plurality of liquid crystal cells formed at intersections of gate lines and data lines. A storage on common storage capacitor, a storage line for forming a storage capacitor of liquid crystal cells, a supply line connected to the storage lines, and a supply line connected to a central portion of the supply line to maintain the storage on common type. And a branch line for supplying a storage voltage to the storage line. It shall be.

The supply line is characterized in that formed on one side end of the liquid crystal panel.

The liquid crystal display further includes a storage voltage generator for supplying a storage voltage to a branch line, a gate driver for supplying a gate signal to the gate line, and a data driver for supplying a data signal to the data line. It features.

The storage voltage may be generated by using a common voltage applied to a common electrode formed on the upper substrate of the liquid crystal panel or separately.

The liquid crystal panel is characterized in that the polarity of the data signals supplied to the liquid crystal cells in each frame and the polarity of the polarity of the opposite polarity of the data signal to the adjacent liquid crystal cells.

Other objects and advantages of the present invention in addition to the above object will become apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.                     

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. 8 to 10B.

8 is a view showing a liquid crystal display device according to the present invention.

Referring to FIG. 8, the liquid crystal display according to the present invention includes a liquid crystal panel 32, a data driver 36 for supplying data to the data lines DL1 to DLm of the liquid crystal panel 32, and a liquid crystal panel. A gate driver 34 for supplying scan pulses to the gate lines GL1 to GLn at 32 is provided.

The gate driver 34 generates a scan pulse under the control of a timing controller (not shown) and sequentially supplies the scan pulse to the gate lines GL1 to GLn. The gate driver 34 includes a shift register for sequentially generating scan pulses, and a level shifter for shifting the swing width of the scan pulse voltage to be suitable for driving the liquid crystal cell Clc. The TFT is turned on in response to the scan pulse from the gate driver 34. When the TFT is turned on, video data on the data lines DL1 to DLm is supplied to the pixel electrode of the liquid crystal cell Clc.

After sampling and latching the video data input from the timing controller, the data driver 36 converts the latched data into a gamma compensation voltage that is preset as an operational data voltage, and simultaneously supplies the data data to the data lines DL1 to DLm. Here, the data converted by the data driver 36 is supplied to the data lines DL1 to DLm by one horizontal line in one horizontal period in synchronization with each scan pulse every time a scan pulse occurs.                     

Liquid crystal is injected between the upper glass substrate and the lower glass substrate of the liquid crystal panel 32. In this liquid crystal panel 32, m x n liquid crystal cells Clc are arranged in a matrix type. In addition, the m data lines DL1 to DLm and the n gate lines GL1 to GLn cross each other in the liquid crystal panel 32, and TFTs for driving the liquid crystal cell Clc are formed at the intersections thereof. The gate terminal of the TFT is connected to the same gate line GL every horizontal line, and the source terminal of the TFT is connected to the same data line DL every vertical line. The drain terminal of the TFT is connected to the pixel electrode of the liquid crystal cell Clc for each liquid crystal cell Clc. In addition, a storage capacitor Cst is formed between the pixel electrode of the liquid crystal cell Clc and the storage lines SL1 to SLn. The storage lines SL1 to SLn constituting the storage capacitor Cst are connected to the common line CL, respectively.

The common line CL is formed at one end of the liquid crystal panel 32, and a branch point P is formed at the center of the common line CL. Through this branch point P, the common line CL is connected to the branch line PL. The storage voltage Vst is supplied to the branch line PL through the storage voltage generator 40. That is, the storage voltage Vst generated by the storage voltage generator 40 is branched from the branch point P to the common line CL through the branch line PL, and is supplied to each storage line SL.

The storage voltage Vst generated by the storage voltage generator 40 simultaneously uses the common voltage Vcom applied to the liquid crystal cell Clc of the liquid crystal panel 32 or uses a separate storage voltage.

As such, the TFT causes the pixel voltage supplied to the data line to be charged to the pixel electrode in response to the gate high voltage Vgh supplied to the gate line. That is, the liquid crystal cells charge the corresponding pixel voltage from the data line when the TFT is turned on by the gate high voltage Vgh which is sequentially supplied to the gate line, and maintains the charging voltage until the TFT is turned on again. . The pixel voltage charged in the liquid crystal cell of any n-th gate line is maintained by the storage capacitor Cst formed by overlapping the pixel electrode with the storage line. The gate high voltage Vgh is supplied to each of the gate lines for each frame only during one horizontal period (1H) at which the corresponding gate line is driven, that is, the pixel voltage is applied to the pixel electrode. Vgl) is supplied. The storage capacitor Cst maintains the voltage charged in the pixel electrode at the present stage by the storage voltage Vst supplied to the storage line SL through the supply line CL connected to the branch line PL.

9A and 9B are diagrams illustrating line resistance of a storage line according to the related art and the present invention.

In the conventional storage lines SL1 to SLn illustrated in FIG. 9A, the storage voltage Vst is supplied in series from the supply line CL. For example, in the (n-1) / 2 storage line SL ((n-1) / 2), the first to (n-1) / 2 storage line resistance values Ra1 + Ra2 + ... + The storage voltage Vst to which R (a (n-1) / 2) is added is supplied.

Accordingly, the storage line resistance values Ra1, Ra2, Ra3,... Ra (n-1), and Ran are added to the nth storage line SLn from the first storage line SL1 to the nth storage line SLn. The first to nth storage voltages respectively supplied to the first to nth storage lines SL1 to SLn have a relationship such as Vst1> Vst2> Vst3> ... Vst (n-2)> Vst (n-1)> Vstn. Has That is, a difference occurs in the storage voltage supplied to the storage line SL of each liquid crystal cell.

In contrast, the storage line SL according to the present invention illustrated in FIG. 9B is supplied with the storage voltage Vst from the branch point P in a parallel manner. For example, in the (n-1) / 2th storage line SL ((n-1) / 2), the branch resistance Rs of the branch line PL and the n / 2th storage line resistance R ( The storage voltage to which a (n-1) / 2) is added is supplied. Here, the branch resistance Rs is relatively smaller than the n / 2th storage line resistance. Accordingly, the storage voltage supplied to the (n-1) / 2th storage line SL ((n-1) / 2) is relatively similar to the storage voltage supplied from the branch line PL.

Accordingly, the storage line resistance values Ra1, Ra2, Ra3,... / Ran / 2 are increased from the n / 2th storage line SLn / 2 connected to the branch point P toward the first storage line SL1. As the sum is added, the first through n / 2 storage voltages respectively supplied to the first through n / 2th storage lines SL1 through SLn / 2 have a relationship such as Vst1 <Vst2 <Vst3 <... Vstn / 2. Have Further, the storage line resistance values Ra1, Ra2, Ra3, ..., Ra () are moved from the (n + 1) / 2th storage line SL (n + 1) / 2 to the nth storage line SLn. As n + 1) / 2) is added, the first to nth / 2 storage voltages supplied to the (n + 1) / 2 to nth storage lines SL (n + 1) / 2 to SLn, respectively, Vstn <Vst (n-1) <... <Vstn / 2 That is, by supplying the storage voltage Vst through the branch point P at the center of the branch line PL, the resistance component of the storage line SL may be reduced by about half.                     

10A and 10B are waveform diagrams illustrating storage voltages applied to a storage line according to the related art and the present invention.

As shown in FIG. 10A, the difference between the storage voltage Vst applied to the storage line SL of the liquid crystal cell charged with the positive pixel voltage and the liquid crystal cell charged with the negative pixel voltage is large. On the other hand, as shown in FIG. 10B, the storage voltage Vst applied to the storage line SL of the liquid crystal cell in which the positive pixel voltage is charged and the liquid crystal cell in which the negative pixel voltage is charged through the branch line PL. The level is almost the same.

As such, the resistance of each storage line may be reduced to prevent horizontal crosstalk.

As described above, the liquid crystal display according to the present invention supplies the storage voltage in parallel to the storage line formed across the pixel electrode through the branch line. That is, by dividing the storage voltage at the center of the liquid crystal panel, the resistance component can be relatively reduced. Accordingly, it is possible to prevent horizontal crosstalk occurring in one dot pattern such as a window shutdown pattern.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (7)

A storage capacitor of a storage on common type formed in each of the plurality of liquid crystal cells formed at each intersection of the gate lines and the data lines to maintain the pixel voltage charged in the liquid crystal cell; A storage line for forming a storage capacitor of the liquid crystal cells; A supply line connected to the storage lines, And a branch line connected to a central portion of the supply line to supply a storage voltage to the storage line through the supply line. The method of claim 1, And the supply line is formed at one end of the liquid crystal panel. The method of claim 1, A storage voltage generator for supplying the storage voltage to the branch line; A gate driver for supplying a gate signal to the gate line; And a data driver for supplying a data signal to the data line. The method of claim 2, And the storage voltage is generated separately or using a common voltage applied to a common electrode formed on an upper substrate of the liquid crystal panel. The method of claim 2, The liquid crystal panel of claim 1, wherein the liquid crystal panel supplies data signals having opposite polarities to adjacent liquid crystal cells and inverts polarities of data signals supplied to the liquid crystal cells every frame. The method of claim 1, And the storage voltage is supplied in parallel to the storage line through the branch line. The method of claim 6, And the storage voltage is branched at the center of the liquid crystal panel through the branch line and supplied to the storage line.

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