KR100818075B1 - Center pad type chip package using bonding pad redistribution - Google Patents

Abstract

The present invention relates to a center pad type chip package, and a center pad type semiconductor chip is applied to a general type package structure by using a bonding pad rearrangement film. A package of the present invention includes a center pad type semiconductor chip having a bonding pad formed along a center of an active surface and includes a die pad located at a lower portion of the semiconductor chip and a lead frame . In addition, the package of the present invention includes a bonding pad relocation film, which is located between the active surface of the semiconductor chip and the die pad, and has one end electrically connected to the bonding pad and the opposite end electrically connected to the outside of the edge of the semiconductor chip A rearrangement pattern electrically connected to the leads, and an adhesive layer formed above and below the rearrangement pattern and bonding the semiconductor chip and the die pad. In addition, the package of the present invention includes a package body that surrounds the semiconductor chip, the lead frame, and the relocation film and protrudes outwardly of the lead.

Center Pad Chip Package, Eloshi Package, Bonding Pad Relocation

Description

CENTER PAD TYPE CHIP PACKAGE USING BONDING PAD REDISTRIBUTION USING BONDING PAD RELOCATION [0002]

1 is a cross-sectional view showing an example of a center pad type chip package according to the related art.

2 is a cross-sectional view showing another example of a center pad type chip package according to the related art.

FIGS. 3A to 3F are a plan view or a sectional view showing a center pad type chip package and a manufacturing process thereof according to a first embodiment of the present invention; FIGS.

4 is a sectional view of a center pad type chip package according to a second embodiment of the present invention;

5 is a sectional view of a center pad type chip package according to a third embodiment of the present invention.

6 is a sectional view of a center pad type chip package according to a fourth embodiment of the present invention.

Description of the Related Art

100, 200, 300, 400: a center pad type chip package,

30: bonding pad redistribution film

31: adhesive layer

32: Redistributed pattern

40: die pad

42, 44, 46, 48: lead,                 

50: a center pad type semiconductor chip

52: bonding pad

60: bonding wire

70: package body

The present invention relates to a semiconductor package, and more particularly, to a package structure of a center pad type semiconductor chip.

As is well known, on the active surface of a semiconductor chip such as a DRAM, a plurality of bonding pads for input / output with the outside are formed. These bonding pads are generally formed at the edge of the active surface of the chip. In recent years, however, they are formed along the center of the active surface of the chip. The reason why the bonding pads are disposed at the center of the chip active surface is that the layout of the circuit is easy to design, the development into a multi-bit configuration is easy, and the number of bonding wires can be freely adjusted . Hereinafter, the semiconductor chip of the type in which the bonding pads are formed along the center of the chip active surface will be referred to as a " center pad type semiconductor chip ".

As the center pad type semiconductor chip becomes popular, the lead on chip (LOC) package technology has been developed and applied to the semiconductor package side. The structure of a typical ELISA package is shown in Fig.                         

As shown in FIG. 1, the ELISA package 10 has a structure in which a lead 13 is disposed on a semiconductor chip 11. The lead 13 is attached to the active surface of the semiconductor chip 11 by the adhesive 12 and electrically connected to the bonding pad 11a formed at the center of the active surface of the semiconductor chip 11 by the bonding wire 14. [ do.

However, since the polyimide tape used as the adhesive 12 is very expensive, the ELISA package 10 having such a structure has a higher manufacturing cost than a general type of package using an epoxy adhesive, A filler contained in the molding resin is caught between the semiconductor chip 11 and the lead 13 in the process of forming the package body 15, thereby causing chip damage. In addition, the semiconductor chip 11 is not located at the center of the package body 15 due to its structural characteristics, which causes problems such as top-to-bottom imbalance of molding resin flow and warpage of the package.

There have been attempts to apply a center pads type semiconductor chip to a general type of package structure due to such problems. Its structure is shown in Fig.

2, the semiconductor package 20 has a structure in which the semiconductor chip 21 is bonded onto the die pad 23a and the leads 23b are arranged around the semiconductor chip 21. [ The die pad 23a is attached to the back surface of the semiconductor chip 21 by the epoxy adhesive 22 and the lead 23b is electrically connected to the bonding pad 21a by the bonding wire 24. [

However, in such a package structure, the distance between the bonding pad 21a and the lead 23b is increased, so that it is inevitable to use the long bonding wire 24. Accordingly, the amount of the bonding wire 24 used mainly by the gold wire is increased, the workability of the wire bonding is reduced, and in particular, in the molding process for forming the package body 25, the wire sweeping phenomenon And short-circuiting may occur between neighboring bonding wires 24.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a center pad type chip package which can apply a center pad type semiconductor chip to a package structure of a general type while solving all the problems in the related art.

In order to achieve the above object, the present invention provides a center pad type chip package which is constructed by using a bonding pad relocation film for rearranging a bonding pad of a semiconductor chip to the outside of the chip.

A center pad type chip package according to the present invention includes a center pad type semiconductor chip having a bonding pad formed along the center of an active surface and includes a die pad located under the semiconductor chip, And a lead frame made of lead. In addition, the package of the present invention includes a bonding pad relocation film, which is located between the active surface of the semiconductor chip and the die pad, and has one end electrically connected to the bonding pad and the opposite end electrically connected to the outside of the edge of the semiconductor chip A rearrangement pattern electrically connected to the leads, and an adhesive layer formed above and below the rearrangement pattern and bonding the semiconductor chip and the die pad. In addition, the package of the present invention includes a package body that surrounds the semiconductor chip, the lead frame, and the relocation film and protrudes outside the lead.

In the center pad type chip package of the present invention, the electrical connection between the rearrangement pattern and the bonding pads is preferably performed by heat or ultrasonic pressing, and bumps may be formed on the bonding pads. Also, the electrical connection between the relocation pattern and the lead can be made through the bonding wire, or directly by a thermal or ultrasonic pressing method. The rearrangement pattern is preferably formed of any one of copper, nickel, gold, chromium, cobalt, tin, and combinations thereof, and the back surface of the semiconductor chip may be exposed to the outside of the package body. In addition, a die pad can be formed below the leads so that the semiconductor chip is located at the center of the package body.

Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used for the same components, and some components are exaggerated or schematically shown in order to facilitate a clear understanding of the drawings.

The structure of the center pad type chip package according to the first embodiment of the present invention is shown in Fig. 3F, its manufacturing process is shown in Figs. 3C to 3E, and the bonding pad relocation films used therein are shown in Figs. 3A and 3B, respectively have.

3A and 3B, a bonding pad relocation film 30 (hereinafter, referred to as a 'relocation film') used in the present invention includes a rearrangement pattern 32 and adhesive layers 31 formed on upper and lower portions thereof, And each rearrangement pattern 32 extends from the center of the rearrangement film 30 to one edge. One end of the rearrangement pattern 32 located at the center of the rearrangement film 30 corresponds to a bonding pad (52 of FIG. 3F) formed at the center of the semiconductor chip (50 of FIG. 3F) Is extended to the outside of the edge of the semiconductor chip. A part of the adhesive layer 31 is removed so that both ends of the rearrangement pattern 32 are exposed. The rearrangement pattern 32 can be formed of various combinations of metals such as copper (Cu), nickel (Ni), gold (Au), chromium (Cr), cobalt (Co), tin (Sn)

3C, the relocation film 30 is attached onto the die pad 40 and the semiconductor chip 50 is attached on the relocation film 30, as shown in Fig. 3D. Therefore, the relocation film 30 serves to bond the semiconductor chip 50 and the die pad 40 in place of the conventional epoxy adhesive. The leads 42 are arranged around the semiconductor chip 50. The lead frame composed of the die pad 40 and the lead 42 is the same as that used in a semiconductor package of a general type.

The semiconductor chip 50 has a bonding pad 52 formed at the center of its active surface and is attached to the rearrangement film 30 in a so-called face-down type so that its active surface faces downward. At this time, the bonding pad 52 of the semiconductor chip 50 is electrically connected to the end portion of the rearrangement pattern (32 in FIG. 3A) located at the center of the rearrangement film 30. FIG. As the method used therefor, a pressing method using heat or ultrasonic waves is preferable. Bumps may be previously formed on the bonding pads 52 by plating, screen printing, stud bumping, vapor deposition, or the like before connection with the rearrangement pattern.

As shown in FIG. 3E, the relocation film 30 and the lead 42 are electrically connected by the bonding wire 60. At this time, the end portion of the relocation pattern (32 in FIG. 3A) extending to the edge of the semiconductor chip 50 and located at the edge of the relocation film 30 is connected to the bonding wire 60. Therefore, the bonding pads 52 formed at the center of the semiconductor chip 50 have the effect of being rearranged to the outside of the semiconductor chip 50 through the rearrangement pattern 32.

Next, the package body 70 is formed to surround the semiconductor chip 50, the die pad 40, and the relocation film 30 using a molding resin. The inner portion of the lead 42 connected to the bonding wire 60 is also included in the package body 70 and the outer portion of the lead 42 protrudes out of the package body 70. The subsequent steps are the same as those in the known package assembling process, so that the description thereof will be omitted. Through the series of processes described above, the center pad type chip package 100 according to the present embodiment is completed.

The spacing and the size of the bonding pads 52 are no longer important and the wire bonding workability can be improved by using the rearrangement pattern 32 connected to the bonding wires 60. [ It is affected by the spacing and size of the ends. Therefore, the degree of freedom of chip design is improved, and the chip size can be reduced. In addition, since the length of the bonding wire 60 is short, the wire chewing phenomenon is prevented, and since the general type lead frame including the die pad 40 and the peripheral leads 42 is used, It is possible to implement a chip stacked package and a face-up type fine BGA package.

As a second embodiment of the present invention, a chip pile type center pad type chip package is shown in Fig. 4, a relocation film 30 is attached to the upper and lower surfaces of the die pad 40, the semiconductor chip 50 is bonded to each relocation film 30, The chip stacking package 200 is realized by connecting the relocation film 30 and the lead 44. [

The bonding pads (not shown) located at the center of the semiconductor chip 50 are rearranged to the outside of the semiconductor chip 50 using the relocation film 30 in the second embodiment as in the first embodiment described above. On the other hand, the die pad 40 of the second embodiment is formed at the same height as the lead 44. This is because the semiconductor chip 50 is positioned on the upper and lower portions of the die pad 40, and the vertical balance of the semiconductor package 200 is maintained through this configuration. In contrast, in the above-described first embodiment, the semiconductor chip 50 is positioned in the center of the package 100 by forming the die pad 40 below the leads 42. By maintaining the vertical balance of the semiconductor package as described above, it is possible to prevent problems such as package warpage and void generation after the molding process.

The center pad type chip package according to the present invention can realize the electrical connection between the relocation film and the lead without using the bonding wire 60. [ The third embodiment shown in Fig. 5 is an example thereof. In the package 300 of the third embodiment, the lead 46 is directly bonded to the relocation film 30. At this time, the lead 46 and the relocation film 30 are bonded by thermal or ultrasonic pressing. Although not shown in the drawing, the connection portion of the lead 46 is formed of silver (Ag), gold (Au) Tin (Sn) or the like may be plated, and solder plating may be applied to the corresponding portion of the relocation film 30. [                     

Since the center pad type chip package according to the present invention uses the die pad 40, it has excellent characteristics in terms of heat dissipation. Furthermore, as in the fourth embodiment shown in FIG. 6, if the back surface of the semiconductor chip 50 is configured to be exposed outside the package body 70, the package 400 having better heat radiation characteristics can be realized. Unlike the previous embodiments, the leads 48 shown in FIG. 6 are shown with reference to die pads and tie bars.

In addition, the center pad type chip package according to the present invention may implement the relocation of the bonding pads using a wafer level packaging technique.

As described above, the center pad type chip package according to the present invention has various advantages and advantages.

Since the relocation film having the relocation pattern is used, wire bonding workability can be ensured irrespective of the interval or size of the bonding pads. Therefore, the degree of freedom of chip design is improved, and the chip size can be reduced.

Further, since the length of the bonding wire is short, the wire chewing phenomenon is prevented, and the electrical characteristics are improved.

In addition, since a general type lead frame including a die pad can be applied, it is possible to implement a chip stacked package and a bottom-up microvisible package using the existing package manufacturing equipment as it is. In addition, since the lead frame does not pass over the semiconductor chip, defects due to the insertion of the molding resin filler can be prevented.                     

In addition, since the die pad not only serves as a heat radiating but also exposes the back surface of the chip, the heat radiation characteristic is improved.

In addition, it is possible to maintain the balance of the package up and down, thereby preventing a package warpage, a problem of occurrence of voids after the molding process, and a reliability failure due to moisture can be prevented because there is almost no path for moisture to penetrate into the package.

Although the present invention has been described with reference to preferred embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It is not intended to limit the scope. It is to be understood by those skilled in the art that other modifications based on the technical idea of the present invention are possible in addition to the embodiments disclosed herein.

Claims (8)

A center pad type semiconductor chip having a bonding pad formed along the center of the active surface; A lead pad comprising a die pad located under the semiconductor chip and a lead arranged around the semiconductor chip; Wherein the semiconductor chip is electrically connected to the bonding pad and the semiconductor chip is positioned between the active surface of the semiconductor chip and the die pad and one end of the semiconductor chip is electrically connected to the bonding pad and the opposite end of the semiconductor chip is opposite the semiconductor chip, A bonding pad rearrangement film formed on and under the rearrangement pattern and comprising an adhesive layer for bonding the semiconductor chip and the die pad; And And a package body that surrounds the semiconductor chip, the lead frame, and the relocation film, and protrudes outside the lead. The center pad type chip package according to claim 1, wherein the rearrangement pattern and the bonding pad are electrically connected to each other by thermal or ultrasonic pressing. The center pad type chip package according to claim 2, wherein the rearrangement pattern and the bonding pad are electrically connected through a bump formed on the bonding pad. The center pad type chip package according to claim 1, wherein electrical connection between the rearrangement pattern and the leads is made through a bonding wire. The center pad type chip package according to claim 1, wherein the electrical connection between the rearrangement pattern and the leads is achieved by a pressing method using heat or ultrasonic waves. The center pad type chip package according to claim 1, wherein the rearrangement pattern is formed of any one of copper, nickel, gold, chromium, cobalt, tin and combinations thereof. The chip package of claim 1, wherein a rear surface of the semiconductor chip is exposed to the outside of the package body. The center pad type chip package according to claim 1, wherein the die pad is formed below the lead so that the semiconductor chip is located at the center of the package body.

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